Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Species A2, B1, and Cl, drawn to Embodiments shown in figs. 9, 5, and 6A and directed to claims 1-4, 7-9, and 11-19 in the reply filed on 04/10/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 7-9, 11-13, 16, 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Totani et al. (US 20160079467 A1; hereinafter “Totani”).
In re claim 1, Totani discloses in figs. 1-8, a light emitting diode, comprising:
an epitaxial structure comprising a second semiconductor layer 120, a light emitting layer 130, and a first semiconductor layer 140 stacked in sequence from bottom to top (¶65, 95);
a first electrode P1, BM1, TE1 located on the first semiconductor layer 140 and electrically connected to the first semiconductor layer 140 (¶68, 75);
a second electrode N1 located on the second semiconductor layer 120 and electrically connected to the second semiconductor layer 120 (¶67),
wherein the first electrode P1, BM1, TE1 at least comprises a first metal electrode P1a, BM1, and the first metal electrode P1a, BM1 has a strip-shaped extension portion (“a p-electrode P1 is formed in strip forms”; ¶105. In fig. 1, the first electrode P1, BM1, TE1 has the upper and lower strip-shaped extension portions; hereinafter “Extension”); and
an insulating layer F1, IP1 located at least on the first semiconductor layer 140 and the first metal electrode P1 (¶65),
wherein the insulating layer F1, IP1 has a partially thinned portion (e.g., IP1 has a partially thinned portion around contact electrode P1a and in the circular area in the extension portion, as shown in fig. 5, which is cross-section from fig. 1), and
at least part of the extension portion Extension is located below the partially thinned portion of the insulating layer F1, IP1, IN1 (figs. 1-2, 5 show, at least part of the extension portion Extension is located below the partially thinned portion of the insulating layer F1, IP1).
In re claim 2, Totani discloses in figs. 1-8, the light emitting diode according to claim 1,
wherein the partially thinned portion of the insulating layer has a first thickness (e.g., IP1 has a first thickness, i.e., zero, in the smaller circular areas shown in the plan view of fig. 1 and see the V-V cross-section shown in fig. 5),
the insulating layer around the partially thinned portion has a second thickness (e.g., IP1 has a second thickness in between the smaller circular areas shown in the plan view of fig. 1 and in the VI-VI cross-section shown in fig. 6),
the second thickness is a maximum thickness of the insulating layer, and the first thickness is less than the second thickness (see figs. 5-6, the second thickness shown in fig. 6 is a maximum thickness of the insulating layer, and the first thickness, i.e., zero, is less than the second thickness).
In re claim 7, Totani discloses in figs. 1-8, the light emitting diode according to claim 1, wherein a thickness of the first metal electrode ranges from 0.3 microns to 3 microns (based on Table 1 and ¶84-85, a thickness of the first metal electrode P1, BM1, TE1 is 2.367 microns).
In re claim 8, Totani discloses in figs. 1-8, the light emitting diode according to claim 1, wherein part of a structure of the extension portion Extension is located below the partially thinned portion of the insulating layer F1, IP1, IN1 (figs. 1-2, 5 show, part of a structure of the extension portion Extension is located below the partially thinned portion of the insulating layer F1, IP1).
In re claim 9, Totani discloses in figs. 1-8, the light emitting diode according to claim 1, wherein when viewed from above the light emitting diode toward the epitaxial structure, the partially thinned portion of the insulating layer is located at or away from a center of the light emitting diode (fig. 1 shows a plan view, wherein all the smaller circular areas are located away from a center of the light emitting diode. The insulating layer, e.g., IP1 has partially thinned portion the smaller circular areas).
In re claim 11, Totani discloses in figs. 1-8, the light emitting diode according to claim 1,
wherein the first electrode further comprises a first pad electrode P1b, and the first pad electrode P1b is located on the insulating layer (e.g., on IP1) and is electrically connected to the first semiconductor layer 140 through the first metal electrode P1a (¶68),
the second electrode N1 comprises a second pad electrode N1b and a second metal electrode N1a, and the second pad electrode N1 is located on the insulating layer (e.g., located on the IN1) and is electrically connected to the second semiconductor layer 120 through the second metal electrode N1a (¶67, 86).
In re claim 12, Totani discloses in figs. 1-8, the light emitting diode according to claim 11, wherein when viewed from above the light emitting diode toward the epitaxial structure, the extension portion Extension extends from below the first pad electrode P1b through or around a center of the epitaxial structure toward the second pad electrode N1b (fig. 1 shows a plan view, wherein the lower most extension portion extends from below the first pad electrode P1b through or around a center of the epitaxial structure toward the second pad electrode N1b).
In re claim 13, Totani discloses in figs. 1-8, the light emitting diode according to claim 11, wherein when viewed from above the light emitting diode toward the epitaxial structure, the partially thinned portion of the insulating layer is located between the first pad electrode P1b and the second pad electrode N1b (fig. 1 shows a plan view, wherein all the smaller circular areas are located between the first pad electrode P1b and the second pad electrode N1b. The insulating layer, e.g., IP1 has partially thinned portion the smaller circular areas).
In re claim 16, Totani discloses in figs. 1-8, the light emitting diode according to claim 1, further comprising: a substrate 100 disposed on a side of the second semiconductor layer 120 away from the first semiconductor layer 140 (¶65).
In re claim 19, Totani discloses in figs. 1-8, a light emitting device 100 using the light emitting diode according to claim 1 (¶65).
Claim(s) 1-4, 14, 17-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jeon et al. (US 20160260869 A1; hereinafter “Jeon”).
In re claim 1, Jeon discloses in figs. 62-65, a light emitting diode, comprising:
an epitaxial structure comprising a second semiconductor layer 30, a light emitting layer, 40 and a first semiconductor layer 50 stacked in sequence from bottom to top (¶139);
a first electrode 92, 94, 93, 60 located on the first semiconductor layer 50 and electrically connected to the first semiconductor layer 50 (¶98, 114);
a second electrode 80 located on the second semiconductor layer 30 and electrically connected to the second semiconductor layer 30 (¶99),
wherein the first electrode at least comprises a first metal electrode 93, 60, and the first metal electrode 93, 60 has a strip-shaped extension portion (metal electrode 93, 60 extend compared to the circular electrical connections 94, has been interpreted as having a strip-shaped extension portion); and
an insulating layer 91b located at least on the first semiconductor layer 50 and the first metal electrode 93, 60 (¶131),
wherein the insulating layer 91b has a partially thinned portion (the insulating layer 91b has a partially thinned portion directly above the first metal electrode 93, 60 relative to the portion directly above the first semiconductor layer 50; hereinafter the partially thinned portion will be referred to as “91b_thin” and the portion directly above the first semiconductor layer 50 will be referred to as “91b_thick”), and
at least part of the extension portion 93, 60 is located below the partially thinned portion of the insulating layer (91b_thin).
In re claim 2, Jeon discloses in figs. 62-65, the light emitting diode according to claim 1,
wherein the partially thinned portion of the insulating layer (91b_thin) has a first thickness (e.g., t1), the insulating layer around the partially thinned portion (91b_thick) has a second thickness (e.g., t2),
the second thickness t2 is a maximum thickness of the insulating layer, and the first thickness t1 is less than the second thickness.
In re claim 3, Jeon discloses in figs. 62-65, the light emitting diode according to claim 2,
wherein the second thickness t2 ranges from 1 micron to 6 microns (¶131).
In re claim 4, Jeon discloses in figs. 62-65, the light emitting diode according to claim 2, wherein a thickness difference between the second thickness t2 and the first thickness t1 is less than or equal to a thickness of the extension portion 93, 60 (fig. 10; a thickness difference between the second thickness t2 and the first thickness t1 is equal to a thickness of the extension portion 93, 60).
In re claim 14, Jeon discloses in figs. 62-65, the light emitting diode according to claim 1, wherein the partially thinned portion of the insulating layer 91b_thin is in a strip shape.
In re claim 17, Jeon discloses in figs. 62-65, a manufacturing method of a light emitting diode, comprising:
providing an epitaxial structure comprising a second semiconductor layer 30, a light emitting layer, 40 and a first semiconductor layer 50 stacked in sequence from bottom to top (¶139);
manufacturing a first metal electrode comprising depositing the first metal electrode 92, 94, 93, 60 on the first semiconductor layer 50 (¶98, 114, 118),
wherein the first metal electrode has a strip-shaped extension portion 93;
depositing an insulating layer 91b covering at least the first semiconductor layer 50 and the first metal electrode 93; and
thinning part of the insulating layer 91 above the extension portion of the first metal electrode 93 through a removal process to form a partially thinned portion of the insulating layer 91b (¶317; by removing a portion of the insulating layer 91, an opening 5 was formed. Thus, a partially thinned portion of the insulating layer 91b was formed above the p-side finger electrode 93).
In re claim 18, Jeon discloses in figs. 62-65, the manufacturing method of the light emitting diode according to claim 17, wherein the removal process comprises at least one of laser, dry etching, and wet etching (¶317).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jeon, as applied to claim 1 above.
In re claim 15, Jeon discloses in figs. 62-65, the light emitting diode according to claim 1, wherein the partially thinned portion of the insulating layer 91b has a maximum width (e.g., the maximum width of the insulating layer 91b in the opening 5 is determined by the bottom side dimension of the opening 5).
Jeon does not expressly disclose the maximum width is between 5 microns and 100 microns.
However, it has been held to be within the general skill of a worker in the art to select a maximum width of the partially thinned portion to form an opening on the finger electrode on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. A person of ordinary skills in the art is motivated to select a maximum width of partially thinned portion between 5 microns and 100 microns in order to achieve a balance between lowering contact resistance of the p-side electrode and also reduce the size of the light emitting device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NILUFA RAHIM whose telephone number is (571)272-8926. The examiner can normally be reached M-F 9am-5:30pm EST.
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/NILUFA RAHIM/Primary Examiner, Art Unit 2893
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