Prosecution Insights
Last updated: April 19, 2026
Application No. 18/536,945

METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT

Non-Final OA §112
Filed
Dec 12, 2023
Examiner
NGUYEN, CUONG B
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nichia Corporation
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
824 granted / 938 resolved
+19.8% vs TC avg
Strong +16% interview lift
Without
With
+16.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
48 currently pending
Career history
986
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
41.9%
+1.9% vs TC avg
§102
33.8%
-6.2% vs TC avg
§112
18.6%
-21.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 938 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Objections Claims 7-12 are objected to because of the following informalities: Claim 7 recites limitation “the inner region” in line 9 refers back to “a roughened inner region” in line 4 and the limitation “the inner region” should be amended to “the roughened inner region” for avoiding confusion. Appropriate correction is required. Claim 8-12 recites limitation “the inner region” in line 10 refers back to “a roughened inner region” in line 5 and the limitation “the inner region” of claims 8-12 should be amended to “the roughened inner region” for avoiding confusion. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 1 recites limitation “a second surface side” in line 5 without reciting “a first surface side”. It is unclear to the examiner where is “a first surface side”. Claim 1 recites a redundant “a plan view” in line 18 because claim 1 already recites “a plan view” in line 8. Claim 2-12 recites a redundant “a semiconductor element” in line 1 because claim 1 already recites “a semiconductor element” in line 1. Claim 7 recites a redundant “a plan view” in line 4-5 because claim 1 already recites “a plan view” in line 8. Claims 8-12 recites a redundant “a plan view” in line 5-6 because claim 1 already recites “a plan view” in line 8. Claim 7 recites the limitation “the outer edges of the cover member” in line 12. There is insufficient antecedent basis for this limitation in the claim. Claims 8-10 and 12 recites the limitation “the outer edges of the cover member” in line 13. There is insufficient antecedent basis for this limitation in the claim. Allowable Subject Matter Claims 1-12 would be allowable if rewritten to overcome the objections under minor formalities and the rejection(s) under 35 U.S.C. 112, set forth in this Office action. The following is an examiner's statement of reasons for the indication of allowable subject matter: Regarding claim 1, Tamura et al. (Patent No.: US 7,244,628 B2) discloses a method of manufacturing a semiconductor element in figs. 2A-2H, the method comprising: providing a structure comprising: a semiconductor structure (layers 2, 3 and 4) having a first surface , a second surface opposite the first surface, and a third surface connecting the first surface and the second surface, a passivation member (layer 8) disposed on a second surface side and covering the second surface and the third surface, and a underlying film (layer 6) disposed continuously on the first surface and a surface of the passivation member adjacent to the first surface in a plan view; forming a cover member (layer 7) disposed continuously on a portion of the underlying film located on the first surface and a portion of the underlying film located on the surface of the passivation member; forming a resist film (mask 10) on the cover member, and removing a portion of the cover member located on the surface of the passivation member such that a remaining portion of the cover member remains on the portion of the underlying film located on the first surface; removing portions of the passivation member, the underlying film and the cover member using the resist film as a mask (see column 8, line 6 through column 9, line 49). Tamura et al. fails to disclose the method comprising the passivation member being resin, the underlying film is insulating film, and subsequent to the step of forming the resist film and removing the portion of the cover member, removing a portion of the first insulation film and a portion of the resin member that are located in a region not overlapping the remaining portion of the cover member in a plan view by etching using the cover member as a mask; and subsequent to the step of removing the portion of the first insulation film and the portion of the resin member, removing the remaining portion of the cover member; wherein: an etch rate for the cover member in the step of removing the portion of the first insulation film and the portion of the resin member is lower than an etch rate for the resist film in the step of removing the portion of the first insulation film and the portion of the resin member. Claims 2-12 depend on claim 1, and therefore also include said claimed limitation. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CUONG B NGUYEN whose telephone number is (571)270-1509 (Email: CuongB.Nguyen@uspto.gov). The examiner can normally be reached Monday-Friday, 8:30 AM-5:00 PM Eastern Standard Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven H. Loke can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CUONG B NGUYEN/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Dec 12, 2023
Application Filed
Feb 01, 2026
Non-Final Rejection — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+16.0%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 938 resolved cases by this examiner. Grant probability derived from career allow rate.

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