Prosecution Insights
Last updated: April 19, 2026
Application No. 18/537,782

REDRESSING A CHIP SITE ON A MULTI-CHIP LAMINATE PACKAGE

Non-Final OA §102§103
Filed
Dec 12, 2023
Examiner
NGUYEN, KHIEM D
Art Unit
2892
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
International Business Machines Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
98%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
1872 granted / 2187 resolved
+17.6% vs TC avg
Moderate +12% lift
Without
With
+12.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
73 currently pending
Career history
2260
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
44.5%
+4.5% vs TC avg
§102
30.7%
-9.3% vs TC avg
§112
15.2%
-24.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 2187 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The IDS filed on 12/12/2023 and 11/27/2024 have been considered. Claim Objections Claims 1, 4, 7, 9-12, and 18 are objected to because of the following informalities: In claim 1, line 3, a semicolon is missing after the limitation, thus, “a retaining surface” should be replace with --a retaining surface;--. In claim 1, lines 4-5 “the laminate structure” should be change to --the multi-chip laminate structure-- for consistency. In claim 1, line 7, “the laminate structure” should be change to --the multi-chip laminate structure-- for consistency. In claim 4, line 3, “the laminate structure” should be change to --the multi-chip laminate structure-- for consistency. In claim 7, line 3, “the insulating film” should be change to --the flexible insulating film-- for consistency. In claim 9, line 3, “the laminate structure” should be change to --the multi-chip laminate structure-- for consistency. In claim 10, line 2, “the laminate structure” should be change to --the multi-chip laminate structure-- for consistency. In claim 11, line 2, “the laminate structure” should be change to --the multi-chip laminate structure-- for consistency in both instances. In claim 12, line 9, “the laminate structure” should be change to --the multichip laminate structure-- for consistency. In claim 12, line 11, “the laminate structure” should be change to --the multichip laminate structure-- for consistency. In claim 18, line 4, “the laminate structure” should be change to --the multichip laminate structure-- for consistency. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2, 4-8, and 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Weigler et al. (U.S. Pub. 2005/0087588). In re claim 1, Weigler discloses a method of redressing a multi-chip laminate structure, the method comprising: depositing conductive pads 38 on a flexible insulating film 30 (see paragraph [0019] and fig. 3, note that element 30 is made of a thin flexible material such as FR4); mounting the flexible insulating film 30 on a retaining surface 42 (see paragraph [0023] and fig. 4); heating the retaining surface 42 to a temperature above a solder melting temperature (via a hot gas source such as air or nitrogen); descending the retaining surface 42 with the flexible insulating film 30 toward the laminate structure 12 until at least one of the conductive pads 38 mounted on the flexible insulating film 30 comes into contact with one or more solder bumps 14 on the laminate structure 12 (see paragraphs [0021], [0022], [0023] and fig. 4); and retracting the retaining surface 42 with the flexible insulating film 30 when one or more of the solder bumps has melted and at least partially transferred onto the conductive pads 38 of the retaining surface 42 (see paragraph [0024] and fig. 5, note that, excess solder 15 partially transferred onto the conductive pads 38 and vias 32). PNG media_image1.png 597 875 media_image1.png Greyscale In re claim 2, as applied to claim 1 above, Weigler discloses wherein the method further comprising aligning the flexible insulating film 30 with a same pitch as the one or more solder bumps 14 to be extracted (see paragraph [0022] and fig. 4). In re claim 4, as applied to claim 1 above, Weigler discloses wherein the method further comprising repeating the descending and retracting of the retaining surface with the flexible insulating film until a residual solder amount remains on a plurality of die pads 18 on the laminate structure 12 on which the one or more solder bumps 14 were previously attached (see paragraph [0022] and figs. 4-5). In re claim 5, as applied to claim 4 above, Weigler discloses wherein the method further comprising controlling a volume of the solder bumps 14 transferred onto the conductive pads 38 based on a size of the conductive pads used and wetting the conductive pads prior to extracting the solder bumps 14 (see paragraphs [0020], [0022], [0023] and figs. 4-5). In re claim 6, as applied to claim 1 above, Weigler discloses wherein the method further comprising spatially varying a pitch of the conductive pads 38 on the flexible insulating film 30 to align with the pitch of the one or more solder bumps 14 (see paragraph [0022] and fig. 4). In re claim 7, as applied to claim 1 above, Weigler discloses detecting the conductive pads 38 on the flexible insulating film 30 are in contact with the one or more solder bumps 14 by a force feedback of the retaining surface 42 with the insulating film 30 (see paragraphs [0022], [0023] and fig. 4). In re claim 8, as applied to claim 1 above, Weigler discloses wherein the mounting of the flexible insulating film 30 on the retaining surface 42 includes applying a vacuum (see paragraph [0023] and figs. 4-5, via vacuum source 40). In re claim 11, as applied to claim 1 above, Weigler discloses wherein the method further comprising mechanically separating at least one chip 10 from the laminate structure 12 (see paragraphs [0017], [0018] and figs. 1-2) prior to redressing the laminate structure 12 (see paragraphs [0019], [0020], [0022], [0023] and figs. 3-5). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 12, 15, 16, 17, 19, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Weigler et al. (U.S. Pub. 2005/0087588) in view of Dobriyal et al. (U.S. Pub. 2018/0070456). In re claim 12, Weigler discloses a device that redresses a multichip laminate structure, perform acts comprising depositing conductive pads 38 on a flexible insulating film 30 (see paragraph [0019] and fig. 3, note that element 30 is made of a thin flexible material such as FR4); mounting the flexible insulating film 30 on a retaining surface 42 (see paragraph [0023] and fig. 4); heating the retaining surface 42 to a temperature above a solder melting temperature (via a hot gas source such as air or nitrogen); descending the retaining surface 42 toward the laminate structure 12 until at least one of the conductive pads 38 mounted on the flexible insulating film 30 comes into contact with one or more solder bumps 14 on the laminate structure 12 (see paragraphs [0021], [0022], [0023] and fig. 4); and retracting the retaining surface 42 when one or more of the solder bumps has melted and at least partially transferred onto the conductive pads 38 on the flexible insulating film 30 (see paragraph [0024] and fig. 5, note that, excess solder 15 partially transferred onto the conductive pads 38 and vias 32). Weigler is silent to that the device comprising a processor, a storage device coupled to the processor, the storage device storing instructions to cause the processor to perform acts. However, Dobriyal discloses in a same field of endeavor, a device that redresses (reworks) a multichip laminate structure (see paragraphs [0040], [0045]), including, inter-alia, a processor 604, a storage device 654 coupled to the processor 604, the storage device 654 storing instructions to cause the processor 604 to perform acts (see paragraphs [0060], [0062], [0062] and fig. 6). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Dobriyal into the device that redresses the multichip laminate structure of Weigler in order to enable the device comprising a processor, a storage device coupled to the processor, the storage device storing instructions to cause the processor to perform acts in Weigler to be formed because Dobriyal suggested that it is well-known in the art to use a storage device storing instructions to cause the processor to perform the steps that redresses the multichip laminate structure. Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id. In re claim 15, as applied to claim 12 above, Weigler in combination with Dobriyal discloses wherein the conductive pads 38 comprise copper pads (see paragraph [0020] of Weigler). In re claim 16, as applied to claim 12 above, Weigler in combination with Dobriyal discloses wherein the instructions cause the processor to perform an additional act comprising aligning the flexible insulating film 30 with a same pitch as the one or more solder bumps 14 to be extracted (see paragraphs [0019], [0022] and figs. 3-5 of Weigler). In re claim 17, as applied to claim 12 above, Weigler in combination with Dobriyal discloses wherein the instructions cause the processor to perform additional acts comprising repeating the descending of the retaining surface until contact is made between at least one of the conductive pads 38 and the one or more solder bumps 14 and retracting the retaining surface when one or more of the solder bumps has melted (see paragraphs [0019], [0022] [0024] and figs. 3-5 of Weigler). In re claim 19, as applied to claim 12 above, Weigler in combination with Dobriyal discloses wherein the instructions cause the processor to perform additional acts comprising spatially varying a pitch of the conductive pads 38 on the flexible insulating film 30 to align with the pitch of the one or more solder bumps 14 (see paragraphs [0019], [0022], [0024] and figs. 3-5 of Weigler). In re claim 20, as applied to claim 12 above, Weigler in combination with Dobriyal discloses wherein a volume of solder extracted from the one or more solder bumps based on a size of the conductive pads (see paragraphs [0020], [0022], [0023] and figs. 3-5). Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Weigler et al. (U.S. Pub. 2005/0087588), as applied to claim 1 above, and further in view of Oka et al. (U.S. Pub. 2021/0288021). In re claim 3, as applied to claim 1 above, Weigler is silent to wherein the retaining surface in the descending and retracting operations is a Thermal Compression Bonding (TCB) tool head. However, Oka disclose wherein the retaining surface in the descending and retracting operations is a Thermal Compression Bonding (TCB) tool head (see paragraph [0016]). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Oka into the device of Weigler in order to enable wherein the retaining surface in the descending and retracting operations is a Thermal Compression Bonding (TCB) tool head in Weigler to be performed in order to mitigate first-level interconnection misalignment (see paragraph [0011] of Oka). Claim(s) 9 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Weigler et al. (U.S. Pub. 2005/0087588), as applied to claim 1 above, and further in view of Kobayashi (U.S. Pub. 2008/0293189). In re claims 9 and 10, as applied to claim 1 above, Weigler is silent to wherein the method further comprising sweeping the partially transferred solder from the conductive pads after the retaining surface with the flexible insulating film is retracted from the laminate structure and further comprising sweeping one or more die pads on the laminate structure having residual solder after the one or more solder bumps has partially transferred to the conductive pads. However, Kobayashi discloses cleaning one or more die pads on the laminate structure having residual solder in order to enhance the reliability of the multi-chip laminate structure (see paragraph [0055]). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Kobayashi into the device of Weigler in order to enable the steps of sweeping the partially transferred solder from the conductive pads after the retaining surface with the flexible insulating film is retracted from the laminate structure and sweeping one or more die pads on the laminate structure having residual solder after the one or more solder bumps has partially transferred to the conductive pads in Weigler to be performed in order to enhance the reliability of the multi-chip laminate structure. Claim(s) 13 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Weigler et al. (U.S. Pub. 2005/0087588) in view of Dobriyal et al. (U.S. Pub. 2018/0070456), as applied to claim 12 above, and further in view of De Boer et al. (U.S. Pub. 2011/0254565). In re claims 13 and 14, as applied to claim 12 above, Weigler and Dobriyal are silent to wherein the flexible insulating film comprising a polyimide structure and wherein the polyimide structure comprises a Kapton® film. However, De Boer discloses wherein the flexible insulating film comprising a polyimide structure and wherein the polyimide structure comprises a Kapton® film (see paragraphs [0102], [0134], [0145]). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by De Boer into the device of Weigler in order to enable wherein the flexible insulating film comprising a polyimide structure and wherein the polyimide structure comprises a Kapton® film in Weigler to be formed since it has been held to be within the general skill of a worker in the art to select a known material on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Weigler et al. (U.S. Pub. 2005/0087588) in view of Dobriyal et al. (U.S. Pub. 2018/0070456), as applied to claim 12 above, and further in view of Oka et al. (U.S. Pub. 2021/0288021). In re claim 18, as applied to claim 12 above, Weigler discloses wherein the instructions cause the processor to perform additional acts comprising repeating the descending and retracting of the retaining surface until a residual solder amount remains on a plurality of die pads on the laminate structure on which the one or more solder bumps were previously attached (see paragraph [0022] and figs. 4-5) but is silent to wherein the retaining surface comprises a Thermal Compression Bonding (TCB) tool head. However, Oka disclose wherein the retaining surface in the descending and retracting operations is a Thermal Compression Bonding (TCB) tool head (see paragraph [0016]). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Oka into the device of Weigler in order to enable wherein the retaining surface comprises a Thermal Compression Bonding (TCB) tool head in Weigler to be formed in order to mitigate first-level interconnection misalignment (see paragraph [0011] of Oka). When the TCB tool head is applied in the device of Weigler, it follows that the repeating the descending and retracting is of descending and retracting of the TDB tool head until a residual solder amount remains on the plurality of die pads on the laminate structure. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Arvin et al. (U.S. Patent No. 7,781,232) discloses a method whereby a component in need of rework is located and removed from the module to reveal encapsulated solder connections residing within an underfill matrix. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHIEM D NGUYEN whose telephone number is (571)272-1865. The examiner can normally be reached Monday-Friday 8:00 AM - 6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KHIEM D NGUYEN/Primary Examiner, Art Unit 2892
Read full office action

Prosecution Timeline

Dec 12, 2023
Application Filed
Mar 06, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603626
MULTI-PHASE-BASED DOHERTY POWER AMPLIFIER METHOD AND APPARATUS
2y 5m to grant Granted Apr 14, 2026
Patent 12599329
Sense Amplifer For a Physiological Sensor and/or Other Sensors
2y 5m to grant Granted Apr 14, 2026
Patent 12599000
NON-VOLATILE MEMORY DEVICE INCLUDING FIRST AND SECOND MONITORING CHANNEL STRUCTURES AND NON-VOLATILE MEMORY SYSTEM COMPRISING THE SAME
2y 5m to grant Granted Apr 07, 2026
Patent 12599018
PACKAGE STRUCTURE WITH ENHANCEMENT STRUCTURE AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Apr 07, 2026
Patent 12592674
SELF-BIAS SIGNAL GENERATING CIRCUIT USING DIFFERENTIAL SIGNAL AND RECEIVER INCLUDING THE SAME
2y 5m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
98%
With Interview (+12.5%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 2187 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month