Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d) based upon an application filed in JAPAN on 12/21/2022.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/13/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The abstract of the disclosure is objected to because “A MEMS sensor” should read “A microelectro-mechanical systems (MEMS) sensor”.
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Objections
Claims 7, 8 and 9 are objected to because of the following informalities:
Claim 7, lines 11-12: “forming a sealing layer sealing the outer opening in the outer opening to close the outer opening with the sealing layer” should read “forming a sealing layer in the outer opening to close the outer opening with the sealing layer”.
Claim 8, lines 7-8: “the at least one of the spaces” should read “the at least one space” or “the space”.
Claim 9, line 6: “forming a sealing layer” should read “forming the sealing layer”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-10, 12 and 13 are rejected under 35 U.S.C. 102(a)(1) as being unpatentable over US20150351246A1; Xavier Baillin; (hereinafter “Baillin”).
Regarding Claim 1, Baillin teaches a MEMS sensor ([0001]), comprising:
a first substrate (#102, Figure 1A); and
a second substrate (#114) bonded to the first substrate ([0051]),
wherein at least one space (#110/#112), in which at least one sensor element (#104) is arranged, is formed inside at least one bonding portion where the first substrate and the second substrate are bonded (micro-devices #104 form in cavities #110 between bonded substrates),
wherein at least one communication path (#116) communicating the space (#110) with outside of the bonding portion ([0099]) is formed in the first substrate (Figures 8-9, #116 can alternatively form in #102),
wherein the communication path (Figure 1A-B, #116) includes an inner opening (#117A) opened toward inside of the bonding portion, an outer opening (#117B) opened toward outside of the bonding portion, and a tubular portion connecting the inner opening and the outer opening ([0101], channel #116 extends along the substrate connecting #117A and #117B), and
wherein the outer opening is closed by a sealing layer (#132/#140, Figures 2-3, [0102-0103]) sealing the outer opening.
Regarding Claim 2, Baillin teaches the MEMs sensor as described in claim 1, wherein Baillin further teaches the at least one space includes a plurality of spaces (Figures 1A, #110-112), the at least one sensor element includes a plurality of sensor elements (#104-106, [0005], each cavity #110-112 can contain two or more sensors), and the at least one bonding portion includes a plurality of bonding portions (Figure 1A, substrates #102 and #114 include bonding interfaces),
wherein the plurality of spaces (#110-112), in which the plurality of sensor elements are respectively arranged, are formed inside the plurality of bonding portions where the first substrate and the second substrate are bonded (#104-106 form in #110-112 between bonded substrates), and
wherein the at least one communication path (#116) communicating the at least one space (#110) with outside of the bonding portion ([0099]) is formed in the first substrate is formed in the first substrate (Figures 8-9).
Regarding Claim 3, Baillin teaches the MEMs sensor as described in claim 1, wherein Baillin further teaches the first substrate is a silicon substrate ([0098], #102 is silicon), and wherein the communication path (#116) is formed of silicon oxide ([0121]).
Regarding Claim 4, Baillin teaches the MEMs sensor as described in claim 3, wherein Baillin further teaches a protective layer (Figures 10A-C, layer #158/#160 of cover #114) protecting the communication path is formed on the communication path (#158/#160 disposes on channels #116)
Regarding Claim 5, Baillin teaches the MEMs sensor as described in claim 1, wherein Baillin further teaches the inner opening (#117A, Figures 8-9) and the outer opening (#117B) are formed on a front surface (#108) of the first substrate (#102), and
wherein the tubular portion (#116, [0101]) is formed inside the first substrate (#102).
Regarding Claim 6, Baillin teaches the MEMs sensor as described in claim 1, wherein Baillin further teaches the sealing layer is a metal layer ([0126], layer #132/#140 is metal).
Regarding Claim 7, Baillin teaches a method of manufacturing a MEMS sensor ([0079]), comprising:
preparing a first substrate (#102);
preparing a second substrate (#114) bonded to the first substrate;
bonding the second substrate to the first substrate ([0051]) to form at least one space (#110/#112), in which at least one sensor element (#104) is arranged, inside at least one bonding portion where the first substrate and the second substrate are bonded (#104 form in cavities #110 between bonded substrates);
forming a communication path (#116) communicating the space (#110) with outside of the bonding portion ([0099]) in the first substrate (Figures 8-9, #116 can alternatively form in #102), the communication path (Figure 1A-B, #116) including an inner opening (#117A) opened toward inside of the bonding portion, an outer opening (#117) opened toward outside of the bonding portion, and a tubular portion connecting the inner opening and the outer opening ([0101], channel #116 extends along the substrate connecting #117A and #117B); and
forming a sealing layer (#132/#140, Figures 2-3, [0102-0103]) sealing the outer opening in the outer opening (#117B) to close the outer opening with the sealing layer.
Regarding Claim 8, Baillin teaches the method as described in claim 7, wherein Baillin further teaches the at least one space includes a plurality of spaces (Figures 1A, #110-112), the at least one sensor element includes a plurality of sensor elements (#104-106, [0005], each cavity #110-112 can contain two or more sensors), and the at least one bonding portion includes a plurality of bonding portions (Figure 1A, substrates #102 and #114 include bonding interfaces),
wherein the plurality of spaces (#110-112) in which the plurality of sensor elements are respectively arranged are formed inside the plurality of bonding portions where the first substrate and the second substrate are bonded (#104-106 form in #110-112 between bonded substrates), and
wherein the at least one communication path (#116) communicating the at least one of the spaces (#110) with outside of the bonding portion ([0099]) is formed in the first substrate (#102, Figures 8-9).
Regarding Claim 9, Baillin teaches the method as described in claim 7, wherein Baillin further teaches forming a groove portion recessed from a front surface of the second substrate to face the outer opening outside the bonding portion in the second substrate (Figures 2-3, [0100], a recess forms in cover #114 facing the sealing layer #132/#140),
forming a communication hole (#120) communicating with the groove portion from a back surface of the second substrate in the second substrate (#120 forms in the recess of cover #114), and
forming a sealing layer (#132/#140) at the outer opening (#117B) from the back surface of the second substrate through the communication hole to close the outer opening with the sealing layer ([0102], #132 is deposited through hole #120 to plug channel #116).
Regarding Claim 10, Baillin teaches the method as described in claim 9, wherein Baillin further teaches the back surface of the second substrate is cut to form the communication hole in the second substrate ([0121-0122], instead of photolithography and etching, parts of cover #114 can be alternatively cut).
Regarding Claim 12, Baillin teaches the method as described in claim 7, wherein Baillin further teaches a trench corresponding to the communicating path is formed in the first substrate (Figures 7A-9, [0137], channel #116 forms in an etched portion of substrate #102), and a thermal oxide film is formed on an inner surface of the trench (Figures 7A-9, [0109], entire surfaces of the second substrate/cover #114 can be thermal oxidized to form SiO-2 layer which include a surface of channel #116) to form the communicating path in the first substrate (#102).
Regarding Claim 13, Baillin teaches the method as described in claim 12, wherein Baillin further teaches the trench (#116) is formed such that both end portions of the trench corresponding to the inner opening (#117A) and the outer opening (#117B) of the communication path have a larger groove width than a central portion between the both end portions in a plan view (Figures 10B, at least openings #117A and #117B corresponding to holes #120 and #164 has larger widths than channel #116, see also Figures 1B or 7B).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Baillin in view of US20110147859A1; Tanaka et al.; (hereinafter “Tanaka”).
Regarding Claim 11, Baillin teaches the method as described in claim 9.
Baillin does not explicitly teaches the back surface of the second substrate is ground to form the communication hole in the second substrate.
However, Tanaka teaches a method of manufacturing a comparable MEMs sensor ([0031] or [0224]), wherein the back surface of the second substrate is ground to form the communication hole in the second substrate (Figures 25C-D, [0218], cap substrate #C9 is grinded to form grooves #38).
It would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to modify the invention disclosed by Baillin with the teaching of Tanaka, as it would be a simple substitution of one known element (methods of Baillin, such as photolithography and etching or cutting) for another (grinding method of Tanaka) in comparable structures to obtain predictable results (formation of communication holes in a second/cap substrate). See MPEP 2143(I)(B)
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US20200198966A1 – Figures 2e and 3
CN113636522A – Figures 3-4 and 7
US20240083743A1 – Figures 3, 6 and 9-10
US20200180947A1 – Figures 1-2
US20180148322A1 – Figure 8 and [0043]
US20230166964A1 – Figure 1
US20160130137 – Figure 3
US20170203957A1 – Figure 4
T. Aono et al., "Wafer-level two-step bonding process for combined sensor with two different pressure chambers," 2011 16th International Solid-State Sensors, Actuators and Microsystems Conference, Beijing, China, 2011, pp. 382-385, doi: 10.1109/TRANSDUCERS.2011.5969480. Accessed 18 Feb. 2026
Liang, Kai-Chih, and Weileun Fang. “Design and Implementation of Monolithically Integrated Sealed and Unsealed Chambers by Using the Wafer Level Packaging.” Journal of Micromechanics and Microengineering, vol. 29, no. 9, 8 July 2019, p. 095008, https://doi.org/10.1088/1361-6439/ab2b8f. Accessed 18 Feb. 2026
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/TIEN TRAN/Examiner, Art Unit 2812
/CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812