Prosecution Insights
Last updated: October 02, 2026
Application No. 18/538,105

MEMS SENSOR AND METHOD OF MANUFACTURING MEMS SENSOR

Final Rejection §103
Filed
Dec 13, 2023
Priority
Dec 21, 2022 — JP 2022-204811
Examiner
TRAN, TIEN
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co., Ltd.
OA Round
2 (Final)
92%
Grant Probability
Favorable
3-4
OA Rounds
4m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
24 granted / 26 resolved
+24.3% vs TC avg
Moderate +10% lift
Without
With
+10.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
29 currently pending
Career history
48
Total Applications
across all art units

Statute-Specific Performance

§101
2.2%
-37.8% vs TC avg
§103
66.5%
+26.5% vs TC avg
§102
19.6%
-20.4% vs TC avg
§112
8.4%
-31.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 26 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-10 are rejected under 35 U.S.C. 103 as being unpatentable over US20150351246A1; Xavier Baillin; (hereinafter “Baillin”) in view of US20130221495A1; Wong et al.; (hereinafter “Wong”). Regarding Claim 1, Baillin teaches a MEMS sensor ([0001]), comprising: a first substrate (#102, Figure 1A); and a second substrate (#114) bonded to the first substrate ([0051]), wherein at least one space (#110/#112), in which at least one sensor element (#104) is arranged, is formed inside at least one bonding portion where the first substrate and the second substrate are bonded (micro-devices #104 form in cavities #110 between bonded substrates), wherein at least one communication path (#116) communicating the space (#110) with outside of the bonding portion ([0099]) is formed in the first substrate (Figures 8-9, #116 can alternatively form in #102), wherein the communication path (Figure 1A-B, #116) includes an inner opening (#117A) opened toward inside of the bonding portion, an outer opening (#117B) opened toward outside of the bonding portion, and a tubular portion connecting the inner opening and the outer opening ([0101], channel #116 extends along the substrate connecting #117A and #117B), wherein a trench corresponding to the communicating path is formed in the first substrate (Figures 7A-9, [0137], channel #116 forms in an etched portion of substrate #102), and a thermal oxide film is formed on an inner surface of the trench ([0109], a SiO-2 layer formed by thermal oxidation covers an inner surface of the trench #116), wherein the trench (#116, Figure 7B) is formed such that both end portions (#117A-B) of the trench correspond to the inner opening (#117A) and the outer opening (#120) of the communication path, the end portion of the trench corresponding to the outer opening (#120) has a larger groove width than a central portion between both end portions of the communication path in a plan view (hole #120 has larger width than channel #116), and wherein the outer opening is closed by a sealing layer (#132/#140, Figures 2-3, [0102-0103]) sealing the outer opening. Baillin does not explicitly teaches both end portions of the trench have a larger groove width than a central portion between the both end portions in a plan view, the thermal oxide film formed on the inner surface of the trench forms the communication path in the first substrate, wherein a portion of the tubular portion corresponding to the central portion of the trench is formed in a shape of closed cross-section by a portion of the thermal oxide film corresponding to the central portion of the trench, and portions of the tubular portion corresponding to the both end portions of the trench are formed open by portions of the thermal oxide film corresponding to the both end portions of the trench. However, Wong teaches a formation of microchannel in silicon substrate ([0003]), wherein both end portions of a trench have a larger groove width than a central portion between the both end portions in a plan view (Figure 1-3, [0030-0034], reservoirs #106 have larger diameter/width than central portion of buried microchannel #302), a thermal oxide film formed on the inner surface of the trench (Figure 7, [0052-0053], oxide film #702 formed by thermal oxidation on interior walls of microchannel #502) forms the communication path in a first substrate (#102, silicon substrate), wherein a portion of the tubular portion corresponding to the central portion of the trench is formed in a shape of closed cross-section by a portion of the thermal oxide film corresponding to the central portion of the trench (Figures 4 and 7, central portion of the microchannel #502 is enclosed by the thermal oxide film #702), and portions of the tubular portion corresponding to the both end portions of the trench are formed open by portions of the thermal oxide film corresponding to the both end portions of the trench (both ends of microchannel #502 enclosed by thermal oxide film #702 correspond to openings/reservoirs #602). It would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to modify the invention disclosed by Baillin with the teaching of Wong in order to facilitate precise and better control of the diameter of microchannel in the substrate to achieve desirable thickness according to Wong, [0038] & [0051-0052]. Regarding Claim 2, Baillin in view of Wong teaches the MEMs sensor as described in claim 1, wherein Baillin further teaches the at least one space includes a plurality of spaces (Figures 1A, #110-112), the at least one sensor element includes a plurality of sensor elements (#104-106, [0005], each cavity #110-112 can contain two or more sensors), and the at least one bonding portion includes a plurality of bonding portions (Figure 1A, substrates #102 and #114 include bonding interfaces), wherein the plurality of spaces (#110-112), in which the plurality of sensor elements are respectively arranged, are formed inside the plurality of bonding portions where the first substrate and the second substrate are bonded (#104-106 form in #110-112 between bonded substrates), and wherein the at least one communication path (#116) communicating the at least one space (#110) with outside of the bonding portion ([0099]) is formed in the first substrate is formed in the first substrate (Figures 8-9). Regarding Claim 3, Baillin in view of Wong teaches the MEMs sensor as described in claim 1, wherein Baillin further teaches the first substrate is a silicon substrate ([0098], silicon substrate #102), and wherein the communication path (#116) is formed of silicon oxide ([0121]). Regarding Claim 4, Baillin in view of Wong teaches the MEMs sensor as described in claim 3, wherein Baillin further teaches a protective layer (Figures 10A-C, layer #158/#160 of cover #114) protecting the communication path is formed on the communication path (#158/#160 disposes on channels #116) Regarding Claim 5, Baillin in view of Wong teaches the MEMs sensor as described in claim 1, wherein Baillin further teaches the inner opening (#117A, Figures 8-9) and the outer opening (#117B) are formed on a front surface (#108) of the first substrate (#102), and wherein the tubular portion (#116, [0101]) is formed inside the first substrate (#102). Regarding Claim 6, Baillin in view of Wong teaches the MEMs sensor as described in claim 1, wherein Baillin further teaches the sealing layer is a metal layer ([0126], layer #132/#140 is metal). Regarding Claim 7 (currently amended), Baillin teaches a method of manufacturing a MEMS sensor ([0079]), comprising: preparing a first substrate (#102, Figure 1A); preparing a second substrate (#114) bonded to the first substrate; bonding the second substrate to the first substrate ([0051]) to form at least one space (#110/#112), in which at least one sensor element (#104) is arranged, inside at least one bonding portion where the first substrate and the second substrate are bonded (#104 form in cavities #110 between bonded substrates); forming a trench (#116) in the first substrate (#102); forming a communication path (#116), which communicates the space (#110) with outside of the bonding portion ([0099]) in the first substrate (Figures 8-9, #116 can alternatively form in #102), the communication path (Figure 1A-B, #116) and includes an inner opening (#117A) opened toward inside of the bonding portion, an outer opening (#117) opened toward outside of the bonding portion, and a tubular portion connecting the inner opening and the outer opening ([0101], channel #116 extends along the substrate connecting #117A and #117B); and forming a sealing layer (#132/#140, Figures 2-3, [0102-0103]) in the outer opening (#117B) to close the outer opening with the sealing layer. Baillin does not explicitly teaches both end portions of the trench have a larger groove width than a central portion of the trench between the both end portions of the trench in a plan view, forming the communication path by forming a thermal oxide film on an inner surface of the trench such that the tubular portion is formed in a shape of closed cross-section by a portion of the thermal oxide film corresponding to the central portion of the trench, and the inner opening and the outer opening are formed open by portions of the thermal oxide film corresponding to the both end portions of the trench. However, Wong teaches a formation of microchannel in silicon substrate ([0003]), wherein both end portions of a trench have a larger groove width than a central portion of the trench between the both end portions of the trench in a plan view (Figure 1-3, [0030-0034], openings/reservoirs #106 have larger diameter/width than a central portion of buried microchannel #302), forming the communication path by forming a thermal oxide film on an inner surface of the trench (Figure 7, [0052-0053], oxide film #702 formed by thermal oxidation on interior walls of microchannel #502) such that the tubular portion is formed in a shape of closed cross-section by a portion of the thermal oxide film corresponding to the central portion of the trench (Figures 4 and 7, central portion of the microchannel #502 is enclosed by the thermal oxide film #702), and the inner opening and the outer opening are formed open by portions of the thermal oxide film corresponding to the both end portions of the trench (both ends of microchannel #502 enclosed by thermal oxide film #702 correspond to openings/reservoirs #602). It would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to modify the invention disclosed by Baillin with the teaching of Wong in order to facilitate precise and better control of the diameter of microchannel in the substrate to achieve desirable thickness according to Wong, [0038] & [0051-0052]. Regarding Claim 8 (currently amended), Baillin in view of Wong teaches the method as described in claim 7, wherein Baillin further teaches the at least one space includes a plurality of spaces (Figures 1A, #110-112), the at least one sensor element includes a plurality of sensor elements (#104-106, [0005], each cavity #110-112 can contain two or more sensors), and the at least one bonding portion includes a plurality of bonding portions (Figure 1A, substrates #102 and #114 include bonding interfaces), wherein the plurality of spaces (#110-112) in which the plurality of sensor elements are respectively arranged are formed inside the plurality of bonding portions where the first substrate and the second substrate are bonded (#104-106 form in #110-112 between bonded substrates), and wherein the at least one communication path (#116) communicating at least one of the plurality of spaces (#110) with outside of the bonding portion ([0099]) is formed in the first substrate (#102, Figures 8-9). Regarding Claim 9 (currently amended), Baillin in view of Wong teaches the method as described in claim 7, wherein Baillin further teaches forming a groove portion recessed from a front surface of the second substrate to face the outer opening outside the bonding portion in the second substrate (Figures 2-3, [0100], a recess forms in cover #114 facing the sealing layer #132/#140), forming a communication hole (#120) communicating with the groove portion from a back surface of the second substrate in the second substrate (#120 forms in the recess of cover #114), and forming the sealing layer (#132/#140) at the outer opening (#117B) from the back surface of the second substrate through the communication hole to close the outer opening with the sealing layer ([0102], #132 is deposited through hole #120 to plug channel #116). Regarding Claim 10, Baillin in view of Wong teaches the method as described in claim 9, wherein Baillin further teaches the back surface of the second substrate is cut to form the communication hole in the second substrate ([0121-0122], instead of photolithography and etching, parts of cover #114 can be alternatively cut). Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Baillin in view of Wong, and further in view of US20110147859A1; Tanaka et al.; (hereinafter “Tanaka”). Regarding Claim 11, Baillin in view of Wong teaches the method as described in claim 9. Baillin in view of Wong does not explicitly teaches the back surface of the second substrate is ground to form the communication hole in the second substrate. However, Tanaka teaches a method of manufacturing a comparable MEMs sensor ([0031] or [0224]), wherein the back surface of the second substrate is ground to form the communication hole in the second substrate (Figures 25C-D, [0218], cap substrate #C9 is grinded to form grooves #38). It would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to modify the invention disclosed by Baillin with the teaching of Tanaka, as it would be a simple substitution of one known element (methods of Baillin, such as photolithography and etching or cutting) for another (grinding method of Tanaka) in comparable structures to obtain predictable results (formation of communication holes in a second/cap substrate). See MPEP 2143(I)(B). Response to Arguments/Amendments Applicant's amendment to the abstract, page 7 of the remarks, filed 06/04/2026, with respect to objection of the abstract has been fully considered. Accordingly, the objection has been withdrawn. Applicant's amendments to claims 7-9, page 7 of the remarks, with respect to objections of the claims have been fully considered. Accordingly, the objections have been withdrawn. Applicant's amendments to claims 1 and 7 and corresponding arguments, pages 7-14 of the remarks, with respect to 35 U.S.C 102(a)(1) rejections of claims 1 and 7 as unpatentable over Baillin have been fully considered and are persuasive. Hence, the rejections have been withdrawn. However, upon further consideration, a new ground(s) of rejection is made under 35 U.S.C. 103 as being unpatentable over Baillin in view of Wong. Wong has been introduced in view of the amendments to claims 1 and 7 (see 35 U.S.C. 103 rejections of claims 1 and 7 above). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. US20200180947A1 – Figures 1-3, [0064-0066], channel structure comprises oxide layer with hollow core area for diffusion path. US20200299128A1 – Figures 4A-F, 6 and [0063], insulating film formed by thermal oxidation in a recess of a first substrate. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIEN TRAN whose telephone number is (571)272-6967. The examiner can normally be reached Monday-Thursday 9:00 am - 6:00 pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHRISTINE S KIM can be reached on (571)272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TIEN TRAN/Examiner, Art Unit 2812 /CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812
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Prosecution Timeline

Dec 13, 2023
Application Filed
Mar 05, 2026
Non-Final Rejection mailed — §103
Jun 04, 2026
Response Filed
Aug 11, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
92%
Grant Probability
99%
With Interview (+10.5%)
3y 2m (~4m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 26 resolved cases by this examiner. Grant probability derived from career allowance rate.

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