Prosecution Insights
Last updated: October 02, 2026
Application No. 18/538,445

WAFER EVALUATION METHOD, WAFER PRODUCTION METHOD AND DEVICE PRODUCTION METHOD

Final Rejection §103
Filed
Dec 13, 2023
Priority
Dec 15, 2022 — JP 2022-200111
Examiner
FRANK, RODNEY T
Art Unit
2855
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
RESONAC Corporation
OA Round
2 (Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
76%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
675 granted / 928 resolved
+4.7% vs TC avg
Minimal +4% lift
Without
With
+3.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
25 currently pending
Career history
947
Total Applications
across all art units

Statute-Specific Performance

§101
4.9%
-35.1% vs TC avg
§103
46.7%
+6.7% vs TC avg
§102
17.9%
-22.1% vs TC avg
§112
26.8%
-13.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 928 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3 and 5-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nishida et al. (U.S. Patent Application Publication Number 2015/0267296; hereinafter referred to as Nishida), and further in view of Ma et al. (U.S. Patent Application Publication Number 2004/0206891; hereinafter referred to as Ma.) With respect to claim 1, Nishida discloses and illustrates a wafer evaluation method, comprising: installing a SiC wafer or a SiC epitaxial wafer (200) on a porous plate having a plurality of through holes (see at least Figures 3 – 8) ; installing a lid on a second surface opposite to a first surface of the SiC wafer or the SiC epitaxial wafer (203) with an O-ring (221) therebetween; supplying a gas into a space surrounded by the second surface (gas supply pipes 232a-d), the O-ring and the lid and pressurizing the inside of the space (see at least paragraph [0074] of Nishida); and measuring the pressure in the space after a certain period has elapsed (pressure sensor 245). Nishida however fails to disclose inspecting whether there is a threading defect in the SiC wafer or the SiC epitaxial wafer. However, Ma discloses that “Reflective light source 11 is disposed adjacent to scanning plate 16 so that light is reflected from reflective light source 11 onto wafer 14 and received by CCD 12. Distortions of the reflective light are caused by defects in the wafer, especially the epitaxial layer, and recorded by the CCD. Therefore, the defects can be identified through distortions of the reflective light.” (See Ma paragraph [0021]). Therefore, it would have been obvious to one skilled in the art at the time the invention was filed to utilize the wafer threaded defect identification process of Ma with the system of Nishidain order to have an effective and improved method to identify defects in the wafer surface. With respect to claim 2, while the wafer evaluation method according to claim 1, wherein the initial pressure in the space immediately after the gas is supplied is 0.2 MPa or more is disclosed in at least paragraph [0239] of Nishida. With respect to claim 3, the wafer evaluation method according to claim 1, wherein the initial pressure in the space immediately after the gas is supplied is 0.3 MPa or less is disclosed in at least paragraph [0239] of Nishida. With respect to claim 5, the wafer evaluation method according to claim 1, wherein the O-ring has an inner diameter of 80 mm or less is best illustrated in Figures 1 and 3 of Nishida. With respect to claim 6, the wafer evaluation method according to claim 1, wherein the wafer is the SiC wafer is disclosed in at least paragraph [0182]. With respect to claim 7, the wafer evaluation method according to claim 1, wherein the wafer is the SiC epitaxial wafer is disclosed in at least paragraph [0182]. With respect to claim 8, a wafer production method, comprising an evaluation process using the wafer evaluation method according to claim 1 is deemed as disclosed as there is nothing in claim 7 that is not in claim 1 above, and thus the same rejection would apply here. With respect to claim 9, while Nishida does not quite disclose the wafer production method according to claim 8, further comprising an image screening process for checking whether there is the threading defect, wherein the image screening process is performed before the evaluation process. However, Ma discloses an image screening process. Therefore, it would have been obvious to one skilled in the art at the time the invention was filed to utilize the wafer threaded defect imaging process of Ma with the system of Nishidain order to have an effective and improved method to identify defects in the wafer surface. With respect to claim, 10 while Nishida does not quite disclose the wafer production method according to claim 9, wherein the evaluation process includes a screening process for screening a wafer having the threading defect with an area of larger than 0 µm² and 182 µm² or less when itis determined that there is the threading defect in the image screening process. However, Ma discloses an image screening process. Therefore, it would have been obvious to one skilled in the art at the time the invention was filed to utilize the wafer threaded defect imaging process of Ma with the system of Nishidain order to have an effective and improved method to identify defects in the wafer surface. With respect to claim 11, a device production method, comprising an evaluation process using the wafer evaluation method according to claim 1; and a device producing processing which a device is produced using the wafer selected by the wafer evaluation method is deemed as disclosed as claim 11 is essentially claim 1 above. Therefore, it would have been obvious to one skilled in the art at the time the invention was filed to produce a device with the wafer produced in claim 1 as wafers are typically used in various devices in order to better manufacture various electronics and components in a compact manner. With respect to claim 12, while Nishida does not quite disclose the device production method according to claim 11, further comprising an image screening process for checking whether there is the threading defect, wherein the image screening process is performed before the evaluation process. However, Ma discloses an image screening process. Therefore, it would have been obvious to one skilled in the art at the time the invention was filed to utilize the wafer threaded defect imaging process of Ma with the system of Nishidain order to have an effective and improved method to identify defects in the wafer surface. With respect to claim 13, while Nishida does not quite disclose the device production method according to claim 12, further comprising, wherein the evaluation process includes a screening process for screening a wafer having the threading defect with an area of larger than 0 µm² and 182 µm² or less in the evaluation process when it is determined that there is the threading defect in the image screening process, and wherein, in the device producing process, a device is produced using a wafer having the threading defect with an area of larger than 0 µm² and 182 µm² or less. However, Ma discloses an image screening process. Therefore, it would have been obvious to one skilled in the art at the time the invention was filed to utilize the wafer threaded defect imaging process of Ma with the system of Nishidain order to have an effective and improved method to identify defects in the wafer surface. Allowable Subject Matter Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to suggest, disclose, or show to be obvious the wafer evaluation method according to claim 1, wherein, when the difference between the initial pressure in the space immediately after the gas is supplied and the holding pressure in the space after a certain period has elapsed is more than 1/100 of the initial pressure, it is determined that there is the threading defect. Response to Arguments Applicant's arguments filed 23 June 2026 have been fully considered but they are not persuasive. The first issue raised by the Applicant is that Nishida is directed to pressure management during processing in a film-forming apparatus, and the disclosed pressure measurement is used solely for process and equipment control. Nishida does not teach or suggest using pressure decay or pressure behavior as a criterion for determining the presence of through-wafer defects, nor does it teach any relationship between pressure change and defect evaluation. The Examiner's inference that Nishida constitutes a wafer evaluation method merely because a pressure sensor is present represents an unsupported technical leap - measuring pressure is not equivalent to evaluating through defects based on pressure variation. The Examiner disagrees since the claims must be given their broadest reasonable interpretation in light of the specification and the court explained that "reading a claim in light of the specification, to thereby interpret limitations explicitly recited in the claim, is a quite different thing from ‘reading limitations of the specification into a claim,’ to thereby narrow the scope of the claim by implicitly adding disclosed limitations which have no express basis in the claim." (See MPEP § 2111). In this case, the claim only requires that a pressure measurement is taken after a time has elapsed, and then an inspection for a threading defect is performed. The claim as written does not require the pressure measurement to be used for the threading defect inspection, which is what the Applicant is arguing. Therefore, the applicant’s argument of a pressure measurement used o determine a threading defect is not persuasive as that is not what is actually claimed. The second issue raised by the Applicant is that Ma relies on a fundamentally different defect-detection principle, namely optical inspection techniques. Ma does not involve pressurization, gas leakage, or pressure decay, and therefore provides no teaching that would allow Nishida's pressure measurement to be repurposed for defect determination. As such, the proposed combination amounts to nothing more than a hindsight-driven aggregation of unrelated teachings, and does not provide a reasonable expectation of success that pressure measurement in Nishida could be used to detect through defects as claimed. The Examiner disagrees since the claims must be given their broadest reasonable interpretation in light of the specification and the court explained that "reading a claim in light of the specification, to thereby interpret limitations explicitly recited in the claim, is a quite different thing from ‘reading limitations of the specification into a claim,’ to thereby narrow the scope of the claim by implicitly adding disclosed limitations which have no express basis in the claim." (See MPEP § 2111) and in response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, any judgment on obviousness is in a sense necessarily a reconstruction based on hindsight reasoning, but so long as it takes into account only knowledge which was within the level of ordinary skill in the art at the time the claimed invention was made and does not include knowledge gleaned only from applicant’s disclosure, such a reconstruction is proper (See MPEP § 2145). In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., pressure measurement to be repurposed for defect determination) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Further, Applicant’s claims 9 and 12 recite imaging in order to detect defects, thus the use of an optical defect determination, as disclosed in ma would be deemed as reasonable. For at least these reasons, the Applicant’s arguments are not deemed to be persuasive. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RODNEY T FRANK whose telephone number is (571)272-2193. The examiner can normally be reached M-F 9am-5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Peter Macchiarolo can be reached at (571) 272-2375. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. RODNEY T. FRANK Examiner Art Unit 2855 /PETER J MACCHIAROLO/Supervisory Patent Examiner, Art Unit 2855 July 27, 2026
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Prosecution Timeline

Dec 13, 2023
Application Filed
Mar 25, 2026
Non-Final Rejection mailed — §103
Jun 23, 2026
Response Filed
Jul 30, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
76%
With Interview (+3.6%)
3y 1m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 928 resolved cases by this examiner. Grant probability derived from career allowance rate.

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