Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-6 in the reply filed on June 23, 2026 is
acknowledged. Claims 7-8 and 9 are withdrawn from examination.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/13/2023 is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 3-6 are rejected under 35 U.S.C. 103 as being unpatentable over Shi et al. (US 20100072585 A1) in view of Kato (JP 2010092918 A).
Regarding claim 1, Shi et al. teaches a semiconductor device (semiconductor device package 100), comprising:
a semiconductor element (semiconductor device 104) mounted on a lead frame (lead frame 102);
a bonding layer (conductive adhesive 117) formed on the semiconductor element; and
a lead electrode (metal sheet 108/110, conductive fingers 112/114/115/116, gate leads 107) including a main body plate (metal sheet 108/110) electrically connected to (FIG. 1D) an external electrode (gate lead 107), and a cantilevered plate (conductive finger 112/114) with one end being connected to the main body plate as a connection part ([0023], electrically connected), the cantilevered plate being cut from ([0025], punched from metal sheet) the main body plate,
wherein the cantilevered plate (conductive finger 112/114) is bent in a direction (FIG. 1D, inward toward) of the semiconductor element (semiconductor device 104) with respect to the main body plate (metal sheet 108/110), and has an other end (bottommost end contacting conductive adhesive 117) embedded in (FIG. 1D) the bonding layer (conductive adhesive 117).
Shi et al. does not teach wherein the bonding layer covers at least a part of an upper surface of the cantilevered plate.
However, Kato teaches a connection structure (Fig. 5b) wherein the cantilevered plate (32a) is bent in a direction of the semiconductor element (27) with respect to the main body plate (32), and has an other end embedded in the bonding layer (14), and the bonding layer covers at least a part of an upper surface of the cantilevered plate.
It would have been obvious to one of ordinary skill in the art before the effective filing date of
the claimed invention to have modified the cantilevered plate of Shi et al. to have a greater portion of the cantilever plate embedded in the bonding layer, as taught by Kato. Having the bonding layer helps improve bonding reliability and overall mechanical stability of device.
Regarding claim 3, Shi et al. in view of Kato teaches the semiconductor device according to claim 1. Shi et al. teaches wherein the cantilevered plate (conductive finger 112/114) has a step structure going from the one end (top end of 112/114 contacting metal sheet 108) toward the other end (bottom end of 112 contacting conductive adhesive 117).
Regarding claim 4, Shi et al. in view of Kato teaches the semiconductor device according to claim 1. Shi et al. teaches wherein the cantilevered plate has flexibility ([0025], conductive fingers may be punched from the metal sheet. Punch formation indicates flexibility in material).
Regarding claim 5, Shi et al. in view of Kato teaches the semiconductor device according to claim 4. Shi et al. teaches wherein the cantilevered plate (conductive fingers 112/114) comes in contact with the semiconductor element (semiconductor device 104) and becomes deformed ([0025], conductive fingers may be punched from the metal sheet. Punch formation indicates deformed structure).
Regarding claim 6, Shi et al. in view of Kato teaches the semiconductor device according to claim 1. Shi et al. teaches further comprising:
a casing (molding compound 118) housing (FIG. 1B) the semiconductor element (semiconductor device 104); and
the external electrode (gate lead 107) a part of which is supported by the casing and which is electrically connected to (FIG. 1D) the lead electrode (metal sheet 108/110, conductive fingers 112/114/115/116, gate leads 107).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Shi et al. (US 20100072585 A1) in view of Kato (JP 2010092918 A) and Takayama et al. (JP 2001357901 A).
Regarding claim 2, Shi et al. in view of Kato teaches the semiconductor device according to claim 1. While silent to a cantilevered plate, Takayama et al. teaches wherein a crimp terminal (10) includes a scale (17a of marks 17) on the upper surface (FIG. 1 and [0018], bottom surface portion 12).
It would have been obvious to one of ordinary skill in the art before the effective filing date of
the claimed invention to have incorporated scale markings as taught by Takayama et al. to the upper surface of the cantilevered plate of Shi et al., as modified by Kato. The scale markings in Takayama et al., while used to determine proper electrical connection crimping, still serve a shared purpose with the claimed invention for easier visual inspection without specialized equipment, and thus would have, in a similar manner, enabled verification of bonding layer thickness.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JEANNE M KIM whose telephone number is (571)272-8768. The examiner can normally be reached Monday-Thursday 8:00-6:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at (571) 270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JEANNE MYON KIM/Examiner, Art Unit 2898
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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