Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s amendment and arguments with respect to claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 112
The phrase “substantially monotonic” in claim 2 is a relative term which renders the claim indefinite. The term “substantially monotonic” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 9, 10 and 12 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Aronowitz (6033998).
Regarding claim 1, Aronowitz teaches a field effect transistor comprising:
a source (fig. 1c: 110);
a drain (fig. 1c: 112);
a semiconductor (please see channel between 110 and 112) extending between the source and the drain;
a gate (fig. 1c: 108) located over the semiconductor; and
a gate stack (fig. 2D: 206b) formed between the semiconductor and the gate, the gate stack including a dielectric layer abutting the semiconductor, and a diffusion barrier layer abutting the gate, the dielectric layer being an oxide and the diffusion barrier layer being a nitride, the gate stack including a gradient region between the dielectric layer and the diffusion barrier layer, the gradient region being an oxynitride (Aronowitz teaches that region 206b is on oxynitride having a composition which may be represented by the formula SiO.sub.x N.sub.y having a nitrogen concentration decreasing with depth; further, x may range from about 1 to 2 and y may range from about 0 to 1; further, it is taught that the oxynitrides which have been formed in the region 206b of the gate dielectric act as a barrier),
wherein the stoichiometry of the materials in the gradient region changes from the stoichiometry of the dielectric layer to the stoichiometry of the diffusion barrier layer (Aronowitz teaches that region 206b is on oxynitride having a composition which may be represented by the formula SiO.sub.x N.sub.y having a nitrogen concentration decreasing with depth).
Regarding claim 2, Aronowitz teaches a transistor of claim 1 wherein the change in stoichiometry in the gradient region is substantially monotonic (please see rejection for claim 1 above).
Regarding claim 3, Aronowitz teaches a transistor of claim 1 wherein the diffusion barrier layer also serves as an adhesion layer for the gate (based on the materials used, the layers will have adhesive properties).
Regarding claim 4, Aronowitz teaches a transistor of claim 1 wherein the materials in the gradient region have stoichiometric ratios in the form of XOiNj where X is a base material, Oi is the oxygen content and Nj is the nitrogen content, where i decreases as i increases (please see rejection for claim 1).
Regarding claim 9, Aronowitz teaches a gate stack for use in a field effect transistor having a source, a drain, a semiconductor connecting the source and the drain and having a gate located over the semiconductor (please see rejection for claim 1 above),
the qate stack comprising:
a dielectric material abutting the semiconductor, the dielectric material being an oxide (please see rejection for claim 1 above);
a diffusion barrier abutting the gate, the diffusion barrier being a nitride; and a gradient region between the dielectric material and the diffusion barrier, the gradient region comprising a graded transition between the dielectric material and the diffusion barrier to reduce stressed stress between the dielectric material and the diffusion barrier (please see rejection for claim 1 above).
Regarding claim 10, Aronowitz teaches a gate stack of claim 9 where the dielectric material has the form of XO, the diffusion barrier has the form XN and material of the gradient material region has the form XO,Nj, where i decreases as j increases in the gradient region, from a region adjacent the dielectric material to a region adjacent the diffusion barrier (please see rejection for claim 1 above).
Regarding claim 12, Aronowitz teaches a gate stack of claim 11 wherein the diffusion barrier also acts as an adhesion layer for the gate (based on the materials used, the layers will have adhesive properties).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yamazaki ( 20230317832).
Regarding claim 1, Yamazaki teaches a field effect transistor comprising:
a source (par. 168);
a drain (par. 168);
a semiconductor (fig. 2B: 230) extending between the source and the drain;
a gate (fig. 2B: 260) located over the semiconductor; and
a gate stack (fig. 2B: 222/224) formed between the semiconductor and the gate, the gate stack including a dielectric layer abutting the semiconductor, and a diffusion barrier layer abutting the gate, the dielectric layer being an oxide and the diffusion barrier layer being a nitride, the gate stack including a gradient region between the dielectric layer and the diffusion barrier layer, the gradient region being an oxynitride (par. 223-231),
wherein the stoichiometry of the materials in the gradient region changes from the stoichiometry of the dielectric layer to the stoichiometry of the diffusion barrier layer (par. 223-231).
Regarding claim 4, Yamazaki teaches a transistor of claim 1 wherein the materials in the gradient region have stoichiometric ratios in the form of XOiNj where X is [[the]] a base material, Oi is the oxygen content and Nj is the nitrogen content, where i decreases as i increases (par. 223-231).
Regarding claim 5, Yamazaki teaches a transistor of claim 4 wherein the base material X is hafnium (par. 223-231).
Regarding claim 6, Yamazaki teaches a transistor of claim 4 wherein the base material X is zirconium (par. 223-231).
Regarding claim 7, Yamazaki teaches a transistor of claim 1 wherein the semiconductor is tin oxide (par. 291).
Regarding claim 8, Yamazaki teaches a transistor of claim 1 wherein the semiconductor is IGZO (par. 292).
Regarding claim 9, Yamazaki teaches a gate stack for use in a field effect transistor having a source, a drain, a semiconductor connecting the source and the drain and having a gate located over the semiconductor (par. 168 and fig. 2B),
the qate stack comprising:
a dielectric material abutting the semiconductor, the dielectric material being an (par. 223-231);
a diffusion barrier abutting the gate, the diffusion barrier being a nitride; and a gradient region between the dielectric material and the diffusion barrier, the gradient region comprising a graded transition between the dielectric material and the diffusion barrier to reduce stressed stress between the dielectric material and the diffusion barrier (par. 223-231).
Regarding claim 10, Yamazaki teaches a gate stack of claim 9 where the dielectric material has the form of XO, the diffusion barrier has the form XN and material of the gradient material region has the form XO,Nj, where i decreases as j increases in the gradient region, from a region adjacent the dielectric material to a region adjacent the diffusion barrier (par. 223-231).
Regarding claim 11, Yamazaki teaches a gate stack of claim 10 wherein X is hafnium (par. 223-231).
Regarding claim 12, Yamazaki teaches a gate stack of claim 11 wherein the diffusion barrier also acts as an adhesion layer for the gate (based on the materials used, the layers will have adhesive properties).
Regarding claim 13, Yamazaki teaches a field effect transistor comprising:
a source (par. 168);
a drain (par. 168);
a semiconductor extending between the source and the drain, wherein the semiconductor is tin oxide (SnO2) (par. 291);
a gate (fig. 2B: 260);
a gate dielectric adjacent the semiconductor, wherein the gate dielectric is an oxide of a metal (par. 223-231);
a diffusion barrier proximate to the gate, wherein the diffusion barrier is a nitride of the metal (par. 223-231);
a gradient region between and adjacent the gate dielectric and the diffusion barrier, wherein the gradient region includes the metal, oxygen, and nitrogen and has a graduated composition that decreases in oxygen and increases in nitrogen from the gate dielectric to the diffusion barrier (par. 223-231).
Regarding claim 14, Yamazaki teaches a transistor of claim 13, wherein gate dielectric is hafnium oxide (HfO2) and the diffusion barrier is hafnium nitride (HfN) (par. 223-231).
Regarding claim 15, Yamazaki teaches a transistor of claim 13, wherein gate dielectric is zirconium oxide (ZrO2) and the diffusion barrier is zirconium nitride (ZrN) (par. 223-231).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri.
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/CALEB E HENRY/Primary Examiner, Art Unit 2818
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