CTNF 18/540,372 CTNF 100149 DETAILED ACTION This Office action responds to the application filed on 12/14/2023. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis ( i.e. , changing from AIA to pre-AIA) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Drawings 06-36 AIA The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the limitation “a gate electrode disposed in a portion of the semiconductor layer where the emission area is positioned,” in lines 5-6 of claim 17 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. 07-34-05 AIA Claim 14 recites the limitation " the subpixel " in line 3 . There is insufficient antecedent basis for this limitation in the claim. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-9, 12-16 & 18 are rejected under 35 U.S.C. 103 as being unpatentable over Shin (US 20190198819) in view of Kim (US 20170186823) . Regarding Claim 1, Shin (see, e.g., fig. 4, fig. 5, annotated figure 5) shows a display device, comprising: a substrate SUB1 (see, e.g., para.0039) including an emission area EP (see, e.g., para.0050) and a non-emission area (surrounding EP, see, e.g., annotated figure 5) ; a thin film transistor TFT (including elements BUF, GI, & ILD, see, e.g., para.0041-0044) disposed on the substrate; a passivation layer PAS (see. e.g., para.0046) covering an upper portion of the thin film transistor; an overcoat layer OC1 & OC2 (see, e.g., para.0046, para.0055) disposed on the passivation layer and having a slit or through hole (hereinafter labeled as “SL”, see, e.g., annotated figure 5) recessed toward the passivation layer; and a bank layer BNK (see, e.g., para.0048) disposed on the overcoat layer and having a shape corresponding to the slit or through hole of the overcoat layer, so as to form a protrusion (hereinafter labeled as “BNKP”, see, e.g., annotated figure 5) positioned in the slit or through hole. Shin, however, fails to show a black bank layer. Kim (see, e.g. , fig. 6, para.0070-0071), in a similar device to Shin, teaches that a black bank layer 290 would absorb light and prevent unwanted scatter of light to adjacent light emission areas. It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the black bank layer of Kim in the device of Shin to absorb light and prevent unwanted scatter of light to adjacent light emission areas. Regarding Claim 2, Shin, in view of Kim (see, e.g. , fig. 6, annotated figure 6, para.0070-0071), shows the device of claim 1, wherein external light incident ③ (light emitted by the adjacent emission areas) on the emission area is absorbed by the protrusion of the black bank layer (290 of Kim, corresponding to BNKP of Shin, see, e.g., annotated figure 6, para.0070-0071) . Regarding Claim 3, Shin (see, e.g., fig. 5, para.0048), in view of Kim, shows the display device of claim 1, wherein the black bank layer is separated at the emission area, as a boundary, to form an opening OP (see, e.g., fig. 5) . Regarding Claim 4, Shin (see, e.g., fig. 5, annotated figure 5), in view of Kim, shows the display device of claim 3, wherein the slit or through hole of the overcoat layer SL is disposed between the opening OP and the thin film transistor TFT (including elements BUF, GI, & ILD, see, e.g., annotated figure 5) . Regarding Claim 5, Shin (see, e.g., fig. 5, annotated figure 5), in view of Kim, shows the display device of claim 3, wherein the slit or through hole of the overcoat layer SL is disposed between the opening and the thin film transistor, and has a portion overlapping the thin film transistor (vertical direction overlap, see, e.g., annotated figure 5) . Regarding Claim 6, Shin (see, e.g., annotated figure 5), in view of Kim, shows the display device of claim 3, wherein the slit or through hole of the overcoat layer SL is formed to have a structure surrounding the thin film transistor adjacent to the opening (surrounding any portion of TFT, adjacent is broad, see, e.g., annotated figure 5) . Applicant’s specification (see, e.g., fig. 13, para.0103-0104) shows the limitation of Claim 6 of “the slight or through hole of the overcoat layer… surrounding the thin film transistor” in a plan view of the display device. However the current claim language does not limit SL to surround the thin film transistor in a plan view. Therefore, Examiner interprets the limitations of Claim 6 as shown in annotated figure 5. Regarding Claim 7, Shin (see, e.g., fig. 5, annotated figure 5), in view of Kim, shows the display device of claim 3, wherein the slit or through hole of the overcoat layer overlaps an upper portion of the thin film transistor adjacent to the opening (vertical direction overlap, see, e.g., annotated figure 5) . Regarding Claim 8, Shin (see, e.g., fig. 5, annotated figure 5), in view of Kim, shows the display device of claim 1, wherein the slit or through hole of the overcoat layer is formed in the non-emission area (see, e.g., annotated figure 5) . Regarding Claim 9, Shin (see, e.g., annotated figure 5, para.0056), in view of Kim, shows the display device of claim 1, wherein the overcoat layer has a step formed by the slit or through hole SL , and wherein the step is formed to be inclined downwardly from the emission area to the non-emission area (step formed of angled VIA1 & VIA2, see, e.g., annotated figure 5) . Regarding Claim 12, Shin (see, e.g., fig. 5, para.0049, para.0054-0055), in view of Kim, shows the display device of claim 1, further comprising a color filter layer CF (see, e.g., para.0049, para.0054-0055) disposed between the passivation layer PAS and the overcoat layer OC2 (of OC1 & OC2) (see, e.g., fig. 5) . Regarding Claim 13, Shin, in view of Kim (see, e.g., annotated figure 6, para.0076-0077), shows the display device of claim 12, wherein the color filter layer CF_R & CF_B (of Kim, corresponding to CF of Shin) includes a slit or through hole formed in an upper portion of the color filter layer (bottom portion of 265b, see, e.g., para.0076-0077) , and wherein the protrusion is positioned in the slit or through hole of the color filter layer through the overcoat layer (260 of Kim corresponding to overcoat layer OC1 & OC2 of Shin, see, e.g., annotated figure 6, para.0076-0077) . Regarding Claim 14, Shin (see, e.g., fig. 4, fig. 5, para.0039, para.0054), in view of Kim (see, e.g., fig. 2), shows the display device of claim 12, wherein the substrate includes a red subpixel, a green subpixel, a blue subpixel, and a white subpixel adjacent to each other (see, e.g., para.0039) , and wherein the color filter layer is provided on the passivation layer (see, e.g., fig. 5, para.0054) when the subpixel is formed as the red subpixel, the green subpixel, or the blue subpixel. Shin (see, e.g., fig. 5, para.0039-0040) states fig. 5, is a subpixel and that each of the plurality of subpixels can each emit red, green, blue, and white colors. Fig. 5, shows a subpixel that can correspond to a blue subpixel and a subpixel that can correspond to a white subpixel. Additionally, Kim (see, e.g., fig. 2) shows a configuration of the red EA_R , green EA_G , blue EA_B , and white EA_RW subpixels adjacent to one each other. Regarding the limitation “wherein the color filter layer is provided on the passivation layer when the subpixel is formed as the red subpixel, the green subpixel, or the blue subpixel” of Shin, in view of Kim, note that a “product-by-process” claim is directed to the product per se, no matter how actually made. See In re Thorpe et al., 227 USPQ 964 (CAFC, 1985) and the related case law cited therein which make it clear that it is the final product per se which must determine in a “product-by-process” claim, and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product-by-process” claim or not. As stated in Thorpe , even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. In re Brown , 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA 1972); In re Pilkington , 411 F.2d 1345, 162 USPQ 145 (CCPA 1969); Buono v. Yankee Maid Dress Corp. , 77 F.2d 274, 279, 26, USPQ 57, 61 (2d. Cir 1935). NOTE that the applicant has burden of proof in such cases as the above case law makes clear. In reference to the claimed process step: “the color filter layer is provided … when the subpixel is formed” this is considered an intermediate method step that does not affect the structure of the final device. Regarding Claim 15, Shin (see, e.g., fig. 5, para.0039-0040), in view of Kim (see, e.g., fig. 2), shows the display device of claim 1, wherein the substrate includes a red subpixel, a green subpixel, a blue subpixel, and a white subpixel adjacent to each other (see, e.g., fig. 5, para.0039-0040) , and wherein the slit or through hole of the overcoat layer SL is formed in the blue subpixel and the white subpixel. Shin (see, e.g., fig. 5, para.0039-0040) states fig. 5, is a subpixel and that each of the plurality of subpixels can each emit red, green, blue, and white colors. Fig. 5, shows a subpixel that can correspond to a blue subpixel and a subpixel that can correspond to a white subpixel. Additionally, Kim (see, e.g., fig. 2) shows a configuration of the red EA_R , green EA_G , blue EA_B , and white EA_RW subpixels adjacent to one each other. Therefore the presence of SL in fig. 5 would apply to all subpixels and the limitation “ SL is formed in the blue subpixel and the white subpixel” is rendered obvious. Regarding Claim 16, Shin (see, e.g., fig. 2, para.0034-0034), in view of Kim, shows the display device of claim 1, wherein the thin film transistor includes at least one of a driving thin film transistor DR (see, e.g., para.0035) and a switching thin film transistor SW (see, e.g., para.0035) . Regarding Claim 18, Shin (see, e.g., fig. 5, para.0047-0049), in view of Kim, shows the display device of claim 1, further comprising a light emitting element OLED (see, e.g., para.0049) electrically connected to the thin film transistor, wherein the light emitting element includes: a first electrode ANO (see, e.g., para.0047) interposed between the overcoat layer and the black bank layer, including a transparent conductive material (see, e.g., para.0047) , and disposed in the emission area and the non-emission area (see, e.g., fig. 5) ; a light emitting layer EML (see, e.g., para.0048) disposed on the first electrode; and a second electrode CAT (see, e.g., para.0048) disposed on the light emitting layer . 07-21-aia AIA Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Shin (US 20190198819) in view of Kim (US 20170186823) and further in view of Beak (US 20200194509) . Regarding Claim 10, Shin, in view of Kim, shows the display device of claim 1, Shin, in view of Kim, however, fails to show wherein a length of the protrusion of the black bank layer is about 1 µm to 10 µm. Applicant’s specification (see, e.g., figs. 11a-b para.0085, para.0097-0098) uses the terms of length in a vertical direction and depth to describe Claim 10’s limitations. However, the claim language is broad and currently the length of the protrusion could also be rendered obvious by a horizontal length of the protrusion or width of the slit or through hole the protrusion is positioned in. However, ranges of protrusion length will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such ranges are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). Beak (see, e.g., fig. 9, para.0155-0156), in a similar device to Shin, in view of Kim, shows a length of the protrusion of the black bank layer BNK , distance d , of 1 µm to 3.2 µm. Beak also shows a length of the protrusion of the black bank layer BNK , height h , of 0.7 µm to 10 µm. These ranges of Beak are obvious protrusion lengths. Since the applicant has not established the criticality of the claimed range, and similar ranges have been used in the art, it would have been obvious to one of ordinary skill in the art to use the ranges of the protrusion length of Beak in the device of Shin, in view of Kim, as an obvious protrusion length. Criticality The specification contains no disclosure of either the critical nature of the claimed temperature and pressure ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990) . 07-21-aia AIA Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Shin (US 20190198819) in view of Kim (US 20170186823) and further in view of Beak (US 20200194509) & Abe (US 20170162607) . Regarding Claim 11, Shin, in view of Kim, shows the display device of claim 1, Shin, in view of Kim, however, fails to show wherein a distance between the protrusion of the black bank layer and the passivation layer is about 1 Å to 6000 Å. However, ranges of distance will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such ranges are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). PNG media_image1.png 734 1792 media_image1.png Greyscale Beak (see, e.g., fig. 9, para.0156), in a similar device to Shin, in view of Kim, shows a distance T1 + h between the protrusion of the black bank and the passivation layer PAS , and height h , of 0.7 µm to 10 µm. Abe (see, e.g., fig. 5c, para.0123) states the thickness of 110 is between 4.0 µm to 5.0 µm. The thickness of 110 corresponds to T1 of Beak. The combination of these references show a distance between the protrusion of the black bank layer and the passivation layer is 5000 Å is the claimed range of distance and would be an obvious range of distance. Since the applicant has not established the criticality of the claimed range, and similar ranges have been used in the art, it would have been obvious to one of ordinary skill in the art to use the ranges of the combined distance of the protrusion of the black bank layer of Beak & Abe, in the device of Shin, in view of Kim, as an obvious distance. See paragraph 40 for criticality statement . 07-21-aia AIA Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Shin (US 20190198819) in view of Kim (US 20170186823) and further in view of Jeong (US 20120292612) . Regarding Claim 17, Shin (see, e.g., fig. 5, para.0041-0043), in view of Kim, shows the display device of claim 1, wherein the thin film transistor includes: a buffer layer BUF (see, e.g., para.0041) disposed on the substrate; a semiconductor layer ACT (see, e.g., para.0042) disposed on the buffer layer; a gate electrode GA (see, e.g., para.0043) disposed in a portion of the semiconductor layer where the emission area is positioned; and a gate insulation film GI (see, e.g., para.0043) disposed between the semiconductor layer and the gate electrode. Shin, in view of Kim, however, fails to show the semiconductor layer disposed on the buffer layer and including a transparent conductive material Jeong (see, e.g., fig. 1, para.0048) in a similar device to Shin, in view of Kim, teaches a semiconductor layer of a thin film transistor including a transparent conductive material would improve the performance of the thin film transistor and allow for the device to be manufactured at a lower temperature process. It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the semiconductor layer including a transparent conductive material of Jeong in the device of Shin, in view of Kim, to improve the performance of the thin film transistor and allow for the device to be manufactured at a lower temperature process. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FERNANDO JOSE RAMOS-DIAZ whose telephone number is (571) 270-5855. The examiner can normally be reached Mon-Fri 8am-5pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on 571-272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /F.R.D./ Examiner, Art Unit 2814 Examiner, Art Unit 2814 /WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 2 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 3 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 4 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 5 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 6 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 7 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 8 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 9 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 10 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 11 Art Unit: 2814 Application/Control Number: 18/540,372 (Non-Final Rejection) Page 12 Art Unit: 2814
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