DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. This office action is in response to the Amendment filed on March 31, 2026.
Claims 1-21 are amended. No claims are canceled. No claims are added.
Response to Arguments
3. Applicant’s arguments, see pages 10-12, filed March 31, 2026, with respect to the rejections of independent claims 1, 8, and 15 under 35 USC § 102 have been fully considered and are persuasive.
Applicant asserts because the independent claims have been amended to recite determining types of blocks and performing different recovery processes based on the type of blocks, nothing of this sort is shown or suggested in any of the references of the previous office action, whether taken alone or in combination. Examiner agrees and, therefore, the rejections of the independent claims and their respective dependent claims under 35 USC § 102 and 35 USC § 103 have been withdrawn in light of the amendments. However, upon further consideration, a new ground(s) of rejection is made in view of Lee (US 20190236005 A1).
Claim Rejections - 35 USC § 103
4. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
7. Claims 1-2, 6, 8-9, 13, 15-16, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Miller (US 20210200435 A1) in view of Lee (US 20190236005 A1).
Regarding independent claim 1, Miller teaches a system for recovering a non-volatile memory (NVM) device from a power loss (¶[0002]), comprising:
Memory (FIG. 1, 130, 140); and
at least one hardware processor coupled to the memory (FIG. 1, controller 115 with APL component 113; ¶[0036]) and collectively configured to at least:
identify a first last valid written page (LVWP) (¶[0037] teaches a “readable” LWP is one read without errors and is therefore “valid”; FIG. 3, 308) of a first block of the NVM device (FIG. 3, 306; ¶ [0036]);
identify a first first empty page (FEP) (FIG. 3, 304; ¶[0036]) after the first LVWP of the first block (¶[0036] teaches the LWP is before the FEP in the sequence map);
determine that no pages exist between the first LVWP and the first FEP (¶[0036] teaches the FEP can be the next page after the LWP; e.g., pages 30 and 31 of FIG. 4; see also ¶[0041], which teaches LWP is the sequence number of the FEP less one (e.g., FEP−1));
in response to determining that no pages exist between the first LVWP and the first FEP, indicate that the first block can be used (FIG. 3, 318; as long as data in LWP is readable or recoverable using a read recovery algorithm (¶[0018]), there are no pages between the “first LVWP” and the “first FEP” and the host system is notified the device is ready to be used);
identify a second LVWP of a second block of the NVM device (FIG. 4, now representing a “second block” and a second pass through FIG. 3, 308; if the second LWP 404 (page 30) is unrecoverable/invalid (FIG. 3, 308), then the second valid LWP (“second LVWP”) must precede page 30);
identify a second FEP (e.g., FIG. 4, page 31, now representing a “second FEP” in the “second block”; second pass through FIG. 3, 304) after the second LVWP of the second block (¶[0036] teaches the LWP is before the FEP in the sequence map, and therefore the second LVWP must be before the FEP);
determine that pages exist between the second LVWP and the second FEP (FIG. 4; e.g., if LWP 404 (page 30) is unrecoverable, then the second LWP would be page 30 and the second valid LWP (“second LVWP”) would have to precede page 30, meaning one or more pages exist between the “second LVWP” and the “second FEP” (page 31));
identify a third LVWP of a third block of the NVM device (FIG. 4, now representing a “third block” and a third pass through FIG. 3, 308);
identify a third FEP after the third LVWP of the third block (e.g., FIG. 4, page 31, now representing a “third FEP” in the “third block”; third pass through FIG. 3, 304); and
determine that one or more pages exist between the third LVWP and the third FEP (FIG. 4; e.g., if LWP 404 (page 30) is unrecoverable, then the third LWP would be page 30 and the third valid LWP (“third LVWP”) would have to precede page 30, meaning one or more pages exist between the “third LVWP” and the “third FEP” (page 31)).
Miller does not teach determine a first type of block that corresponds to the second block;
perform a first recovery process on the second block based on the second block corresponding to the first type of block;
determine a second type of block that corresponds to the third block, wherein the second type of block is different than the first type of block; and
perform a second recovery process on the third block based on the third block corresponding to the second type of block, wherein the second recovery process includes different operations than the first recovery process.
Lee teaches determine a first type of block (FIG. 5, e.g., System Data Block) that corresponds to the second block;
perform a first recovery process (FIG. 5, left output of S571; ¶[0097]) on the second block based on the second block corresponding to the first type of block;
determine a second type of block (FIG. 5, e.g., Map Data Block) that corresponds to the third block, wherein the second type of block is different than the first type of block (referencing FIG. 4, ¶[0096] teaches “host data blocks 401, 402, 403 may store host data, the system data block 404 may store system data, and the map data blocks 405, 406, 407 may store map data,” which are all different); and
perform a second recovery process (FIG. 5, right output of S571; ¶[0097]) on the third block based on the third block corresponding to the second type of block, wherein the second recovery process includes different operations than the first recovery process (FIG. 5, the recovery process for Map Data Block skips the final step).
Regarding independent claim 8, Miller teaches a method (FIG. 3) for recovering a non-volatile memory (NVM) device from a power loss (¶[0002]), comprising:
identifying a first last valid written page (LVWP) ( ¶[0037] teaches a “readable” LWP is one read without errors and is therefore “valid”; FIG. 3, 308) of a first block of the NVM device (FIG. 3, 306; ¶[0036]);
identifying a first first empty page (FEP) (FIG. 3, 304; ¶[0036]) after the first LVWP of the first block (¶[0036] teaches the LWP is before the FEP in the sequence map);
determining that no pages exist between the first LVWP and the first FEP ( ¶[0036] teaches the FEP can be the next page after the LWP; e.g., pages 30 and 31 of FIG. 4; see also ¶[0041], which teaches LWP is the sequence number of the FEP less one (e.g., FEP−1)) using a hardware processor (FIG. 1, controller 115 with APL component 113; ¶[0036]);
in response to determining that no pages exist between the first LVWP and the first FEP, indicating that the first block can be used (FIG. 3, 318; as long as data in LWP is readable or recoverable using a read recovery algorithm (¶ [0018]), there are no pages between the “first LVWP” and the “first FEP” and the host system is notified the device is ready to be used);
identify a second LVWP of a second block of the NVM device (FIG. 4, now representing a “second block” and a second pass through FIG. 3, 308; if the second LWP 404 (page 30) is unrecoverable/invalid (FIG. 3, 308), then the second valid LWP (“second LVWP”) must precede page 30);
identify a second FEP (e.g., FIG. 4, page 31, now representing a “second FEP” in the “second block”; second pass through FIG. 3, 304) after the second LVWP of the second block (¶[0036] teaches the LWP is before the FEP in the sequence map, and therefore the second LVWP must be before the FEP); and
determine that pages exist between the second LVWP and the second FEP (FIG. 4; e.g., if LWP 404 (page 30) is unrecoverable, then the second LWP would be page 30 and the second valid LWP (“second LVWP”) would have to precede page 30, meaning one or more pages exist between the “second LVWP” and the “second FEP” (page 31)).
identifying a third LVWP of a third block of the NVM device (FIG. 4, now representing a “third block” and a third pass through FIG. 3, 308); and
identifying a third FEP after the third LVWP of the third block (e.g., FIG. 4, page 31, now representing a “third FEP” in the “third block”; third pass through FIG. 3, 304) determining that one or more pages exist between the third LVWP and the third FEP (FIG. 4; e.g., if LWP 404 (page 30) is unrecoverable, then the third LWP would be page 30 and the third valid LWP (“third LVWP”) would have to precede page 30, meaning one or more pages exist between the “third LVWP” and the “third FEP” (page 31)).
Miller does not teach determining a first type of block that corresponds to the second block;
performing a first recovery process on the second block based on the second block corresponding to the first type of block;
determining a second type of block that corresponds to the third block, wherein the second type of block is different than the first type of block; and
performing a second recovery process on the third block based on the third block corresponding to the second type of block, wherein the second recovery process includes different operations than the first recovery process.
Lee teaches determining a first type of block (FIG. 5, e.g., System Data Block) that corresponds to the second block;
performing a first recovery process (FIG. 5, left output of S571; ¶[0097]) on the second block based on the second block corresponding to the first type of block;
determining a second type of block (FIG. 5, e.g., Map Data Block) that corresponds to the third block, wherein the second type of block is different than the first type of block (referencing FIG. 4, ¶[0096] teaches “host data blocks 401, 402, 403 may store host data, the system data block 404 may store system data, and the map data blocks 405, 406, 407 may store map data,” which are all different); and
performing a second recovery process (FIG. 5, right output of S571; ¶[0097]) on the third block based on the third block corresponding to the second type of block, wherein the second recovery process includes different operations than the first recovery process (FIG. 5, the recovery process for Map Data Block skips the final step).
Regarding independent claim 15, Miller teaches a non-transitory computer-readable medium containing computer executable instructions (FIG. 1, local memory 119; ¶[0031-0032], 119 may include ROM storing code) that, when executed by a processor (FIG. 1, 115), cause the processor to perform a method for recovering a non-volatile memory (NVM) device from a power loss (FIG. 3), the method comprising:
identifying a first last valid written page (LVWP) (¶[0037] teaches a “readable” LWP is one read without errors and is therefore “valid”; FIG. 3, 308) of a first block of the NVM device (FIG. 3, 306; ¶[0036]);
identifying a first first empty page (FEP) (FIG. 3, 304; ¶[0036]) after the first LVWP of the first block (¶[0036] teaches the LWP is before the FEP in the sequence map);
determining that no pages exist between the first LVWP and the first FEP (¶[0036] teaches the FEP can be the next page after the LWP; e.g., pages 30 and 31 of FIG. 4; see also ¶[0041], which teaches LWP is the sequence number of the FEP less one (e.g., FEP−1)); and
in response to determining that no pages exist between the first LVWP and the first FEP, indicating that the first block can be used (FIG.3, 318; as long as data in LWP is readable or recoverable using a read recovery algorithm (¶[0018]), there are no pages between the “first LVWP” and the “first FEP” and the host system is notified the device is ready to be used);
identify a second LVWP of a second block of the NVM device (FIG. 4, now representing a “second block” and a second pass through FIG. 3, 308; if the second LWP 404 (page 30) is unrecoverable/invalid (FIG. 3, 308), then the second valid LWP (“second LVWP”) must precede page 30);
identify a second FEP (e.g., FIG. 4, page 31, now representing a “second FEP” in the “second block”; second pass through FIG. 3, 304) after the second LVWP of the second block (¶[0036] teaches the LWP is before the FEP in the sequence map, and therefore the second LVWP must be before the FEP);
determine that pages exist between the second LVWP and the second FEP (FIG. 4; e.g., if LWP 404 (page 30) is unrecoverable, then the second LWP would be page 30 and the second valid LWP (“second LVWP”) would have to precede page 30, meaning one or more pages exist between the “second LVWP” and the “second FEP” (page 31));
identifying a third LVWP of a third block of the NVM device (FIG. 4, now representing a “third block” and a third pass through FIG. 3, 308);
identifying a third FEP after the third LVWP of the third block (e.g., FIG. 4, page 31, now representing a “third FEP” in the “third block”; third pass through FIG. 3, 304); and
determining that one or more pages exist between the third LVWP and the third FEP (FIG. 4; e.g., if LWP 404 (page 30) is unrecoverable, then the third LWP would be page 30 and the third valid LWP (“third LVWP”) would have to precede page 30, meaning one or more pages exist between the “third LVWP” and the “third FEP” (page 31)).
Miller does not teach determining a first type of block that corresponds to the second block;
performing a first recovery process on the second block based on the second block corresponding to the first type of block;
determining a second type of block that corresponds to the third block, wherein the second type of block is different than the first type of block; and
performing a second recovery process on the third block based on the third block corresponding to the second type of block, wherein the second recovery process includes different operations than the first recovery process.
Lee teaches determining a first type of block (FIG. 5, e.g., System Data Block) that corresponds to the second block;
performing a first recovery process (FIG. 5, left output of S571; ¶[0097]) on the second block based on the second block corresponding to the first type of block;
determining a second type of block (FIG. 5, e.g., Map Data Block) that corresponds to the third block, wherein the second type of block is different than the first type of block (referencing FIG. 4, ¶[0096] teaches “host data blocks 401, 402, 403 may store host data, the system data block 404 may store system data, and the map data blocks 405, 406, 407 may store map data,” which are all different); and
performing a second recovery process (FIG. 5, right output of S571; ¶[0097]) on the third block based on the third block corresponding to the second type of block, wherein the second recovery process includes different operations than the first recovery process (FIG. 5, the recovery process for Map Data Block skips the final step).
Regarding claims 1, 8, and 15, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Lee into the method of Miller to include recovery process task flows specific to the type of data block. The ordinary artisan would have been motivated to modify Miller in the above manner for the purpose of skipping an operation which is unnecessary to be performed (Lee ¶[0083]).
Regarding claim 2, Miller as modified by Lee teaches the limitations of claim 1.
Lee further teaches the first type of block is one of a system block (FIG. 5, S571, left output may indicate a system data block), a host-write block, and a migration block, and wherein the second type of block is another of a system block, a host-write block (FIG. 5, S571, right output indicates a map data block; referencing FIG. 4, ¶[0087] teaches “processor 134 may update changed address information of the valid data and store the updated address information in the map data block,” and therefore the map data block is a host-writable block) and a migration block.
Regarding claim 6, Miller as modified by Lee teaches the limitations of claim 1.
Miller further teaches the first recovery process comprises:
invalidating a first given non-zero number of word lines of the second block prior to and including a last page before the FEP (¶[0042]; FIG. 3, S320-S324); and
dummy programming a second given non-zero number of word lines of the second block starting at the FEP (FIG. 3, 322).
Regarding claim 9, Miller as modified by Lee teaches the limitations of claim 8.
Lee further teaches the first type of block is one of a system block (FIG. 5, S571, left output may indicate a system data block), a host-write block, and a migration block, and wherein the second type of block is another of a system block, a host-write block (FIG. 5, S571, right output indicates a map data block; referencing FIG. 4, ¶[0087] teaches “processor 134 may update changed address information of the valid data and store the updated address information in the map data block,” and therefore the map data block is a host-writable block) and a migration block.
Regarding claim 13, Miller as modified by Lee teaches the limitations of claim 8.
Miller further teaches the first recovery process comprises:
invalidating a first given non-zero number of word lines of the second block prior to and including a last page before the FEP (¶[0042]; FIG. 3, S320-S324); and
dummy programming a second given non-zero number of word lines of the second block starting at the FEP (FIG. 3, 322).
Regarding claim 16, Miller as modified by Lee teaches the limitations of claim 15.
Lee further teaches the first type of block is one of a system block (FIG. 5, S571, left output may indicate a system data block), a host-write block, and a migration block, and wherein the second type of block is another of a system block, a host-write block (FIG. 5, S571, right output indicates a map data block; referencing FIG. 4, ¶[0087] teaches “processor 134 may update changed address information of the valid data and store the updated address information in the map data block,” and therefore the map data block is a host-writable block) and a migration block.
Regarding claim 20, Miller as modified by Lee teaches the limitations of claim 15.
Miller further teaches the first recovery process comprises:
invalidating a first given non-zero number of word lines of the second block prior to and including a last page before the FEP (¶[0042]; FIG. 3, S320-S324); and
dummy programming a second given non-zero number of word lines of the second block starting at the FEP (FIG. 3, 322).
8. Claims 3, 10, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Miller (US 20210200435 A1), in view of Lee (US 20190236005 A1), and further in view of Wu, et al (US 20100061150 A1), hereinafter Wu.
Regarding claim 3, Miller as modified by Lee teaches the limitations of claim 1.
Miller does not teach the first recovery process comprises:
restoring the second block to a last known good state.
Wu teaches the first recovery process comprises:
restoring the second block to a last known good state (Fig. 3, S68, S70; ¶[0018]).
Miller further teaches the first recovery process comprises:
invalidating a given non-zero number word lines of the second block after a last word line of the last known good state (¶[0042]).
Regarding claim 10, Miller as modified by Lee teaches the limitations of claim 8.
Miller does not teach the first recovery process comprises:
restoring the second block to a last known good state.
Wu teaches the first recovery process comprises:
restoring the second block to a last known good state (Fig. 3, S68, S70; ¶[0018]).
Miller further teaches the first recovery process comprises:
invalidating a given non-zero number word lines of the second block after a last word line of the last known good state (¶[0042]).
Regarding claim 17, Miller as modified by Lee teaches the limitations of claim 15.
Miller does not teach the first recovery process comprises:
restoring the second block to a last known good state.
Wu teaches the first recovery process comprises:
restoring the second block to a last known good state (Fig. 3, S68, S70; ¶[0018]).
Miller further teaches the first recovery process comprises:
invalidating a given non-zero number word lines of the second block after a last word line of the last known good state (¶[0042]).
Regarding claims 3, 10, and 17, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Wu into the method of Miller to include a recovery process of mapping the last known good block in place of an errant block following a power loss. The ordinary artisan would have been motivated to modify Miller in the above manner for the purpose of recovering a flash memory system after a power loss (Wu ¶[0005]) and extending the lifetime of the non-volatile memory because the number of erasing operations with the non-volatile memory is reduced (Wu ¶[0006]).
9. Claims 4, 11, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Miller (US 20210200435 A1), in view of Lee (US 20190236005 A1), further in view of Wu, et al (US 20100061150 A1), hereinafter Wu, and further in view of Lin, et al (US 20090070748 A1), hereinafter Lin.
Regarding claim 4, Miller as modified by Lee and Wu teaches the limitations of claim 3.
Miller does not teach the first recovery process further comprises reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Lin teaches in ¶[0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Regarding claim 11, Miller as modified by Lee and Wu teaches the limitations of claim 10.
Miller does not teach the first recovery process further comprises reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Lin teaches in ¶[0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Regarding claim 18, Miller as modified by Lee and Wu teaches the limitations of claim 17.
Miller does not teach the first recovery process further comprises reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Lin teaches in ¶[0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Regarding claims 4, 11, and 18, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Lin into the method of Miller to include copying the data from the last programmed block to a new block on power-up. The ordinary artisan would have been motivated to modify Miller in the above manner for the purpose of storing data in the new block with more distinct distributions (Lin ¶[0051]; FIG. 6B, old distributions such as 607 and 609 are replaced by distributions such as 601 and 603).
10. Claims 5, 7, 12, 14, 19, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Miller (US 20210200435 A1), in view of Lee (US 20190236005 A1), further in view of Lin, et al (US 20090070748 A1), hereinafter Lin.
Regarding claim 5, Miller as modified by Lee teaches the limitations of claim 1.
Miller does not teach the first recovery process comprises migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Lin teaches in ¶[0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Regarding claim 12, Miller as modified by Lee teaches the limitations of claim 8.
Miller does not teach the recovery process comprises migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Lin teaches in ¶[0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Regarding claim 19, Miller as modified by Lee teaches the limitations of claim 16.
Miller does not teach the recovery process comprises migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Lin teaches in ¶[0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Regarding claims 5, 12, and 19, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Lin into the method of Miller to include copying the data from the last programmed block to a new block on power-up. The ordinary artisan would have been motivated to modify Miller in the above manner for the purpose of storing data in the new block with more distinct distributions (Lin ¶[0051]; FIG. 6B, old distributions such as 607 and 609 are replaced by distributions such as 601 and 603).
Regarding claim 7, Miller as modified by Lee teaches the limitations of claim 6.
Miller does not teach the first recovery process further comprises:
reading pages of the second block;
determining that at least a threshold number of read errors are encountered on valid word lines of the second block; and
creating a new block of data to replace the second block.
Lin teaches reading pages of the second block (¶[0052-0053], during an ECC operation);
determining that at least a threshold number of read errors are encountered on valid word lines of the second block (FIG. 8; ¶[0054]); and
creating a new block of data to replace the second block (¶[0053], “unacceptable” output of FIG. 8 flowchart triggers the block copy operation of ¶[0051] in which the “second block” is copied to a “new” block).
Regarding claim 14, Miller as modified by Lee teaches the limitations of claim 13.
Miller does not teach the first recovery process further comprises:
reading pages of the second block;
determining that at least a threshold number of read errors are encountered on valid word lines of the second block; and
creating a new block of data to replace the second block.
Lin teaches reading pages of the second block (¶[0052-0053], during an ECC operation);
determining that at least a threshold number of read errors are encountered on valid word lines of the second block (FIG. 8; ¶[0054]); and
creating a new block of data to replace the second block (¶[0053], “unacceptable” output of FIG. 8 flowchart triggers the block copy operation of ¶[0051] in which the “second block” is copied to a “new” block).
Regarding claim 21, Miller as modified by Lee teaches the limitations of claim 20.
Miller does not teach the first recovery process further comprises:
reading pages of the second block;
determining that at least a threshold number of read errors are encountered on valid word lines of the second block; and
creating a new block of data to replace the second block.
Lin teaches reading pages of the second block (¶[0052-0053], during an ECC operation);
determining that at least a threshold number of read errors are encountered on valid word lines of the second block (FIG. 8; ¶[0054]); and
creating a new block of data to replace the second block (¶[0053], “unacceptable” output of FIG. 8 flowchart triggers the block copy operation of ¶[0051] in which the “second block” is copied to a “new” block).
Regarding claims 7, 14, and 21, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Lin into the method of Miller to include reading the data from the last programmed block, determining if the number of detected errors exceeds a threshold, and migrating data to a new block based on that result. The ordinary artisan would have been motivated to modify Miller in the above manner for the purpose of protecting the stored data and any further data (Lin ¶[0053]; for example, storing data in the new block with more distinct distributions (Lin ¶[0051]; FIG. 6B, old distributions such as 607 and 609 are replaced by distributions such as 601 and 603)).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRADLEY COON whose telephone number is (571)270-0740. The examiner can normally be reached M-F 8am-5pm (Eastern).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, AMIR ZARABIAN can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/B.S.C./Examiner, Art Unit 2827
/AMIR ZARABIAN/ Supervisory Patent Examiner, Art Unit 2827
Prosecution Insights