DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. This office action is in response to the Amendment filed on December 12, 2025.
Claims 1-2, 8-9, and 15-16 are amended. No claims are canceled or added.
Response to Arguments
3. Applicant's arguments filed December 12, 2026 have been fully considered but they are not persuasive.
Applicant submits on page 11 that at any given point in time, there can be only one last valid written page (LVWP) of a block and, therefore, when the valid LWP at page 30 of Miller exists, the example valid LWP at 27 is no longer a LAST written page. That is, only one of them can be the LAST one.
Examiner agrees with this argument. However, in the previous Office Action, Examiner made a distinction between the Last Written Page (LWP) and the Last Valid Written Page (LVWP). That is, an LWP may be unrecoverable and therefore cannot be referred to as a valid LWP (or LVWP). This means a block may have one page that is an LVWP, and a different, unrecoverable/invalid page that is an LWP, but not an LVWP.
Applicant further submits on page 11 that in Miller, the page following its LWP is necessarily the First Erased Page (FEP). To support this assertion, Applicant quotes ¶ [0015] of Miller.
“The LWP of a block can be determined by locating a first erased page (FEP) of the block. The FEP can be the next page that is available to be programmed in a sequence map of pages, the sequence map being managed by a controller of the memory sub-system. The LWP is the page before the FEP in the sequence map.” (Applicant’s emphasis shown.)
However, Miller also teaches the LWP may be unrecoverable (invalid). For example, in ¶ [0037], Miller states, “In some embodiments, the data at the LWP or the additional data from the peer page(s) is not readable or recoverable.” This distinction represents decision block 308 in Miller FIG. 3. If the LWP is invalid (unrecoverable), steps 320-324 are executed. If the LWP is valid (an LVWP) or at least recoverable, steps 310-318 are executed (see Miller ¶ [0044-0046]).
Finally, Applicant asserts based on Miller ¶ [0015] that there can never be pages between Miller’s LWP and FEP. Again, Examiner agrees with this assertion. However, the more important question with respect to the claims of the present application is whether pages may exist between Miller’s last valid written page and FEP.
Referencing Miller FIG. 4, the FEP is page 31 and the LWP is page 30, immediately preceding the FEP. However, in the event the LWP is invalid (unrecoverable), Miller’s last valid written page would have to precede page 30. Therefore, in the case of an invalid LWP, at least one page must exist between Miller’s last valid written page (LVWP) and FEP.
However, Examiner erred in the previous Office Action in using the acronym LVWP to describe an invalid (unrecoverable) LWP in the rejections of claims 2, 9, and 16, which have been amended in part into the amended independent claims. Therefore, the rejections have been withdrawn. However, upon further consideration, a new ground(s) of rejection have been made in view of Miller.
Claim Rejections - 35 USC § 102
4. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
5. Claims 1, 8, and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Miller (US 20210200435 A1).
Regarding independent claim 1, Miller teaches a system for recovering a non-volatile memory (NVM) device from a power loss (¶ [0002]), comprising:
Memory (FIG. 1, 130, 140); and
at least one hardware processor coupled to the memory (FIG. 1, controller 115 with APL component 113; ¶ [0036]) and collectively configured to at least:
identify a first last valid written page (LVWP) (¶ [0037] teaches a “readable” LWP is one read without errors and is therefore “valid”; FIG. 3, 308) of a first block of the NVM device (FIG. 3, 306; ¶ [0036]);
identify a first first empty page (FEP) (FIG. 3, 304; ¶ [0036]) after the first LVWP of the first block (¶ [0036] teaches the LWP is before the FEP in the sequence map);
determine that no pages exist between the first LVWP and the first FEP (¶ [0036] teaches the FEP can be the next page after the LWP; e.g., pages 30 and 31 of FIG. 4; see also ¶ [0041], which teaches LWP is the sequence number of the FEP less one (e.g., FEP−1)); and
in response to determining that no pages exist between the first LVWP and the first FEP, indicate that the first block can be used (FIG.3, 318; as long as data in LWP is readable or recoverable using a read recovery algorithm (¶ [0018]), there are no pages between the “first LVWP” and the “first FEP” and the host system is notified the device is ready to be used);
identify a second LVWP of a second block of the NVM device (FIG. 4, now representing a “second block”; if the second LWP 404 (page 30) is unrecoverable/invalid (FIG. 3, 308), then the second valid LWP (“second LVWP”) must precede page 30);
identify a second FEP (e.g., FIG. 4, page 31, now representing a “second FEP” in the “second block”) after the second LVWP of the second block (¶ [0036] teaches the LWP is before the FEP in the sequence map, and therefore the second LVWP must be before the FEP); and
determine that pages exist between the second LVWP and the second FEP (FIG. 4; e.g., if LWP 404 (page 30) is unrecoverable, then the second LWP would be page 30 and the second valid LWP (“second LVWP”) would have to precede page 30, meaning one or more pages exist between the “second LVWP” and the “second FEP” (page 31)).
Regarding independent claim 8, Miller teaches a method (FIG. 3) for recovering a non-volatile memory (NVM) device from a power loss (¶ [0002]), comprising:
identifying a first last valid written page (LVWP) (¶ [0037] teaches a “readable” LWP is one read without errors and is therefore “valid”; FIG. 3, 308) of a first block of the NVM device (FIG. 3, 306; ¶ [0036]);
identifying a first first empty page (FEP) (FIG. 3, 304; ¶ [0036]) after the first LVWP of the first block (¶ [0036] teaches the LWP is before the FEP in the sequence map);
determining that no pages exist between the first LVWP and the first FEP (¶ [0036] teaches the FEP can be the next page after the LWP; e.g., pages 30 and 31 of FIG. 4; see also ¶ [0041], which teaches LWP is the sequence number of the FEP less one (e.g., FEP−1)) using a hardware processor (FIG. 1, controller 115 with APL component 113; ¶ [0036]); and
in response to determining that no pages exist between the first LVWP and the first FEP, indicating that the first block can be used (FIG.3, 318; as long as data in LWP is readable or recoverable using a read recovery algorithm (¶ [0018]), there are no pages between the “first LVWP” and the “first FEP” and the host system is notified the device is ready to be used);
identify a second LVWP of a second block of the NVM device (FIG. 4, now representing a “second block”; if the second LWP 404 (page 30) is unrecoverable/invalid (FIG. 3, 308), then the second valid LWP (“second LVWP”) must precede page 30);
identify a second FEP (e.g., FIG. 4, page 31, now representing a “second FEP” in the “second block”) after the second LVWP of the second block (¶ [0036] teaches the LWP is before the FEP in the sequence map, and therefore the second LVWP must be before the FEP); and
determine that pages exist between the second LVWP and the second FEP (FIG. 4; e.g., if LWP 404 (page 30) is unrecoverable, then the second LWP would be page 30 and the second valid LWP (“second LVWP”) would have to precede page 30, meaning one or more pages exist between the “second LVWP” and the “second FEP” (page 31)).
Regarding independent claim 15, Miller teaches a non-transitory computer-readable medium containing computer executable instructions (FIG. 1, local memory 119; ¶ [0031-0032], 119 may include ROM storing code) that, when executed by a processor (FIG. 1, 115), cause the processor to perform a method for recovering a non-volatile memory (NVM) device from a power loss (FIG. 3), the method comprising:
identifying a first last valid written page (LVWP) (¶ [0037] teaches a “readable” LWP is one read without errors and is therefore “valid”; FIG. 3, 308) of a first block of the NVM device (FIG. 3, 306; ¶ [0036]);
identifying a first first empty page (FEP) (FIG. 3, 304; ¶ [0036]) after the first LVWP of the first block (¶ [0036] teaches the LWP is before the FEP in the sequence map);
determining that no pages exist between the first LVWP and the first FEP (¶ [0036] teaches the FEP can be the next page after the LWP; e.g., pages 30 and 31 of FIG. 4; see also ¶ [0041], which teaches LWP is the sequence number of the FEP less one (e.g., FEP−1)); and
in response to determining that no pages exist between the first LVWP and the first FEP, indicating that the first block can be used (FIG.3, 318; as long as data in LWP is readable or recoverable using a read recovery algorithm (¶ [0018]), there are no pages between the “first LVWP” and the “first FEP” and the host system is notified the device is ready to be used);
identify a second LVWP of a second block of the NVM device (FIG. 4, now representing a “second block”; if the second LWP 404 (page 30) is unrecoverable/invalid (FIG. 3, 308), then the second valid LWP (“second LVWP”) must precede page 30);
identify a second FEP (e.g., FIG. 4, page 31, now representing a “second FEP” in the “second block”) after the second LVWP of the second block (¶ [0036] teaches the LWP is before the FEP in the sequence map, and therefore the second LVWP must be before the FEP); and
determine that pages exist between the second LVWP and the second FEP (FIG. 4; e.g., if LWP 404 (page 30) is unrecoverable, then the second LWP would be page 30 and the second valid LWP (“second LVWP”) would have to precede page 30, meaning one or more pages exist between the “second LVWP” and the “second FEP” (page 31)).
Claim Rejections - 35 USC § 103
6. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
7. Claims 2-3, 6, 9-10, 13, 16-17, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Miller (US 20210200435 A1) in view of Wu, et al (US 20100061150 A1), hereinafter Wu.
Regarding claim 2, Miller teaches the limitations of claim 1.
Miller does not teach in response to determining that pages exist between the second LVWP and the second FEP, perform a recovery process on the second block.
Wu teaches in Fig. 3 and ¶ [0018] a recovery process of finding the last known good block from the good record (S70) and mapping the last known good block in place of the errant block (S68).
Therefore, Miller and Wu together teach in response to determining that pages exist between the second LVWP and the second FEP (Miller, left output of FIG. 3, 308), perform a recovery process on the second block (Wu, Fig 3, S68, S70).
Regarding claim 9, Miller teaches the limitations of claim 8.
Miller does not teach in response to determining that pages exist between the second LVWP and the second FEP, performing a recovery process on the second block.
Wu teaches in Fig. 3 and ¶ [0018] a recovery process of finding the last known good block from the good record (S70) and mapping the last known good block in place of the errant block (S68).
Therefore, Miller and Wu together teach in response to determining that pages exist between the second LVWP and the second FEP (Miller, left output of FIG. 3, 308), performing a recovery process on the second block (Wu, Fig 3, S68, S70).
Regarding claim 16, Miller teaches the limitations of claim 15.
Miller does not teach in response to determining that pages exist between the second LVWP and the second FEP, performing a recovery process on the second block.
Wu teaches in Fig. 3 and ¶ [0018] a recovery process of finding the last known good block from the good record (S70) and mapping the last known good block in place of the errant block (S68).
Therefore, Miller and Wu together teach in response to determining that pages exist between the second LVWP and the second FEP (Miller, left output of FIG. 3, 308), performing a recovery process on the second block (Wu, Fig 3, S68, S70).
Regarding claims 2, 9, and 16, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Wu into the method of Miller to include a recovery process of mapping the last known good block in place of an errant block following a power loss. The ordinary artisan would have been motivated to modify Miller in the above manner for the purpose of recovering a flash memory system after a power loss (Wu ¶ [0005]) and extending the lifetime of the non-volatile memory because the number of erasing operations with the non-volatile memory is reduced (Wu ¶ [0006]).
Regarding claim 3, Miller as modified by Wu teaches the limitations of claim 2.
Wu further teaches the recovery process comprises:
restoring the second block to a last known good state (Fig. 3, S68, S70; ¶ [0018]).
Miller further teaches the recovery process comprises:
invalidating a given non-zero number word lines of the second block after a last word line of the last known good state (¶ [0042]).
Regarding claim 6, Miller as modified by Wu teaches the limitations of claim 2.
Miller further teaches the recovery process comprises:
invalidating a first given non-zero number of word lines of the second block prior to and including a last page before the FEP (¶ [0042]; FIG. 3, S320-S324); and
dummy programming a second given non-zero number of word lines of the second block starting at the FEP (FIG. 3, 322).
Regarding claim 10, Miller as modified by Wu teaches the limitations of claim 9.
Wu further teaches the recovery process comprises:
restoring the second block to a last known good state (Fig. 3, S68, S70; ¶ [0018]).
Miller further teaches the recovery process comprises:
invalidating a given non-zero number word lines of the second block after a last word line of the last known good state (¶ [0042]).
Regarding claim 13, Miller as modified by Wu teaches the limitations of claim 9.
Miller further teaches the recovery process comprises:
invalidating a first given non-zero number of word lines of the second block prior to and including a last page before the FEP (¶ [0042]; FIG. 3, S320-S324); and
dummy programming a second given non-zero number of word lines of the second block starting at the FEP (FIG. 3, 322).
Regarding claim 17, Miller as modified by Wu teaches the limitations of claim 16.
Wu further teaches the recovery process comprises:
restoring the second block to a last known good state (Fig. 3, S68, S70; ¶ [0018]).
Miller further teaches the recovery process comprises:
invalidating a given non-zero number word lines of the second block after a last word line of the last known good state (¶ [0042]).
Regarding claim 20, Miller as modified by Wu teaches the limitations of claim 16.
Wu further teaches the recovery process comprises:
invalidating a first given non-zero number of word lines of the second block prior to and including a last page before the FEP (¶ [0042]; FIG. 3, S320-S324); and
dummy programming a second given non-zero number of word lines of the second block starting at the FEP (FIG. 3, 322).
8. Claims 4-5, 7, 11-12, 14, 18-19, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Miller (US 20210200435 A1) in view of Wu, et al (US 20100061150 A1), hereinafter Wu, and further in view of Lin, et al (US 20090070748 A1), hereinafter Lin.
Regarding claim 4, Miller as modified by Wu teaches the limitations of claim 3.
Miller does not teach the recovery process further comprises reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Lin teaches in ¶ [0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Regarding claim 5, Miller as modified by Wu teaches the limitations of claim 2.
Miller does not teach the recovery process comprises migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Lin teaches in ¶ [0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Regarding claim 11, Miller as modified by Wu teaches the limitations of claim 10.
Miller does not teach the recovery process further comprises reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Lin teaches in ¶ [0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Regarding claim 12, Miller as modified by Wu teaches the limitations of claim 9.
Miller does not teach the recovery process comprises migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Lin teaches in ¶ [0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Regarding claim 18, Miller as modified by Wu teaches the limitations of claim 17.
Miller does not teach the recovery process further comprises reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Lin teaches in ¶ [0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches reconstructing data of non-empty pages of the second block after the last page of the last known good state.
Regarding claim 19, Miller as modified by Wu teaches the limitations of claim 16.
Miller does not teach the recovery process comprises migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Lin teaches in ¶ [0051] on power-up, copying the data from the last programmed block to a new block. Because all block data is copied, Lin teaches migrating all data from a first page of the second block through to and including the LVWP of the second block to a new data block.
Regarding claims 4-5, 11-12, and 18-19, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Lin into the method of Miller to include copying the data from the last programmed block to a new block on power-up. The ordinary artisan would have been motivated to modify Miller in the above manner for the purpose of storing data in the new block with more distinct distributions (Lin ¶ [0051]; FIG. 6B, old distributions such as 607 and 609 are replaced by distributions such as 601 and 603).
Regarding claim 7, Miller as modified by Wu teaches the limitations of claim 6.
Miller does not teach the recovery process further comprises:
reading pages of the second block;
determining that at least a threshold number of read errors are encountered on valid word lines of the second block; and
creating a new block of data to replace the second block.
Lin teaches reading pages of the second block (¶ [0052-0053], during an ECC operation);
determining that at least a threshold number of read errors are encountered on valid word lines of the second block (FIG. 8; ¶ [0054]); and
creating a new block of data to replace the second block (¶ [0053], “unacceptable” output of FIG. 8 flowchart triggers the block copy operation of ¶ [0051] in which the “second block” is copied to a “new” block).
Regarding claim 14, Miller as modified by Wu teaches the limitations of claim 13.
Miller does not teach the recovery process further comprises:
reading pages of the second block;
determining that at least a threshold number of read errors are encountered on valid word lines of the second block; and
creating a new block of data to replace the second block.
Lin teaches reading pages of the second block (¶ [0052-0053], during an ECC operation);
determining that at least a threshold number of read errors are encountered on valid word lines of the second block (FIG. 8; ¶ [0054]); and
creating a new block of data to replace the second block (¶ [0053], “unacceptable” output of FIG. 8 flowchart triggers the block copy operation of ¶ [0051] in which the “second block” is copied to a “new” block).
Regarding claim 21, Miller as modified by Wu teaches the limitations of claim 20.
Miller does not teach the recovery process further comprises:
reading pages of the second block;
determining that at least a threshold number of read errors are encountered on valid word lines of the second block; and
creating a new block of data to replace the second block.
Lin teaches reading pages of the second block (¶ [0052-0053], during an ECC operation);
determining that at least a threshold number of read errors are encountered on valid word lines of the second block (FIG. 8; ¶ [0054]); and
creating a new block of data to replace the second block (¶ [0053], “unacceptable” output of FIG. 8 flowchart triggers the block copy operation of ¶ [0051] in which the “second block” is copied to a “new” block).
Regarding claims 7, 14, and 21, it would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Lin into the method of Miller to include reading the data from the last programmed block, determining if the number of detected errors exceeds a threshold, and migrating data to a new block based on that result. The ordinary artisan would have been motivated to modify Miller in the above manner for the purpose of protecting the stored data and any further data (Lin ¶ [0053]; for example, storing data in the new block with more distinct distributions (Lin ¶ [0051]; FIG. 6B, old distributions such as 607 and 609 are replaced by distributions such as 601 and 603)).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRADLEY COON whose telephone number is (571)270-0740. The examiner can normally be reached M-F 8am-5pm (Eastern).
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/B.S.C./Examiner, Art Unit 2827
/AMIR ZARABIAN/ Supervisory Patent Examiner, Art Unit 2827