Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-20 are pending.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-5, 8, and 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0398942 A1 Wang et al (herein “Wang”) in view of US 2022/0223564 A1 Chen et al (herein “Chen”).
Regarding Claim 1, Wang discloses:
An electronic device (see generally Figs. 1A-1Y, specifically see Fig. 1Y showing completed electronic device / package structure including alignment marks and chip units, and Fig. 1U showing alignment mark labels. See also Figs. 2A-2C showing top-down views of various configurations of alignment marks), comprising:
a redistribution structure (#500, [0037]-[0059]) comprising a plurality of alignment marks (#AM1-AM3, mirrored on left and right side of electronic device);
a plurality of chip units (#300, [0018]) electrically connected to the redistribution structure (#500) and comprising a first chip unit (#300, Fig. 1Y, left) and a second chip unit (#300, Fig. 1Y, right); and
a protective layer (#400) surrounding the first chip unit (#300, Fig. 1Y, left) and the second chip unit (#300, Fig. 1Y, right),
wherein the plurality of chip units (#300) and the plurality of alignment marks (#AM1-AM3) are arranged along a first direction (horizontal direction) in a cross-sectional view direction (side profile as seen in Fig. 1Y),
the plurality of alignment marks (#AM1-AM3) comprise a first alignment mark (#AM1, left), a second alignment mark (#AM2, left), a third alignment mark (#AM1, right) and a fourth alignment mark (#AM2, right),
the first chip unit (#300, left) is disposed between the first alignment mark (#AM1, left) and the third alignment mark (#AM1, right), the second chip unit (#300, right) is disposed between the second alignment mark (#AM2, left) and the fourth alignment mark (#AM2, right),
and a number of the plurality of alignment marks (#AM1-#AM3) is greater than a number of the plurality of chip units (#300).
Wang does not explicitly disclose:
the second alignment mark and the third alignment mark are disposed between the first chip unit and the second chip unit,
However, in analogous art, Chen teaches:
See generally top-down views of alignment marks shown in Fig. 34, and corresponding descriptive paragraphs [0109]-[0121].
the second alignment mark and the third alignment mark are disposed between the first chip unit and the second chip unit,
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to consider combining the teachings of Chen as disclosed in [0109]-[0117] and [0121] to the device disclosed by Wang and form the electronic device having alignment marks on diagonally adjacent corners of the respective dies as seen from the top-down view in Chen Figs. 33 and 34. Doing so can save more top-down surface area within the electronic structure for the integrated circuit layout ([0110]) and additionally, can be used to align the position of the semiconductor package 100 to ensure the semiconductor package 100 is placed at the desirable location and that the semiconductor package 100 does not shift or rotate from its intended position and direction ([0121]). Such a configuration would result in the claimed limitation of the second and third alignment marks being formed between the first and second chip units, as neighboring alignment marks in adjacent corners of neighboring chip units would inherently lie between the neighboring chip units themselves. This can be seen from a top and side profile, similar to Figs. 1 and 10 of the instant application that appear to be substantially identical to the top-down view shown by Chen Fig. 34, with diagonally adjacent alignment marks places in opposite corners of a singular chip unit.
Regarding Claim 2, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
wherein the plurality of alignment marks (#AM1-AM3) and the redistribution structure (specifically see routing patterns CV1, RP1, and RP2 in manufacturing steps shown in Figs. 1G-1S) comprise same film layers (see deposited layers in Figs. 1G-1S).
Regarding Claim 3, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
wherein a number of metal layers (512b, #540b, 522b) of at least one of the plurality of alignment marks (specifically #AM2) is the same as a number of metal layers (512a, #540a, 522a) of the redistribution structure (specifically #RP1).
Regarding Claim 4, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
wherein a number of insulating layers (insulating layers surrounding/encapsulating alignment marks #AM1-AM3, specifically see #AM2) of at least one of the plurality of alignment marks (#AM1-AM3) is the same as a number of insulating layers (insulating layers surrounding/encapsulating redistribution structure # CV1, RP1, and RP2, specifically see #RP2) of the redistribution structure (#RP2).
Regarding Claim 5, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
wherein at least one of the plurality of alignment marks comprise a test key for use in measuring an alignment deviation value (see [0027]-[0029]).
Regarding Claim 8, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
wherein an extension line of the first alignment mark and an extension line of the second alignment mark have an included angle, and the included angle is greater than or equal to 0 degree and less than or equal to 15 degrees (see [0037]: “”. See also [0051]: “For example, an included angle formed between the sidewalls of the second alignment mark AM2 and a virtual line extending along a direction perpendicular to the top surface T.sub.AM2 of the second alignment mark AM2 may range between 85° and 90°.”. A direction perpendicular to sidewalls at an angle between 85° and 90° in the respective direction would be between 0° and 5° which reads on the claimed limitation).
Regarding Claim 15, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
comprising at least three layers (see Fig. 1P, #512b, #540b, #522b) which stack in one of the plurality of the alignment marks (#AM1-AM3).
Regarding Claim 16, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
wherein at least one of the plurality of alignment marks (#AM1-AM3) is in direct contact with the protective layer (see abstract: “…the alignment marks are electrically insulated from the die and the conductive structures. At least one of the alignment marks is in physical contact with the encapsulant”).
Regarding Claim 17, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
wherein at least one of the plurality of alignment marks (#AM1-AM3) comprises one of an island-like mark, a window-like mark and a hybrid mark (see abstract: “The alignment marks are electrically insulated from the die and the conductive structures.” Which therefore implies the alignment mark is at least an island-like mark, see Figs. 1A-1Y).
Regarding Claim 18, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
wherein at least one of the plurality of alignment marks (#AM1-AM3) comprises a plurality of mark units (see Fig. 1P, #512b, #540b, #522b).
Regarding Claim 19, Wang in view of Chen discloses: The electronic device of claim 18,
Wang further discloses:
wherein the plurality of mark units (see Fig. 1P, #512b, #540b, #522b) are correspondingly stacked to form a tower-like alignment mark (see tower structure in Fig. 1P).
Regarding Claim 20, Wang in view of Chen discloses: The electronic device of claim 18,
Wang further discloses:
wherein there are n pieces of the plurality of mark units to form one of the plurality of alignment marks with n/2 layers when n is an even number (the specification of the instant application discloses in [0049]: six mark units may form a three-layer alignment mark, and so on. Wang discloses 6 mark unit structures each with 3 layers. As best understood by the examiner the cited prior art appears to be substantially identical to the claimed invention of the instant application, which therefore reads on the limitation as currently claimed.).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0398942 A1 Wang et al in view of US 2022/0223564 A1 Chen et al and further in view of US 2022/0068829 A1 Park et al (herein “Park”).
Regarding Claim 6, Wang in view of Chen discloses: The electronic device of claim 5,
Wang in view of Chen does not explicitly disclose:
wherein the test key comprises a front-layer key and a current-layer key, there are a first gap value Q and a second gap value q between the front-layer key and the current-layer key along a second direction, and the first direction is perpendicular to the second direction.
However, in analogous art, Park teaches:
See Fig. 4, see also descriptive paragraphs [0053]-[0059].
wherein the test key comprises a front-layer key (#134) and a current-layer key (#234A), there are a first gap value Q (#D32) and a second gap value q (D31) between the front-layer key and the current-layer key along a second direction, and the first direction is perpendicular to the second direction (see Fig. 4).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to consider combining the teachings of Park to the device disclosed by Wang in view of Chen and form the alignment structures such that the different layers of the alignment mark have corresponding gap values. Doing so would allow better alignment within the device during the packaging process and further lead to better, more accurate processing steps during formation that may have tighter tolerances.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0398942 A1 Wang et al in view of US 2022/0223564 A1 Chen et al and further in view of US 2021/0098390 A1 Liu et al (herein “Liu”).
Regarding Claim 9, Wang in view of Chen discloses: The electronic device of claim 1,
Wang in view of Chen does not explicitly disclose:
wherein at least one of the plurality of alignment marks comprises a rounded corner.
However, in analogous art, Liu teaches:
wherein at least one of the plurality of alignment marks comprises a rounded corner (see [0030]: “Such short and weak tails T of the light intensity distribution may cause the profile of the grooves of the alignment marks AM1, AM2 to be slightly rounded at the ends and/or slightly rough on the sidewalls, which is discussed in the description related to FIG. 4 and FIGS. 5A-5B. The formed alignment marks are capable of providing an alignment function.”).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to consider combining the teachings of Liu to the device disclosed by Wang in view of Chen and form the alignment marks such that they have rounded corners. Doing so would be a simple substitution/modification of the device to achieve a predictable result of forming alignment marks for better device measurements during manufacturing.
Claims 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0398942 A1 Wang et al in view of US 2022/0223564 A1 Chen et al and further in view of US 2020/0273807 A1 Won et al (herein “Won”).
Regarding Claim 10, Wang in view of Chen discloses: The electronic device of claim 1,
Wang further discloses:
wherein the protective layer (#400) has at least one through-hole structure (#200).
Wang in view of Chen does not explicitly disclose:
the at least one through-hole structure is electrically connected to a ground signal.
However, in analogous art, Won teaches:
the at least one through-hole structure is electrically connected to a ground signal (see paragraph [0031]).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to consider combining the teachings of Won to the device disclosed by Wang in view of Chen and form the redistribution structures / protective layer such that one of the through holes connects to a ground signal. Doing so would be an obvious modification for device performance, as electrical devices must be connected to ground lines / signals for safe operation.
Regarding Claim 11, Wang in view of Chen and further in view of Won discloses: The electronic device of claim 10,
Wang in view of Chen does not explicitly disclose:
wherein the at least one through-hole structure is an input/output terminal (I/O).
However, in analogous art, Won teaches:
wherein the at least one through-hole structure is an input/output terminal (I/O) (see paragraph [0031]).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to consider combining the teachings of Won to the device disclosed by Wang in view of Chen and form the redistribution structures / protective layer such that one of the through holes operates as an input/output (I/O). Doing so would be an obvious modification for device performance, as electrical devices must be connected to input/output (I/O) lines / signals for operation.
Regarding Claim 12, Wang in view of Chen and further in view of Won discloses: The electronic device of claim 10,
Wang further discloses:
wherein the through-hole structure is used to dissipate heat (through hole structures #200 are made of metallic conductive material [0017], which would therefore also operate as a heat dissipating structure in addition to the use as an electrical connection).
Regarding Claim 13, Wang in view of Chen and further in view of Won discloses: The electronic device of claim 10,
Wang in view of Chen and further in view of Won does not explicitly disclose:
further comprising: a ground structure adjacent to the at least one through-hole structure.
However, in analogous art, Won teaches:
further comprising: a ground structure adjacent to the at least one through-hole structure (see paragraph [0031]).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to consider combining the teachings of Won to the device disclosed by Wang in view of Chen and form the redistribution structures / protective layer such that one of the through holes operates as an ground signal connected to an external bump or interposer. Doing so would be an obvious modification for device performance, as electrical devices must be connected to ground signals for operation.
Regarding Claim 14, Wang in view of Chen and further in view of Won discloses: The electronic device of claim 10,
Wang further discloses:
wherein the at least one through-hole structure is electrically connected to a conductive layer in the redistribution structure (see Fig. 1Y).
Allowable Subject Matter
Claim 7 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding Claim 7: The following is a statement of reasons for the indication of allowable subject matter: The prior art of record as considered pertinent to the applicant's disclosure does not teach or suggest the claimed invention having the following limitation, in combination with the remaining claimed limitations. The prior art fails to teach or suggest the claimed limitations, namely: “wherein the alignment deviation value is defined as (Q−q)/2 which is determined by the first gap value Q and the second gap value q between the front-layer key and the current-layer key.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andrew V. Prostor whose telephone number is (571) 272-2686. The examiner can normally be reached M-F 8:00a-4:30p.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S Kim can be reached at (571) 272-8458. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/ANDREW VICTOR PROSTOR/Examiner, Art Unit 2812 /CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812
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