DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 23-27 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 23 recites in line 8 “forming a second RDL over each substrate of the plurality of substrates will”. The meaning of the recitation “substrates will” could not be determined.
Claims 24-27 are rejected since they inherit the deficiency from claim 23 which they are dependent from.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 7-14, and 17-22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hwang (U.S. Patent Application Publication No 2009/0141426).
Regarding to claim 1, Hwang teaches a substrate structure, comprising:
plurality of substrates encapsulated in a shell in a stacked relationship (Fig. 4B, element 190);
at least one electronic component in each substrate of the plurality of substrates (Fig. 4B, element 130), wherein the at least one electronic component includes at least a first terminal (Fig. 4B, element 150) and a second terminal (Fig. 4B, element 154);
a first redistribution layer (RDL) disposed over each substrate of the plurality of substrates configured to electrically couple the first terminal of the at least one electronic component with a respective first terminal disposed over an outer edge of the shell (Fig. 4B, first redistribution layer 160 disposed over each substrate of the plurality of substrates configured to electrically couple the first terminal 150 of electronic component 130 with a respective first terminal 182 disposed over an outer edge of the shell. The outer edge of the shell including right and left sidewalls of the shell); and
a second RDL disposed over each substrate of the plurality of substrates and configured to electrically couple the second terminal of the at least one electronic component with a respective second terminal disposed over the outer edge of the shell (Fig. 4B, second redistribution layer 162 disposed over each substrate of the plurality of substrates and configured to electrically couple the second terminal 154 of the electronic component 130 with a respective second terminal 184 disposed over the outer edge of the shell).
Regarding to claim 2, Hwang teaches the at least one electronic component in each substrate of the plurality of substrates comprises a plurality of passive components ([0038], lines 4-7, capacitors are passive components).
Regarding to claim 3, Hwang teaches the at least one electronic component in each substrate of the plurality of substrates comprise: a plurality of deep trench capacitors (Fig. 4B, [0038], lines 4-7).
Regarding to claim 4, Hwang teaches the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell are configured to electrically couple the substrate structure with an interconnect structure (Fig. 4B, [0040], lines 4-6).
Regarding to claim 7, Hwang teaches
a first dielectric layer disposed over a first side of each substrate of the plurality of substrates and between a first side of the substrate and the first RDL (Fig. 4B, element 142); and
a second dielectric layer disposed over the first side of each substrate of the plurality of substrates between the first RDL and the second RDL (Fig. 4B, element 164).
Regarding to claim 8, Hwang teaches a third dielectric layer disposed over the second RDL of each substrate of the plurality of substrates (Fig. 4B, element 170).
Regarding to claim 9, Hwang teaches the third dielectric layer associated with at least one substrate of the plurality of substrates separates the at least one substrate from an adjacent substrate encapsulated in the shell (Fig. 4B).
Regarding to claim 10, Hwang teaches
the plurality of substrates are stacked along a length of the substrate structure (Fig. 4B);
the first RDL of each substrate of the plurality of substrates extends along a height of the substrate structure (Fig. 4B);
the second RDL of each substrate of the plurality of substrates extends along the height of the substrate structure (Fig. 4B); and
the outer edge of the substrate structure extends along the length of the substrate structure (Fig. 4B).
Regarding to claim 11, Hwang teaches an electronic device, comprising a substrate structure comprising:
plurality of substrates encapsulated in a shell in a stacked relationship (Fig. 4B, element 190);
at least one electronic component in each substrate of the plurality of substrates (Fig. 4B, element 130), wherein the at least one electronic component includes at least a first terminal (Fig. 4B, element 150) and a second terminal (Fig. 4B, element 154);
a first redistribution layer (RDL) disposed over each substrate of the plurality of substrates configured to electrically couple the first terminal of the at least one electronic component with a respective first terminal disposed over an outer edge of the shell (Fig. 4B, first redistribution layer 160 disposed over each substrate of the plurality of substrates configured to electrically couple the first terminal 150 of the at least one electronic component 130 with a respective first terminal 182 disposed over an outer edge of the shell. The outer edge of the shell including right and left sidewalls of the shell); and
a second RDL disposed over each substrate of the plurality of substrates and configured to electrically couple the second terminal of the at least one electronic component with a respective second terminal disposed over the outer edge of the shell (Fig. 4B, second redistribution layer 162 disposed over each substrate of the plurality of substrates and configured to electrically couple the second terminal 154 of the at least one electronic component 130 with a respective second terminal 184 disposed over the outer edge of the shell).
Regarding to claim 12, Hwang teaches the at least one electronic component in each substrate of the plurality of substrates comprises a plurality of passive components ([0038], lines 4-7, capacitors are passive components).
Regarding to claim 13, Hwang teaches the at least one electronic component in each substrate of the plurality of substrates comprise: a plurality of deep trench capacitors (Fig. 4B).
Regarding to claim 14, Hwang teaches the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell are configured to electrically couple the substrate structure with an interconnect structure (Fig. 4B).
Regarding to claim 17, Hwang teaches
a first dielectric layer disposed over a first side of each substrate of the plurality of substrates and between a first side of the substrate and the first RDL (Fig. 4B, element 142); and
a second dielectric layer disposed over the first side of each substrate of the plurality of substrates between the first RDL and the second RDL (Fig. 4B, element 164).
Regarding to claim 18, Hwang teaches a third dielectric layer disposed over the second RDL of each substrate of the plurality of substrates (Fig. 4B, element 170).
Regarding to claim 19, Hwang teaches the third dielectric layer associated with at least one substrate of the plurality of substrates separates the at least one substrate from an adjacent substrate encapsulated in the shell (Fig. 4B).
Regarding to claim 20, Hwang teaches
the plurality of substrates are stacked along a length of the substrate structure (Fig. 4B);
the first RDL of each substrate of the plurality of substrates extends along a height of the substrate structure (Fig. 4B);
the second RDL of each substrate of the plurality of substrates extends along the height of the substrate structure (Fig. 4B); and
the outer edge of the substrate structure extends along the length of the substrate structure (Fig. 4B).
Regarding to claim 21, Hwang teaches the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell each comprise a terminal configured to electrically coupling the substrate structure with an interconnect structure (Fig. 4B).
Regarding to claim 22, Hwang teaches the electronic device comprises at least one of: a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an internet of things (loT) device, or a device in an automotive vehicle ([0002], last 4 lines. Note that recitations in intended use are not given patentable weight).
Claims 1, 4-6, 11, 14-16, and 21-22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liao (U.S. Patent No 9,018,772).
Regarding to claim 1, Liao teaches a substrate structure, comprising:
plurality of substrates encapsulated in a shell in a stacked relationship (Fig. 8, please see the attached reproduced figure with annotations);
at least one electronic component in each substrate of the plurality of substrates (Fig. 8, please see the attached reproduced figure with annotations), wherein the at least one electronic component includes at least a first terminal and a second terminal (Fig. 8, please see the attached reproduced figure with annotations);
a first redistribution layer (RDL) disposed over each substrate of the plurality of substrates configured to electrically couple the first terminal of the at least one electronic component with a respective first terminal disposed over an outer edge of the shell (Fig. 8, please see the attached reproduced figure with annotations); and
a second RDL disposed over each substrate of the plurality of substrates and configured to electrically couple the second terminal of the at least one electronic component with a respective second terminal disposed over the outer edge of the shell (Fig. 8, please see the attached reproduced figure with annotations).
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Regarding to claim 4, Liao teaches the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell are configured to electrically couple the substrate structure with an interconnect structure (Fig. 8, please see the attached reproduced figure with annotations).
Regarding to claim 5, Liao teaches a metallization structure disposed at the outer edge of the shell, wherein the metallization structure is configured to electrically couple the first RDL disposed over each substrate of the plurality of substrates with the respective first terminal disposed over the outer edge of the shell (Fig. 8, please see the attached reproduced figure with annotations).
Regarding to claim 6, Liao teaches the metallization structure disposed over the outer edge of the shell is configured to electrically couple the second RDL disposed over each substrate of the plurality of substrates with the respective second terminal disposed over the outer edge of the shell (Fig. 8, please see the attached reproduced figure with annotations).
Regarding to claim 11, Liao teaches an electronic device, comprising a substrate structure, comprising:
plurality of substrates encapsulated in a shell in a stacked relationship (Fig. 8, please see the attached reproduced figure with annotations);
at least one electronic component in each substrate of the plurality of substrates (Fig. 8, please see the attached reproduced figure with annotations), wherein the at least one electronic component includes at least a first terminal and a second terminal (Fig. 8, please see the attached reproduced figure with annotations);
a first redistribution layer (RDL) disposed over each substrate of the plurality of substrates configured to electrically couple the first terminal of the at least one electronic component with a respective first terminal disposed over an outer edge of the shell (Fig. 8, please see the attached reproduced figure with annotations); and
a second RDL disposed over each substrate of the plurality of substrates and configured to electrically couple the second terminal of the at least one electronic component with a respective second terminal disposed over the outer edge of the shell (Fig. 8, please see the attached reproduced figure with annotations).
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Regarding to claim 14, Liao teaches the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell are configured to electrically couple the substrate structure with an interconnect structure (Fig. 8, please see the attached reproduced figure with annotations).
Regarding to claim 15, Liao teaches a metallization structure disposed at the outer edge of the shell, wherein the metallization structure is configured to electrically couple the first RDL disposed over each substrate of the plurality of substrates with the respective first terminal disposed over the outer edge of the shell (Fig. 8, please see the attached reproduced figure with annotations).
Regarding to claim 16, Liao teaches the metallization structure disposed over the outer edge of the shell is configured to electrically couple the second RDL disposed over each substrate of the plurality of substrates with the respective second terminal disposed over the outer edge of the shell (Fig. 8, please see the attached reproduced figure with annotations).
Regarding to claim 21, Liao teaches the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell each comprise a terminal configured to electrically coupling the substrate structure with an interconnect structure (Fig. 8, please see the attached reproduced figure with annotations).
Regarding to claim 22, Liao teaches the electronic device comprises at least one of: a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an internet of things (loT) device, or a device in an automotive vehicle ([column 8, lines 38-41. Note that recitations in intended use are not given patentable weight).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 103 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 23 and 26-27 are rejected under 35 U.S.C. 103 as being unpatentable over Liao (U.S. Patent No 9,018,772) in view of Chen et al. (U.S. Patent No 9,659,878).
Regarding to claim 23, Liao teaches method of fabricating a substrate structure, comprising (note that the method steps are not claimed to impart in a specific order):
processing a substrate includes at least one electronic component, and wherein the at least one electronic component includes at least a first terminal and a second terminal (Fig. 8, processing a substrate includes electronic component 212, includes first terminal 240/left and second terminal 240/right);
forming a first redistribution layer (RDL) over each substrate of the plurality of substrates (Fig. 8, element 213/left), wherein the first RDL is electrically coupled to the first terminal of the at least one electronic component of each substrate of the plurality of substrates (Fig. 8);
forming a second RDL over each substrate of the plurality of substrates will (Fig. 8, element 213/left), wherein the second RDL is electrically coupled to the second terminal of the at least one electronic component (Fig. 8);
encapsulating the plurality of substrates in a stacked relationship in a shell (Fig. 8, element 270); and
forming a metallization structure over an outer edge of the shell, wherein the metallization structure is configured to electrically couple the first RDL of each substrate to a respective first terminal at the outer edge of the shell and for coupling the second RDL of each substrate to a respective second terminal at the outer edge of the shell (Fig. 8, element 222 on left and right sides).
Liao does not disclose orienting a plurality of substrates for concurrent processing.
Chen discloses orienting a plurality of substrates for concurrent processing (Figs. 1-13). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Liao in view of Chen to orient a plurality of substrates for concurrent processing in order to increase productivity.
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Regarding to claim 26, Chen discloses forming the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell for electrically coupling the substrate structure with an interconnect structure (Fig. 13).
Regarding to claim 27, Chen discloses
stacking the plurality of substrates along a length of the substrate structure (Fig. 13);
forming the first RDL of each substrate of the plurality of substrates along a height of the substrate structure (Fig. 13);
forming the second RDL of each substrate of the plurality of substrates along the height of the substrate structure (Fig. 13); and
forming the outer edge of the substrate structure extends along the length of the substrate structure (Fig. 13).
Claims 23-26 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang (U.S. Patent Application Publication No 2009/0141426) in view of Fang (U.S. Patent No 11,282,778).
Regarding to claim 23, Hwang teaches method of fabricating a substrate structure, comprising (note that the method steps are not claimed to impart in a specific order):
processing a substrate includes at least one electronic component, and wherein the at least one electronic component includes at least a first terminal and a second terminal (Fig. 4B, processing a substrate includes electronic component 130, includes first terminal 150 and second terminal 154);
forming a first redistribution layer (RDL) over each substrate of the plurality of substrates (Fig. 4B, element 160), wherein the first RDL is electrically coupled to the first terminal of the at least one electronic component of each substrate of the plurality of substrates (Fig. 4B);
forming a second RDL over each substrate of the plurality of substrates will (Fig. 4B, element 162), wherein the second RDL is electrically coupled to the second terminal of the at least one electronic component (Fig. 4B);
encapsulating the plurality of substrates in a stacked relationship in a shell (Fig. 4B, element 142); and
forming a metallization structure over an outer edge of the shell, wherein the metallization structure is configured to electrically couple the first RDL of each substrate to a respective first terminal at the outer edge of the shell and for coupling the second RDL of each substrate to a respective second terminal at the outer edge of the shell (Fig. 4B, element 182/184).
Hwang does not disclose orienting a plurality of substrates for concurrent processing.
Fang discloses orienting a plurality of substrates for concurrent processing (Figs. 4N-O). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Hwang in view of Fang to orient a plurality of substrates for concurrent processing in order to increase productivity.
Regarding to claim 24, Hwang teaches the at least one electronic component formed in each substrate the plurality of substrates comprises a plurality of passive components ([0038], lines 4-7, capacitors are passive components).
Regarding to claim 25, Hwang teaches the at least one electronic component in each substrate of the plurality of substrates comprise: a plurality of deep trench capacitors (Fig. 4B, electronic components 130 are deep trench capacitors).
Regarding to claim 26, Hwang teaches the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell are configured to electrically couple the substrate structure with an interconnect structure (Fig. 4B).
Pertinent Art
For the benefits of the Applicant, US-7880275-B2, US-9337073-B2, US-9647057-B2, US-6972451-B2, US-8368201-B2, US-9521794-B2, US-11769792-B2, and US-10164005-B2, are cited on the record as being pertinent to significant disclosure through some but not all claimed features of the defined invention. The references fail to disclose encapsulating the plurality of substrates in a stacked relationship in a shell and forming a metallization structure over an outer edge of the shell, wherein the metallization structure is configured to electrically couple the first RDL of each substrate to a respective first terminal at the outer edge of the shell and for coupling the second RDL of each substrate to a respective second terminal at the outer edge of the shell.”
Conclusion
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/VU A VU/Primary Examiner, Art Unit 2897