Prosecution Insights
Last updated: April 19, 2026
Application No. 18/542,211

TRENCH SEMICONDUCTOR POWER DEVICE AND LAYOUT THEREOF

Non-Final OA §103
Filed
Dec 15, 2023
Examiner
VU, VU A
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Silicon-Magic Semiconductor Technology ( Hangzhou ) Co. Ltd.
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
2y 0m
To Grant
99%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allow Rate
1208 granted / 1309 resolved
+24.3% vs TC avg
Moderate +7% lift
Without
With
+6.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
48 currently pending
Career history
1357
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
44.5%
+4.5% vs TC avg
§102
34.4%
-5.6% vs TC avg
§112
12.5%
-27.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1309 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Pree et al. (U.S. Patent Application Publication No. 2023/0369410) in view of Seok (U.S. Patent No. 9,780,168). Regarding to claim 10, Pree teaches a trench semiconductor power device layout, comprising: a source trench structure (Fig. 1B, element 31; [0080], last 6 lines); a gate trench structure that is annular (Fig. 1B, Fig. 2E, element 16; [0076], lines 1-4), wherein the source trench structure and the gate trench structure are spaced apart from each other and alternately arranged (Fig. 1B); and a bridge trench structure that is connected between two adjacent gate trench structures, passes through the source trench structure between two adjacent gate trench structures (Fig. 1B). PNG media_image1.png 836 1053 media_image1.png Greyscale Pree does not disclose the source trench structure to be annular, and having the bridge trench structure that is connected between two adjacent gate trench structures cuts the source trench structure into a plurality of arc-shaped source trench sections, wherein an end of each of the arc-shaped source trench sections is spaced apart from the bridge trench structure. Seok discloses an annular structure and a bridge structure that is connected between two adjacent gate structures cuts the structure into a plurality of arc-shaped sections, wherein an end of each of the arc-shaped sections is spaced apart from the bridge structure (Fig. 4, column 9, lines 17-21, bridge structure 29/30/31/32 is connected between two adjacent gate structures 15 and 16, cuts a structure into a plurality of arc-shaped sections, wherein an end of each of the arc-shaped sections is spaced apart from the bridge structure). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Pree in view of Seok to configure the source structure to be annular, and have the bridge trench structure that is connected between two adjacent gate trench structures cutting the source trench structure into a plurality of arc-shaped source trench sections, an end of each of the arc-shaped source trench sections is spaced apart from the bridge trench structure, in order to reduce noise. Regarding to claim 11, Pree as modified discloses two or more bridge trench structures are arranged between two adjacent gate trench structures (Fig. 1B). Regarding to claim 12, Pree as modified discloses the bridge trench structures in an inner ring and an outer ring adjacent to each other are staggered with respect to each other (Seok, Figs. 4-5). Regarding to claim 13, Pree as modified discloses a peripheral trench structure, wherein the peripheral trench structure surrounds the source trench structure and the gate trench structure (Seok, column 4, lines 54-55). PNG media_image2.png 731 887 media_image2.png Greyscale Allowable Subject Matter Claims 1-9 are allowed. Claims 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding to claim 14, the prior art fails to anticipate or render obvious the claimed limitations including “the bridge trench structure comprises a third conductor and a third dielectric layer surrounding the third conductor” in combination with the limitation recited in claim 10 and the rest of limitations recited in claim 14. Regarding to claim 1, the prior art fails to anticipate or render obvious the combination of limitations including “a bridge trench structure inside the epitaxial layer, wherein the bridge trench structure is connected between two adjacent gate trench structures, passes through the source trench structure between two adjacent gate trench structures, and cuts the source trench structure into a plurality of arc-shaped source trench sections, and an end of each of the arc-shaped source trench sections is spaced apart from the bridge trench structure.” Comparing to the prior-art of the record, the most relevant prior art is Pree et al. (U.S. Patent Application Publication No. 2023/0369410). Pree discloses the claimed invention except for the limitations listed above. Pree discloses a trench semiconductor power device, comprising: a substrate of a first dopant type (Fig. 1B, element 27); an epitaxial layer of the first dopant type, located on a first surface of the substrate (Fig. 1B, element 11, [0078], lines 3-5); a source trench structure that is inside the epitaxial layer (Fig. 1B, element 25); a gate trench structure that is inside the epitaxial layer and is annular (Fig. 1B, Fig. 2E, element 16; [0076], lines 1-4), wherein the source trench structure and the gate trench structure are spaced apart from each other and alternately arranged (Fig. 1B); a bridge trench structure, wherein the bridge trench structure is connected between two adjacent gate trench structures (Fig. 1B); a base region of a second dopant type, arranged between the source trench structure and the gate trench structure adjacent to each other, wherein the second dopant type is opposite to the first dopant type (Fig. 1B, element 30); a source region of the first dopant type, arranged in the base region (Fig. 1B, element 26); a gate metal layer, connected to the gate trench structure (Fig. 1B, element 34); and a source metal layer, connected to the source trench structure and the source region (Fig. 1B, element 33), wherein the source metal layer and the gate metal layer are spaced apart from each other (Fig. 1B). The limitation of “the source trench structure to be annular, and the bridge trench structure that is connected between two adjacent gate trench structures cuts the source trench structure into a plurality of arc-shaped source trench sections, wherein an end of each of the arc-shaped source trench sections is spaced apart from the bridge trench structure” could be cured by Seok (U.S. Patent No. 9,780,168). However, the combination of references fails to cure the deficiency of “a bridge trench structure inside the epitaxial layer.” US-10361276-B2, US-9419118-B1, US-20100038707-A1, US-7638839-B2, US-8154073-B2, US-8853771-B2, US-8890253-B2, US-8754442-B2, US-9362356-B2, and US-11430798-B2, are all cited as teaching some of the elements and features of the claimed invention. However, the cited references, and the pertinent prior art, when taken alone or in combination, cannot be reasonably construed as adequately teaching or suggesting all of the elements and features of the claimed invention as arranged in the manner as claimed by the Applicants. Claims 2-9 are dependent from the allowable claim 1, thus they are allowable. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to VU A VU whose telephone number is (571)270-7467. The examiner can normally be reached M-F: 8:00AM - 5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHAD M DICKE can be reached at (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VU A VU/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Dec 15, 2023
Application Filed
Mar 09, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
99%
With Interview (+6.6%)
2y 0m
Median Time to Grant
Low
PTA Risk
Based on 1309 resolved cases by this examiner. Grant probability derived from career allow rate.

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