DETAILED ACTION
This office action is in response to the amendments filed on August 13, 2026. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Acknowledgements
Applicants’ arguments and amendments filed on August 13, 2026, in response to the office action mailed on May 13, 2026, have been fully considered. Accordingly, claims 1, 3-19 are currently pending in this application.
Information Disclosure Statement
The information disclosure statements submitted on 8/11/2026 are being considered by the examiner
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 10, 18 are rejected under 35 U.S.C. 103 as being unpatentable over Xu (CN 114725126 A) in view of Du (US 2024/0347541).
With respect to Claim 10, Xu discloses (Fig. 10) most aspects of the current invention including a display panel, comprising a driving backplane, wherein the driving backplane comprises:
a substrate (160);
a driving circuit layer (110), disposed on a side of the substrate; wherein a top of the driving circuit layer forms a first height with a bottom of the substrate
a plurality of pad areas (areas with layer 130 overlapping);
a protective layer (150), disposed on a side of the driving circuit layer facing away from the substrate; wherein the protective layer comprises a plurality of first protective layer structures (left protective structure, right protective structure), and each of the first protective layer structures is disposed corresponding to each of the plurality of pad areas
a plurality of pads (layers 130), formed on sides of the first protective layer structures facing away from the driving circuit layer
wherein a top of at least one of the first protective layer structures forms a second height with the bottom of the substrate, and the second height is greater than the first height
Furthermore, although Xu discloses wherein one of the plurality of pads is connected with the driving circuit layer through a via hole in each of the first protective layer structures, Xu fails to explicitly show the display panel, comprising a driving backplane and a light source, wherein each of the plurality of pads is connected with the driving circuit layer through a via hole in each of the first protective layer structures.
On the other hand, and in the same field of endeavor, Du teaches (Fig 20) a display panel, comprising a driving backplane (comprises transistor with gate) and a light source (22), a plurality of pads (horizontal 121), formed on sides of a first protective layer structures (9) facing away from a driving circuit layer, wherein each of the plurality of pads (horizontal 121) is connected with the driving circuit layer through a via hole in each of the first protective layer structures. Du teaches the plurality of pads form connection pins and furthermore providing a protective material layer to protect the metal layer from the natural oxidation, such that the high-temperature annealing process may be performed on the driving backplane, which avoids abnormalities (par 123).
Therefore, it would have been obvious to one of ordinary skill in the art, and before the effective filing date of the claimed invention to have the arrangement of the display panel, comprising a driving backplane and a light source, wherein each of the plurality of pads is connected with the driving circuit layer through a via hole in each of the first protective layer structures, in the device of Xu, as taught by Du because the plurality of pads form connection pins and furthermore providing a protective material layer to protect the metal layer from the natural oxidation, such that the high-temperature annealing process may be performed on the driving backplane, which avoids abnormalities.
With respect to Claim 18, Du teaches (Fig 8-9) wherein a material of the protective layer is an organic photoresist.
Claims 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Xu (CN 114725126 A) in view of Du (US 2024/0347541) and in further view of Wei (US 2022/0140020).
With respect to Claim 12, Xu in view of Du discloses most aspects of the current invention. However, the combination of references do no show wherein the protective layer comprises at least one second protective layer structure, disposed around the pad area; and a top of the second protective layer structure forms a third height with the bottom of the substrate, and the third height is greater than the first height and less than the second height.
On the other hand, and in the same field of endeavor, Wei teaches (Fig 5) a display panel, comprising a driving backplane, the driving backplane comprises: a substrate; a driving circuit layer (102-104), disposed on a side of the substrate, a top of the driving circuit layer forms a first height with a bottom of the substrate, a protective layer, disposed on a side of the driving circuit layer facing away from the substrate, wherein the protective layer comprises a first protective layer structure (5 left area), a top of at least one of the first protective layer structure forms a second height with the bottom of the substrate, and the second height is greater than the first height, and further the protective layer comprises at least one second protective layer structure (5 right area), disposed around the pad area (S2); and a top of the second protective layer structure forms a third height with the bottom of the substrate, and the third height is greater than the first height and less than the second height. Wei teaches the protective layer structures can effectively block water vapor and oxygen, and achieve the purpose of protecting the light emitting device and additionally improve the packaging effect.
Therefore, it would have been obvious to one of ordinary skill in the art, and before the effective filing date of the claimed invention to have the arrangement of wherein the protective layer comprises at least one second protective layer structure, disposed around the pad area; and a top of the second protective layer structure forms a third height with the bottom of the substrate, and the third height is greater than the first height and less than the second height in the device of Xu in view of Du, as taught by Wei because the protective layer structures can effectively block water vapor and oxygen, and achieve the purpose of protecting the light emitting device and additionally improve the packaging effect.
With respect to Claim 13, Wei teaches (Fig 5) wherein the at least one second protective layer structure is a plurality of second protective layer structures, and the protective layer structures form a grid shape.
Allowable Subject Matter
Claims 11, 14-17 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 1, 3-9, 19 are allowed.
Regarding Claim 1, the prior art of record fails to disclose or suggest a driving backplane comprising wherein the driving circuit layer comprise a plurality of signal lines, and orthogonal projections of at least two of the signal lines on the substrate intersect to form an overlapping area; and an orthogonal projection of each of the first protective layer structures on the substrate does not overlap with the overlapping area.
Examiner’s comments: the closest prior art references (Xu CN 114725126A; Du US 2024/0347541; Wang US 2022/0336556; Fan US 2024/0243067) are all directed in part to a driving backplane, comprising a plurality of pad areas, the driving backplane comprises: a substrate; a driving circuit layer, disposed on a side of the substrate, a protective layer, disposed on a side of the driving circuit layer facing away from the substrate and a plurality of pads, formed on sides of the first protective layer structures facing away from the driving circuit layer; wherein each of the plurality of pads is connected with the driving circuit layer through a via hole in each of the first protective layer structures, similar to the instant invention.
However, the combination of references neither anticipates nor renders obvious features of the driving backplane comprising wherein the driving circuit layer comprise a plurality of signal lines, and orthogonal projections of at least two of the signal lines on the substrate intersect to form an overlapping area; and an orthogonal projection of each of the first protective layer structures on the substrate does not overlap with the overlapping area.
Regarding Claim 19, the prior art of record fails to disclose or suggest a driving backplane comprising wherein the driving circuit layer comprise a plurality of signal lines, and orthogonal projections of at least two of the signal lines on the substrate intersect to form an overlapping area; and an orthogonal projection of each of the first protective layer structures on the substrate does not overlap with the overlapping area.
Examiner’s comments: the closest prior art references (Xu CN 114725126A; Du US 2024/0347541; Wang US 2022/0336556; Fan US 2024/0243067) are all directed in part to a driving backplane, comprising a plurality of pad areas, the driving backplane comprises: a substrate; a driving circuit layer, disposed on a side of the substrate, a protective layer, disposed on a side of the driving circuit layer facing away from the substrate and a plurality of pads, formed on sides of the first protective layer structures facing away from the driving circuit layer; wherein each of the plurality of pads is connected with the driving circuit layer through a via hole in each of the first protective layer structures, similar to the instant invention.
However, the combination of references neither anticipates nor renders obvious features of the driving backplane comprising wherein the driving circuit layer comprise a plurality of signal lines, and orthogonal projections of at least two of the signal lines on the substrate intersect to form an overlapping area; and an orthogonal projection of each of the first protective layer structures on the substrate does not overlap with the overlapping area.
Response to Arguments
Applicant's arguments filed on August 13, 2026, in response to the office action mailed on May 13, 2026, have been fully considered but they are not persuasive.
With respect to claim 10, the examiner has properly rejected each limitation provided using Xu (CN 114725126 A) in view of Du (US 2024/0347541). The applicant did not provide a response to claim 10. Applicant should submit an argument under the heading “Remarks” pointing out disagreements with the examiner’s contentions. Applicant must also discuss the references applied against the claims, explaining how the claims avoid the references or distinguish from them. Therefore, the examiner maintains the rejection.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to QUINTON A BRASFIELD whose telephone number is (571)272-0804. The examiner can normally be reached M-F 9AM-4PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on 571-272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format.
For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Q.A.B/ Examiner, Art Unit 2814
/WAEL M FAHMY/ Supervisory Patent Examiner, Art Unit 2814
Prosecution Insights