DETAILED ACTION
This office action is in response to the application filed 12/17/2023.
Currently, claims 1-12 are pending.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Objections
Claims 1 and 5 are objected to because of the following informalities:
Pertaining to claim 1, the term “comprising” in line 11 is not appropriate for a “wherein” clause. Either the term “wherein” should be removed from line 10, or the term “comprising” should be changed to “comprises”.
Pertaining to claim 5, the term “layer” in line 2 should instead be “layers”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “two top surfaces of the semiconductor layer on a side of the semiconductor layer” in line 3. This language is confusing. It is not clear how multiple top surfaces of an object can be on a side of that object.
Furthermore, claim 1 recites the limitation “adjacent between” in line 6. “Adjacent” is a term that describes the relative position of one object with respect to another object. “Between” is a term that describes the relative position of one object with respect to two objects. It is not clear what is meant by “adjacent between”.
Claims 2-12 recite the same limitations via dependency.
Additionally, claim 2 recites the limitation “wherein the top surface of the protrusion is disposed between top surfaces of the two ohmic contact layers and top surfaces of the two leakage current suppression layers”. This is unclear in light of the disclosure. See e.g. FIG. 4. The top surface T3 of the protrusion is not present at a location that is between the top surfaces 103T, 104T of the two ohmic contact layers and top surfaces 101T, 102T of the two leakage current suppression layers, as the protrusion is arranged next to the ohmic contact layers and the leakage current suppression layers. For purposes of examination, the limitation is interpreted to mean that the top surface of the protrusion is located at a height that is between the heights at which the top surfaces of the two ohmic contact layers and top surfaces of the two leakage current suppression layers are located.
Furthermore, claim 11 recites “the two ohmic contact layers has two side surfaces away from the two side surfaces of the protrusion”. It is not clear whether each ohmic contact layer has two side surfaces, or if the claimed two side surfaces are each of the side surface of the one ohmic contact layer and the side surface of the other ohmic contact layer.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
Claims 1-2 and 4-6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Makiyama (US 10,249,749).
Pertaining to claim 1, Makiyama shows, with reference to FIG. 1, a semiconductor component, comprising:
a semiconductor layer (102/104), wherein the semiconductor layer has a protrusion (between 112s and 112d) and two top surfaces of the semiconductor layer (below 132’s) on a side of the semiconductor layer, the two top surfaces of the semiconductor layer are adjacent to the protrusion, the protrusion comprising a top surface and two side surfaces, one of the two side surfaces of the protrusion is adjacent between the top surface of the protrusion and one of two top surfaces of the semiconductor layer, and the other one of the two side surfaces of the protrusion is adjacent between the top surface of the protrusion and the other one of two top surfaces of the semiconductor layer (FIG. 1);
a barrier layer (106), disposed on the top surface of the protrusion, wherein the barrier layer comprises two side surfaces;
two leakage current suppression layers (132), respectively disposed on the two top surfaces of the semiconductor layer;
two ohmic contact layers (131), respectively disposed on the two leakage current suppression layers, wherein the two ohmic contact layers are in contact with the two side surfaces of the protrusion and the two side surfaces of the barrier layer, wherein the two ohmic contact layers do not contact the two top surfaces of the semiconductor layer; and
two electrode layers (115s, 115d), respectively disposed on the two ohmic contact layers.
Pertaining to claim 2, Makiyama shows the top surface of the protrusion is disposed between top surfaces of the two ohmic contact layers and top surfaces of the two leakage current suppression layers (FIG. 1).
Pertaining to claim 4, Makiyama shows the ohmic contact layers comprise N-type GaN (col. 6, line 1).
Pertaining to claim 5, Makiyama shows the two ohmic contact layer are doped with silicon or germanium with a doping concentration between 1018 cm−3 and 1021 cm−3 (col. 6, lines 5-7).
Pertaining to claim 6, Makiyama shows the semiconductor layer comprises a channel layer (104), and the two ohmic contact layers contact side surfaces of the channel layer (FIG. 1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Makiyama in view of Furukawa et al. (US 9,583,577).
Makiyama shows the semiconductor component of claim 1, wherein the two leakage current suppression layers are respectively a first leakage current suppression layer and a second leakage current suppression layer, and the two electrode layers are respectively a first electrode layer and a second electrode layer, and the semiconductor component further comprises a third electrode layer (115g).
Makiyama fails to show the semiconductor component further comprises a third leakage current suppression layer, wherein the barrier layer, the third leakage current suppression layer and the third electrode layer are stacked in sequence.
However, Furukawa teaches a similar HEMT device in FIG. 1A that includes a leakage current suppression layer (53) under the gate electrode 52.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to substitute the Schottky gate of Makiyama for the insulated gate taught by Furukawa, as the court has held that the simple substitution of one known element for another to obtain predictable results is prima facie obvious. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Makiyama.
Although Makiyama does not explicitly show the work function value of the ohmic contact layers, the material taught by Makiyama is the same as the claimed material (see rejections of claims 4 and 5 above), and thus one of ordinary skill in the art would expect the properties to be the same or similar.
Allowable Subject Matter
As discussed above, none of the claims are allowable at least due to rejections under 35 U.S.C. 112(b). However, allowable subject matter is identified.
The following is a statement of reasons for the indication of allowable subject matter:
Pertaining to claim 3, the leakage current suppression layers of Makiyama are regrown semiconductor materials. Thus, one of ordinary skill in the art would not find it obvious for the leakage current suppression layers to be any of the insulating materials listed in claim 3.
Pertaining to claim 7, the semiconductor layer of Makiyama is a buffer layer itself. Thus, one of ordinary skill in the art would not find it obvious to include a buffer layer on another side of the semiconductor layer.
Pertaining to claim 9, the prior art of record does not teach the specific feature of the bottom surfaces of the two ohmic contact layers being in contact with and smaller than top surfaces of the two leakage current suppression layers, in combination with the limitations of claim 1.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL M LUKE whose telephone number is (571)270-1569. The examiner can normally be reached Monday-Friday, 9am-5pm, EST.
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/DANIEL LUKE/Primary Examiner, Art Unit 2896
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