DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 12/02/2025 and 12/28/2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Election/Restrictions
Applicant’s election of Group I and Species 1 in the reply filed on 04/24/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claims 4-8 and 15-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group II (clms 18-20) and/or Species II (clms 4-6 and 15) and Species III (clms 7-8 and 16), there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 04/24/2026.
Claims 1-3 and 9-14 are pending examination.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 12, last line, recites “a first connection terminal”. It is unclear if this is the same first connection terminal introduced earlier in the claim of is this is a new connection terminal? For the purpose of expediting prosecution, the Office is going to interpret the claim as this being the same first connection terminal.
Note: all dependent claims necessarily inherit the indefiniteness of the claims from which they depend.
Drawings
Fig. 1a through Fig. 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3 and 9-14 are rejected under 35 U.S.C. 103 as being obvious over Applicant’s Admitted Prior Art (AAPA) and Min et al. (PG Pub 2016/0276308; hereinafter Min).
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Regarding claim 1, refer to Fig. 1e provided above, AAPA teaches a die package structure, comprising:
a package substrate (annotated “pkg sub”) comprising:
a first surface (annotated “a1”) and a second surface (annotated “a2”) opposite the first surface a1 on the package substrate;
a heat dissipation connection point (annotated “point”) disposed on the first surface a1 (see Fig.1e);
a heat conduction channel (annotated “Q”) formed in the package substrate and extending to the heat dissipation connection point; and
a first connection terminal 6’, the first connection terminal being disposed on the second surface a2 for connecting to an external device 7’ (see Fig. 1e);
a die 2’ coupled to the package substrate (see Fig. 1e), the die comprising a hotspot 31’, the heat conduction channel Q of the package substrate extending between the hotspot R of the die and the heat dissipation connection point of the package substrate (see Fig. 1e); and
a first package body 42’ disposed on the first surface a1 (see Fig. 1e).
Although, AAPA teaches the first package body, it does not explicitly teach “the first package body comprising a heat conduction structure formed in the first package body, the heat conduction structure extending from the heat dissipation connection point to a first package body surface of the first package body.”
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In the same field of endeavor, refer to Fig. 1a-provided above, Min teaches a thermally enhanced package-on-package structure 100 comprising: a first package body 150; wherein the first package body comprises a heat conduction structure 180 formed in the first package body, the heat conduction structure extending from a heat dissipation connection point 130 to a first package body surface (top of 150) of the first package body (see Fig. 1a).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the heat conduction structure, as taught by Min, to provide a thermal path from the semiconductor device to the heat dissipation layer (see para [0054]).
Regarding claim 2, refer to the figures cited above, the combination of AAPA and Min teach a heat conduction structure 180 thermal resistance value of the heat conduction structure (copper) is less than a first package body 150 thermal resistance value of the first package body (epoxy) (para [0053-0054]).
Regarding claim 3, refer to the figures cited above, the combination of AAPA and Min teach the heat dissipation connection point (Q) comprising a heat dissipation pad (annotated “pad”) (see Fig. 1e).
Regarding claim 9, refer to the figures cited above, the combination of AAPA and Min teach an electronic device (annotated “electronic device”-AAPA = 141-Min) disposed on the first surface (annotated “a1”-AAPA = 150-Min), wherein the first package body wraps the electronic device (see figures cited above); and an electrical channel (Q-AAPA) between the electronic device and the die, the electrical channel being formed in the package substrate (see Fig. 1e).
Regarding claim 10, refer to the figures cited above, the combination of AAPA and Min teach a second connection terminal (annotated “term-2”) is disposed on a surface a1 facing the first package body, the second connection terminal being configured to connect to the package substrate (“pkg sub”) (see Fig. 1e).
Regarding claim 11, refer to the figures cited above, the combination of AAPA and Min teach a protective coating 10’-AAPA = 170-Min) formed on the surface of the first package body (top surface) (see figures cited above).
Regarding claim 12, refer to Fig. 1e provided above, AAPA teaches a die package system (see claim limitations below), comprising:
a die package structure 100, the die package structure comprising:
a package substrate (annotated “pkg sub”) comprising:
a first surface (annotated “a1”) and a second surface (annotated “a2”) opposite the first surface a1 on the package substrate (see Fig. 1e);
a heat dissipation connection point (annotated “point”) disposed on the first surface a1;
a heat conduction channel (annotated “Q”) formed in the package substrate and extending to the heat dissipation connection point (see Fig. 1e); and
a first connection terminal 6’, the first connection terminal being disposed on the second surface for connecting to an external device 7’ (the circuit board being the external device);
a die 2’ coupled to the package substrate, the die comprising a hotspot 21’, the heat conduction channel of the package substrate extending between the hotspot R of the die and the heat dissipation connection point of the package substrate (see Fig. 1e);
a first package body 42’ disposed on the first surface; and
a circuit board 7’ coupled to the die package structure by a first connection terminal (see Fig. 1e);
Although, AAPA teaches the first package body, it does not explicitly teach “the first package body comprising a heat conduction structure formed in the first package body, the heat conduction structure extending from the heat dissipation connection point to a first package body surface of the first package body.”
In the same field of endeavor, refer to Fig. 1a-provided above, Min teaches a thermally enhanced package-on-package structure 100 comprising: a first package body 150; wherein the first package body comprises a heat conduction structure 180 formed in the first package body, the heat conduction structure extending from a heat dissipation connection point 130 to a first package body surface (top of 150) of the first package body (see Fig. 1a).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the heat conduction structure, as taught by Min, to provide a thermal path from the semiconductor device to the heat dissipation layer (see para [0054]).
Regarding claim 13, refer to the figures cited above, the combination of AAPA and Min teach a heat conduction structure 180 thermal resistance value of the heat conduction structure (copper) is less than a first package body 150 thermal resistance value of the first package body (epoxy) (para [0053-0054]).
Regarding claim 14, refer to the figures cited above, the combination of AAPA and Min teach the heat dissipation connection point (Q) comprising a heat dissipation pad (annotated “pad”) (see Fig. 1e).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christina A Sylvia whose telephone number is (571)272-7474. The examiner can normally be reached on 8am-4pm (M-F).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached on 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHRISTINA A SYLVIA/Examiner, Art Unit 2817
/MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817
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