Prosecution Insights
Last updated: April 19, 2026
Application No. 18/542,814

SEMICONDUCTOR DEVICE

Non-Final OA §102§103
Filed
Dec 18, 2023
Examiner
ARMAND, MARC ANTHONY
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fuji Electric Co. Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
87%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
861 granted / 1037 resolved
+15.0% vs TC avg
Minimal +4% lift
Without
With
+3.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
33 currently pending
Career history
1070
Total Applications
across all art units

Statute-Specific Performance

§101
3.2%
-36.8% vs TC avg
§103
57.0%
+17.0% vs TC avg
§102
21.7%
-18.3% vs TC avg
§112
9.7%
-30.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1037 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4,14 is/are rejected under 35 U.S.C. 102(a1) as being unpatentable over Lee et al., (Lee) US 2015/0021658. Regarding claim 1, Lee shows in FIG. 3-7, a semiconductor device comprising: a semiconductor substrate (100)[0069] that has an upper surface and a lower surface, and includes a drift region (n-)[0078] of a first conductivity type; a base region (106)[0076] of a second conductivity type that is provided between the drift region (n-)and the upper surface of the semiconductor substrate (10); a plurality of trench portions(112,114,116)[0080,0087,0082] that are provided from the upper surface of the semiconductor substrate (10) to below the base region (106), and include a gate trench (112,114,116) portion and a dummy trench portion (connected to 137); a first lower end region (105, under 114,112) of the second conductivity type (p) that is provided to be in contact with lower ends of two or more trench portions (114,112) which include the gate trench portion; a well region (104) of the second conductivity type that is arranged in a different location from the first lower end region in a top view, provided from the upper surface of the semiconductor substrate (100) to below the base region, and has a doping concentration higher (p+) than that of the base region; and a second lower end region (105 below 114-2) of the second conductivity type (p) that is provided between the first lower end region and the well region in a top view being separated from the first lower end region and the well region, and provided to be in contact with lower ends of one or more trench portions including the gate trench portion (114-2). Regarding claim 2, Lee shows in FIG. 3-7, a semiconductor device wherein the number of the trench portions in contact with one of second lower end regions (105), each being identical to the second lower end region, is less (1 trench) than the number of the trench portions in contact with one of first lower end regions (105 covering 114-1,112-2), each being identical to the first lower end region. Regarding claim 3, Lee shows in FIG. 3-7, a semiconductor device, wherein one of second lower end regions (105 covering 114-2), each being identical to the second lower end region, is in contact with a lower end of one of gate trench portions, each being identical to the gate trench portion (114-2), and is not in contact with a lower end of the gate trench portion other than that of the one of the gate trench portions. Regarding claim 4, Lee shows in FIG. 3-7, a semiconductor device, wherein one of first lower end regions (105 covering 114-1,112-2), each being identical to the first lower end region, is in contact with lower ends of a plurality of gate trench portions, each being identical to the gate trench portion, and a plurality of dummy trench portions (137), each being identical to the dummy trench portion. Regarding claim 14, Lee shows in FIG. 3-7, a semiconductor device, wherein for each of two or more of the gate trench portions (112,114,116), the second lower end region being separated from each other is provided. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee. Regarding claim 7, Lee shows in FIG. 3-7, the semiconductor device, wherein a doping concentration of the second lower end region (105 can be different) at the lower end of the gate trench portion is greater than a doping concentration of the first lower end region (the concentration can be different) [0079] at the lower end of the gate trench portion. As for the different concentration, it would have been obvious to one having ordinary skill in the art at the time of the invention was made to have different doping concentration, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use. In re Leshin, 125 USPQ 416. MPEP 2144.07 Allowable Subject Matter Claims 5,6,8-13,15-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARC-ANTHONY ARMAND whose telephone number is (571)272-5178. The examiner can normally be reached 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B Gauthier can be reached at 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MARC - ANTHONY ARMAND Examiner Art Unit 2813 /STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

Dec 18, 2023
Application Filed
Feb 05, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
87%
With Interview (+3.9%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 1037 resolved cases by this examiner. Grant probability derived from career allow rate.

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