Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/18/2023 is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1,3,7,10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al, US 20210328039 A1.
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Pertaining to claim 1, Lee teaches ( see fig.3 above) A semiconductor device comprising: a substrate[100]; an active pattern[101] on the substrate[100], the active pattern[101] extending in a first horizontal direction; first[11], second[112], and third [113] nanosheets sequentially stacked on the active pattern[101], the first to third nanosheets [11,112,113] are spaced apart from each other in a vertical direction, wherein the third nanosheet [113] is an uppermost nanosheet of the first to third nanosheets; a gate electrode[121] on the active pattern[101] and extending in a second horizontal direction crossing the first horizontal direction, the gate electrode[121] surrounding each of the first, second, and third nanosheets ( see fig.4); a source/drain region[160] on the active pattern[101] and disposed on at least one side of the gate electrode[121]; an interlayer insulating layer[140] covering the source/drain region[160]; and a source/drain contact[165] penetrating the interlayer insulating layer[140] in the vertical direction, the source/drain contact[165] is connected to the source/drain region[160], wherein at least a portion of the interlayer insulating layer[140] is disposed between sidewalls of the source/drain contact [165] and the source/drain region[160] in the first horizontal direction, the at least portion( using BRI for any small portion in the same plane) of the interlayer insulating layer[140] overlapping sidewalls of the third nanosheet[113] along the first horizontal direction.
Pertaining to claim 3, Lee teaches ( see fig.3 above) The semiconductor device of claim 1, wherein the sidewalls of the source/drain contact[165] do not directly contact the source/drain region[160].
Pertaining to claim 7, Lee teaches ( see fig.3 above) The semiconductor device of claim 1, wherein a bottom surface of the source/drain contact[165] is flat.
Pertaining to claim 10, Lee teaches ( see fig.3 above) The semiconductor device of claim 1, wherein the source/drain contact[165] is composed of a single film.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 8 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al, US 20210328039 A1 in view of Hong et al, US 20230120532 A1
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Pertaining to claim 8 and 11, Lee teaches ( see fig.3 above) the semiconductor device of claim 1, but is silent about wherein a bottom surface of the source/drain contact has a convex curved shape extending towards the substrate and also silent about The semiconductor device of claim 1, wherein the source/drain contact includes a barrier layer defining the sidewalls and a bottom surface of the source/drain contact, and a filling layer disposed on the barrier layer.
However, in the same filed of endeavor, Hong teaches ( see fig.27 of Hong above) wherein a bottom surface of the source/drain contact [160] has a convex curved shape extending towards the substrate[101 and wherein the source/drain contact[160] includes a barrier layer [161] defining the sidewalls and a bottom surface of the source/drain contact[160], and a filling layer[163] disposed on the barrier layer[161].
In view of Hong, it would have been obvious to one of ordinary skill in the art to incorporate those teaching of Hong into that of Lee as a matter of design choice and further to prevent diffusion of the filling layer and cause leakage.
Claim(s) 9,12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al, US 20210328039 A1 in view of Kim et al, US 20220285493 A1.
Pertaining to claim 9,12 Lee teaches ( see fig.3 above) The semiconductor device of claim 1, but is silent to further comprising: an inner spacer disposed between the source/drain region and a portion of the gate electrode positioned between each of the first, second, and third nanosheets and between the source/drain region and a portion of the gate electrode positioned between the first nanosheet and the active pattern and further silent wherein a bottom surface of the source/drain contact overlaps sidewalls of the second nanosheet along the first horizontal direction.
However, in the same filed of endeavor, Kim teaches ( see fig.2 of Kim) to further comprising: an inner spacer [114] disposed between the source/drain region[140] and a portion of the gate electrode[110] positioned between each of the first, second, and third nanosheets[NW1s] and between the source/drain region[140] and a portion of the gate electrode[110] positioned between the first nanosheet and the active pattern[101] and also wherein a bottom surface of the source/drain contact[160] overlaps sidewalls of the second nanosheet[NW1s] along the first horizontal direction.
In view of Kim, it would have been obvious to one of ordinary skill in the art to incorporate those teaching of Kim into that of Lee a s matter of design choice by improving the reliability of the semiconductor device and lowering the driving power of the semiconductor device.
Allowable Subject Matter
Claims 13-20 allowed.
The closest prior art of record of Lee et al, US 20210328039 A1 teaches the limitation of " A semiconductor device comprising: a substrate; an active pattern on the substrate, the active pattern extending in a first horizontal direction; first, second, and third nanosheets sequentially stacked on the active pattern, the first to third nanosheets are spaced apart from each other in a vertical direction, wherein the third nanosheet is an uppermost nanosheet of the first to third nanosheets; a gate electrode on the active pattern, the gate electrode extending in a second horizontal direction crossing the first horizontal direction, the gate electrode surrounding each of the first, second, and third nanosheets; a source/drain region on the active pattern and disposed on at least one side of the gate electrode, but it does not teach or suggest, singularly or in combination, at least the limitations of the independent claim 13 including “an etching stop layer disposed along a top surface of the source/drain region; a source/drain contact penetrating the etching stop layer in the vertical direction, the source/drain contact is connected to the source/drain region; and a silicide layer disposed between a bottom surface of the source/drain contact and the source/drain region, wherein the silicide layer is not disposed on sidewalls of the source/drain contact, wherein at least a portion of the etching stop layer is disposed between sidewalls of the source/drain contact and the source/drain region, the at least portion of the etching stop layer overlapping sidewalls of the third nanosheet along the first horizontal direction.”
it does not also teach or suggest, singularly or in combination, at least the limitations of the independent claim 20 including “an etching stop layer disposed along a top surface of the source/drain region; an interlayer insulating layer disposed on the etching stop layer; a source/drain contact penetrating the etching stop layer and the interlayer insulating layer in the vertical direction, the source/drain contact is connected to the source/drain region; and a silicide layer disposed between a bottom surface of the source/drain contact and the is source/drain region, the silicide layer is not disposed on sidewalls of the source/drain contact, wherein at least a portion of the etching stop layer and at least a portion of the interlayer insulating layer is disposed between the sidewalls of the source/drain contact and the source/drain region, the at least portion of the etching stop layer and the at least portion of the interlayer insulating layer overlapping the third nanosheet along the first horizontal direction; and wherein inner sidewalls of the source/drain region that face the sidewalls of the source/drain contact have a rectilinearly inclined profile extending from the bottom surface of the source/drain contact towards the sidewalls of the third nanosheet.”
Claims 2,4-6 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The closest prior art of record of Dip (US 2012/0003825 A1) teaches the limitation of claim 1, but it does not teach or suggest, singularly or in combination, at least the limitations of the dependent claim 2 including “further comprising: an etching stop layer disposed between the source/drain region and the interlayer insulating layer, wherein at least a portion of the etching stop layer is disposed between the sidewalls of the source/drain contact and the sidewalls of the source/drain region in the first horizontal direction, the at least portion of the etching stop layer overlapping the third nanosheet along the first horizontal direction.” in combination with the remaining limitations of the claim.
it does not also teach or suggest, singularly or in combination, at least the limitations of the dependent claim 4 including “further comprising: a silicide layer disposed between a bottom surface of the source/drain contact and the source/drain region, wherein the silicide layer is not disposed on the sidewalls of the source/drain contact.”
it does not also teach or suggest, singularly or in combination, at least the limitations of the dependent claim 5 including “wherein inner sidewalls of the source/drain region that face the sidewalls of the source/drain contact have a rectilinearly inclined profile extending from a bottom surface of the source/drain contact towards the sidewalls of the third nanosheet.”
it does not also teach or suggest, singularly or in combination, at least the limitations of the dependent claim 6 including “wherein inner sidewalls of the source/drain region that face the sidewalls of the source/drain contact have a convex inclined profile extending towards the sidewalls of the source/drain contact.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO 892.
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/MAMADOU L DIALLO/Primary Examiner, Art Unit 2897