DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/18/2026 has been entered. An action on the RCE follows.
Response to Arguments
Applicant’s reply filed on 05/18/2026 has been entered and considered. Applicant’s amendments necessitated the shift in grounds of rejection detailed below. The shift in grounds of rejection renders Applicant’s arguments moot.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the limitation “the first metal line disposed in a first trench having a depth dl, the second metal line disposed in a second trench having a depth d2, wherein dl is less than d2; and wherein dl and d2 are measured at locations away from any via connected to the first metal line and the second metal line respectively”, claim 33, must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 21-28 and 30-31 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Regarding Claim 21, The instant claims recite limitation “ the dielectric layer comprising a first region without a via and a second region without a via; wherein the first region comprises a portion of the first metal line in a first trench having a depth dl; wherein the second region comprises a portion of the second metal line in a second trench having a depth d2; ” is not clear because claim recites, first and second region without a via, however claim also recites first and second region includes first and second trench, which contradicts claim limitation. Therefore, the resulting claim is indefinite and is failing to particularly point out and distinctly claim the subject matter. Appropriate corrections defining these limitations within metes and bounds of the claimed invention are required.
Claims 22-28 and 30-31 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, because of their dependency status from claim 21.
Claim Rejection- 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 33-34 are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al (US 2011/0062587 A1; hereafter Baker) in view of Bonilla et al (US 2011/0175226 A1; hereafter Bonilla).
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Regarding claim 33. Yang discloses an integrated circuit comprising:
a substrate (Fig 7, “initial interconnect structure 10 can be formed by applying the first dielectric material 18 to a surface of a substrate (not shown)”, Para [ 0022]) comprising a dielectric layer (Fig 7, multilevel interconnect includes dielectric layers [16,14, 18], Para [ 0021-0026]);
a first metal line (left conductive structure 38, Para [ 0038]) extending parallel to the substrate and comprising a narrow-line bamboo microstructure (conductive structure 38, Para [ 0038,0047]), disposed in the dielectric layer (Fig 7, multilevel interconnect includes dielectric layers [16,14, 18], Para [ 0021-0026]);
a second metal line (right conductive structure 38, Para [ 0038]) extending parallel to the substrate and comprising a narrow-line microstructure (right conductive structure 38, Para [ 0038]), disposed in the dielectric layer (Fig 7, multilevel interconnect includes dielectric layers [16,14, 18], Para [ 0021-0026]);
the first metal line disposed in a first trench having a depth dl, the second metal line disposed in a second trench having a depth d2, wherein dl is less than d2 (left and right conductive structure 38, Para [ 0038]); and
wherein dl and d2 are measured at locations away from any via connected to the first metal line and the second metal line respectively (Fig 7).
But Yang does not disclose explicitly a second metal line comprising a narrow-line polycrystalline.
In a similar field of endeavor, Bonilla discloses a second metal line comprising a narrow-line polycrystalline (Fig 1[b], region 152, Para [ 0009, 0019, 0026]).
Since Yang and Bonilla are both from the similar field of endeavor, and Bonilla discloses interconnection line includes polycrystalline structure. Therefore, the purpose disclosed by Bonilla would have been recognized in the pertinent art of Yang. Therefore, it would have been obvious to one of the ordinary skilled in the art before the effective filing date of the invention to combine Yang in light of Bonilla teaching “a second metal line comprising a narrow-line polycrystalline (Fig 1[b], region 152, Para [ 0009, 0019, 0026])” for further advantage such as improved electromigration resistance characteristics.
Regarding claim 34. Yang and Bonilla discloses the integrated circuit of claim 33, Yang further discloses further comprising:
a first liner (left diffusion barrier 30, Para [ 0035]) disposed between the dielectric layer (Fig 7, multilevel interconnect includes dielectric layers [16,14, 18], Para [ 0021-0026]) and the first metal line (left conductive structure 38, Para [ 0038]);
a second liner (right conductive structure 38, Para [ 0038]) disposed between the dielectric layer (Fig 7, multilevel interconnect includes dielectric layers [16,14, 18], Para [ 0021-0026]) and the second metal line (right conductive structure 38, Para [ 0038]); and wherein the first liner (left diffusion barrier 30, Para [ 0035]) and the second liner (right conductive structure 38, Para [ 0038]) consist of the same material ( Para [ 0033]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOIN M RAHMAN whose telephone number is (571)272-5002. The examiner can normally be reached 8:30-5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOIN M RAHMAN/Primary Examiner, Art Unit 2898
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