Prosecution Insights
Last updated: July 17, 2026
Application No. 18/543,862

HIGH EFFICIENCY QUANTUM DOT IMAGE SENSORS AND METHODS OF FORMING THE SAME

Non-Final OA §102§103
Filed
Dec 18, 2023
Priority
Sep 29, 2023 — provisional 63/541,578
Examiner
SUN, YU-HSI DAVID
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Adeia Technologies Inc.
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
669 granted / 867 resolved
+9.2% vs TC avg
Moderate +8% lift
Without
With
+8.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
34 currently pending
Career history
888
Total Applications
across all art units

Statute-Specific Performance

§101
3.8%
-36.2% vs TC avg
§103
58.6%
+18.6% vs TC avg
§102
11.8%
-28.2% vs TC avg
§112
15.2%
-24.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 867 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species I in the reply filed on 5/11/2026 is acknowledged. Claims 17-18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 5/11/2026. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4 and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by CHO et al. (US PG Pub 2021/0249453, hereinafter Cho). Regarding claim 1, figure 1 of Cho discloses a method of forming an image sensor comprising a conductive matrix and electrodes disposed in electrical communication with the conductive matrix, the method comprising: forming the conductive matrix, the conductive matrix comprising a transparent conductive material layer (104) and quantum dots (105) disposed in the transparent conductive material layer; and before or after forming the conductive matrix, forming the electrodes (106, 107), wherein the electrodes are disposed on a same side of the conductive matrix. Regarding claim 2, figure 1 of Cho discloses the transparent conductive material layer (104) comprises a transparent conductive oxide (¶ 53). Regarding claim 3, figure 1 of Cho discloses the transparent conductive oxide (104) comprises indium tin oxide, zinc oxide, tin oxide, aluminum doped zinc oxide, indium oxide, cadmium oxide, or some combination thereof (¶ 53). Regarding claim 4, figure 1 of Cho discloses the transparent conductive oxide (104) at least partially encapsulates the quantum dots (105). Regarding claim 10, figure 1 of Cho discloses the image sensor comprises a repeating pattern of conductive matrices and corresponding electrodes (¶ 89). Claims 1 and 11-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Toda (US PG Pub 2014/0306182) Regarding claim 1, figure 1 of Toda discloses a method of forming an image sensor comprising a conductive matrix and electrodes disposed in electrical communication with the conductive matrix, the method comprising: forming the conductive matrix, the conductive matrix comprising a transparent conductive material layer (22) and quantum dots (23) disposed in the transparent conductive material layer; and before or after forming the conductive matrix, forming the electrodes (13), wherein the electrodes are disposed on a same side of the conductive matrix. Regarding claim 11, figure 1 of Toda discloses forming a dielectric layer (31) on the conductive matrix. Regarding claim 12, figure 1 of Toda discloses the electrodes (13) comprise bond pads disposed in a dielectric layer (15). Regarding claim 13, figure 1 of Toda discloses the electrodes (21, alternate interpretation of Toda) are electrically connected to bond pads (13) via interconnects (16) in an interconnect layer (15). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 7, 9, and 24-25 are rejected under 35 U.S.C. 103 as being unpatentable over LEE et al. (US PG Pub 2020/0373458, hereinafter Lee). Regarding claim 7, Cho does not explicitly disclose patterning the transparent conductive material layer (104) and the quantum dots (105) disposed in the transparent conductive material layer. However, it would have been obvious to pattern said layers since it is a well known method of selective formation of a layer. Regarding claim 9, Cho does not explicitly the conductive matrix further comprises conductive particles in the transparent conductive material layer (104). In the same field of endeavor, figure 1 of Lee discloses a conductive matrix (13) comprises conductive particles (133) along with quantum dots (131). In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include conductive particles in the conductive matrix as taught by Lee for the purpose of increasing the lifetime of the quantum dot film (¶ 8). Regarding claim 24, Lee does not explicitly disclose a ratio of a mean diameter of the quantum dots to a mean diameter of the conductive particles is greater than about 10. However, it would have been obvious to form the particles and dots to have diameters where the ratio is within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)). Regarding claim 25, Lee discloses the conductive particles are nano-silver wires (¶ 26) which would comprise a reflective surface at least to a certain degree. Allowable Subject Matter Claims 5-6, 8, and 14-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU-HSI DAVID SUN whose telephone number is (571)270-5773. The examiner can normally be reached Mon-Fri 8am-4pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YU-HSI D SUN/ Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Dec 18, 2023
Application Filed
Jun 04, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
86%
With Interview (+8.5%)
2y 8m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 867 resolved cases by this examiner. Grant probability derived from career allowance rate.

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