Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 1-12 is objected to because of the following informalities: The "and/or" of 1 and 12 lacks clarity as whether the “or” applies to the overall “wiring pattern” or of the wiring pattern of the plurality of first lines, the wiring pattern of the plurality of first lines, the wiring pattern of the plurality of second lines, the wiring pattern of the plurality of third lines, or the wiring pattern of the plurality of fourth lines. For examination purposes, the “and” or is interpreted as “and.” Appropriate correction is required.
Further, the numbered labeling is inconsistent. For example, in claim 3, a second qubit and second coupler is recited with no previous reference to a first qubit and first coupler. Please review of the numerical labeling of items to ensure clarity.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 7, 8, 10, 11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 recites the limitation "the qubit” and “the first line". There is insufficient antecedent basis for this limitation in the claim. The reference to qubits and first line in claim 1 recites “a plurality of”. For examination purposes, “the qubit” and “the first line” is interpreted as “one of the plurality of qubits” and “one of the plurality of first lines”.
Claim 7 recites the limitation “the first line", “the second line", “the third line" and “the fourth line". There is insufficient antecedent basis for this limitation in the claim. The reference to “the first line", “the second line", “the third line" and “the fourth line" in claim 1 recites “a plurality of”. For examination purposes, “the first line", “the second line", “the third line" and “the fourth line" is interpreted as “one of the plurality of first lines”, “one of the plurality of second lines”, “one of the plurality of third lines”, and “one of the plurality of fourth lines”.
Claim 7 recites “including four qubits and one coupler”. There is insufficient antecedent basis for this limitation in the claim. The “four qubits” do not declare their relationships with “the qubit” of claim 1. For examination purposes, “including four qubits” is interpreted as including the qubit of claim 1.
Claim 8 recites the limitation “the quantum chip.” There is insufficient antecedent basis for this limitation in the claim. Claim 7 recites a chip but not a quantum chip. For examination purposes, “the chip” of claim 7 is interpreted as “the quantum chip”.
Claim 8 recites the limitation “the coupling port.” There is insufficient antecedent basis for this limitation in the claim. Claim 8 recites “one or more coupling ports” it is not clear which coupling port is the coupling port. For examination purposes, “the coupling port” of claim 8 is interpreted as “one of the coupling ports”.
Claim 10 recites the limitation “the coupler.” There is insufficient antecedent basis for this limitation in the claim. Claim 10 recites “a plurality of couplers” it is not clear which coupler is the coupler. For examination purposes, “the coupler” of claim 10 is interpreted as “one of the plurality of couplers”.
Claim 10 recites the limitation “the third line.” There is insufficient antecedent basis for this limitation in the claim. Claim 10 recites “a plurality of third lines” it is not clear which third line is the third line. For examination purposes, “the third line” of claim 10 is interpreted as “one of the plurality of third lines”.
Claim 11 recites the limitation “the qubit.” There is insufficient antecedent basis for this limitation in the claim. Claim 11 recites “a plurality of qubits” it is not clear which qubit is the qubit. For examination purposes, “qubit” of claim 11 is interpreted as “one of the plurality of third lines”.
Reasons for Allowance
The following is an examiner’s statement of reasons for allowance:
The prior art fails to disclose or teach an obvious combination of the following limitations when taken with the claim as a whole:
Claim 1:
a first pattern that includes a pattern of adjacent three lines in which one of the second line and the fourth line is disposed between two lines selected from among the plurality of first lines and the plurality of third lines; and
a second pattern that includes a pattern of adjacent three lines in which two lines selected from among the plurality of second lines and the plurality of fourth lines, are disposed on both sides of one of the first line and the third line.
Claim 2- 11 depend upon and allowable claim; therefore, they are allowable.
Claim 12:
wherein an arrangement pattern of three adjacent terminals among the first to fourth terminals includes:
a first arrangement pattern in which one of the second and fourth terminals is placed between two terminals selected from among the first and third terminals, and
a second arrangement pattern in which two terminals selected from among the second and fourth terminals are placed on both sides of one of the first and third terminals.
Prior art Siddiqi et al. teaches probe line terminal extending from qubits that are inductively coupled (Fig. 2B) but fails to teach:
a first arrangement pattern in which one of the second and fourth terminals is placed between two terminals selected from among the first and third terminals, and/or
a second arrangement pattern in which two terminals selected from among the second
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM C TRAPANESE whose telephone number is (571)270-3304. The examiner can normally be reached Monday - Friday 7am-12pm & 8pm-10pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WILLIAM C TRAPANESE/Primary Examiner, Art Unit 2812
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