Prosecution Insights
Last updated: April 19, 2026
Application No. 18/544,861

DETECTION DEVICE

Non-Final OA §103
Filed
Dec 19, 2023
Examiner
CHOUDHRY, MOHAMMAD M
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Japan Display Inc.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 10m
To Grant
95%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
561 granted / 686 resolved
+13.8% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
35 currently pending
Career history
721
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
73.7%
+33.7% vs TC avg
§102
10.7%
-29.3% vs TC avg
§112
4.8%
-35.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 686 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Xie (CN 111129051, hereinafter Xie) in view of Uchida (WO 2020/01055418, hereinafter Uchida). With respect to claim 1, Xie discloses a detection device (Abstract) comprising: a plurality of organic photodiodes (Page 03; Para 01-03) arranged in a detection area (Fig. 1); a plurality of capacitive elements each coupled in parallel to a corresponding organic photodiode of the organic photodiodes (Page 02; Para 02; and Fig. 1- there are multiple photosensitive diodes and capacitors 31- each photodiode and corresponding capacitor coupled in parallel); a circuit configured to read an electric charge amount stored in each of the capacitive elements (Page 02; Para 02 - the electric signal read out chip starts to read charge amount stored in the photosensitive diode capacitance) to acquire a detection value of each of the organic photodiodes (Page 03; Para 01); apply a reverse bias to the organic photodiodes (Page 02; Para 02; photosensitive diode is in a reverse bias state); and the organic photodiodes each comprise (Fig. 20): an active layer (141 of Fig. 20); an upper electrode (16) provided with an upper buffer layer (142) interposed between the upper electrode and the active layer (142 is between 16 and 141); and a lower electrode (15) provided with a lower buffer layer (140) interposed between the lower electrode and the active layer (140 is interposed between 15 and 141). Xie does not explicitly disclose that the circuit is an analog front-end (AFE); a power supply circuit configured to supply a power supply potential to collectively apply the reverse bias; and a control circuit configured to control the power supply potential. In an analogous art, Uchida discloses that the circuit is an analog front-end (AFE) (Page 03; last para – AFE); a power supply circuit (Page 03; last para – power supply circuit 103) configured to supply a power supply potential to collectively apply the reverse bias (Page 06; Para 01); and a control circuit configured to control the power supply potential (Page 03; last para – control circuit 102). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Xie’s device by having Uchida’s disclosure in order to provide power to the semiconductor device. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Xie/Uchida in view of Furst (WO 2018/106513, hereinafter Furst). With respect to claim 2, Xie/Uchida discloses the detection device according to claim 1. Xie/Uchida does not explicitly disclose wherein in the power supply potential, a second sensor power supply potential at a second time after a first time is higher than a first sensor power supply potential at the first time. In an analogous art, Furst discloses wherein in the power supply potential, a second sensor power supply potential at a second time after a first time is higher than a first sensor power supply potential at the first time (Para 0005; 0018; and 0048; multiple sensors - power supply ramp up). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Xie/Uchida’s device by having Furst’s disclosure in order to adjust power according to the processing requirements. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Xie/Uchida/Furst in view of Takahashi (US 2005/0078492, hereinafter Takahashi). With respect to claim 3, Xie/Uchida/Furst discloses the detection device according to claim 2. Xie/Uchida/Furst does not explicitly disclose wherein the control circuit is configured to determine, based on a plurality of output values output from the AFE circuit for the respective organic photodiodes, whether to increase the power supply potential. In an analogous art, Takahashi discloses wherein the control circuit is configured to determine (Para 0010; 0015), based on a plurality of output values output from the AFE circuit for the respective organic photodiodes, whether to increase the power supply potential (Para 0010; 0037; 0115 and 0126). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Xie/Uchida/Furst’s device by having Takahashi’s disclosure in order to adjust power according to the processing requirements. Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Xie/Uchida in view of Recker et al. (US 11,109,471, hereinafter Recker). With respect to claim 8, Xie/Uchida discloses the detection device according to claim 1. Xie/Uchida does not explicitly disclose a light source configured to emit light to the detection area, wherein the light source is configured to emit a substantially constant amount of light to the detection area when the control circuit determines whether to increase the power supply potential. In an analogous art, Recker discloses a light source configured to emit light to the detection area, wherein the light source is configured to emit a substantially constant amount of light to the detection area (Col. 40; lines 4-7; 45-50 – maintaining a constant light level) when the control circuit determines whether to increase the power supply potential (Col. 23; lines 40-42; Col. 231; lines 35-45 – increase the amount of power supply). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Xie/Uchida’s device by having Recker’s disclosure in order to manage power consumption of a semiconductor device. With respect to claim 9, Xie/Uchida/Recker discloses the detection device according to claim 8. Xie/Uchida does not explicitly disclose wherein the control circuit is configured to determine, each time a predetermined time has elapsed, whether to increase the power supply potential. In an analogous art, Recker discloses wherein the control circuit is configured to determine, each time a predetermined time has elapsed (Col. 20; lines 51-55), whether to increase the power supply potential (Col. 19; lines 50-55; Col. 20; lines 50-57; Col. 28; lines 64-67). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Xie/Uchida’s device by having Recker’s disclosure in order to manage power consumption of a semiconductor device. With respect to claim 10, Xie/Uchida/Recker discloses the detection device according to claim 9. Xie/Uchida does not explicitly disclose wherein the control circuit is configured to determine, at start-up, whether to increase the power supply potential. In an analogous art, Recker discloses wherein the control circuit is configured to determine, at start-up, whether to increase the power supply potential (Col. 38; lines 30-40). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Xie/Uchida’s device by having Recker’s disclosure in order to manage power consumption of a semiconductor device. Allowable Subject Matter Claim 4-7 is are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. With respect to claim 4, none of the prior art on record disclose or render obvious the claimed limitations including “The detection device according to claim 3, wherein the control circuit is configured to increase the power supply potential when, among the output values, the number of output values that are equal to or higher than a predetermined threshold is equal to or larger than a predetermined number” when considered as a whole along with all of the limitations of the base claim and any intervening claims. With respect to claim 5, none of the prior art on record disclose or render obvious the claimed limitations including “wherein the control circuit is configured to increase the power supply potential when an average value of a predetermined number of upper values of the output values and a predetermined number of lower values of the output values is equal to or higher than a predetermined threshold” when considered as a whole along with all of the limitations of the base claim and any intervening claims. With respect to claim 6, none of the prior art on record disclose or render obvious the claimed limitations including “wherein the control circuit is configured to increase the power supply potential when an average value of a predetermined number of upper values of the output values is equal to or higher than a predetermined first threshold, or an average value of a predetermined number of lower values of the output values is equal to or lower than a predetermined second threshold lower than the first threshold” when considered as a whole along with all of the limitations of the base claim and any intervening claims. With respect to claim 7, none of the prior art on record disclose or render obvious the claimed limitations including “wherein the control circuit is configured to increase the power supply potential when a difference value between an average value of a predetermined number of upper values of the output values and an average value of a predetermined number of lower values of the output values is equal to or higher than a predetermined difference threshold” when considered as a whole along with all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M CHOUDHRY whose telephone number is (571)270-5716. The examiner can normally be reached Monday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fairbanks Brent can be reached at 408-918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD M CHOUDHRY/ Primary Examiner, Art Unit 2899
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Prosecution Timeline

Dec 19, 2023
Application Filed
Mar 07, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
95%
With Interview (+13.3%)
2y 10m
Median Time to Grant
Low
PTA Risk
Based on 686 resolved cases by this examiner. Grant probability derived from career allow rate.

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