DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on June 18, 2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 34-38, 40-45, and 50-61 are rejected under 35 U.S.C. 103 as being unpatentable over Dorhout et al. (United States Patent Application Publication No. US 2017/0148802 A1, hereinafter “Dorhout”) in view of Yang et al. (United States Patent Application Publication No. US 2019/0139835 A1, hereinafter “Yang”).
In reference to claim 34, Dorhout discloses a similar device. Fig. 16 of Dorhout discloses a transistor which comprises a layer (44) with a channel region (72), a lower source/drain region (74) below the channel region (72), and an upper source/drain region (76) above the channel region (72). A gate dielectric (42) is against the layer (44). A gate (62) is operatively adjacent the channel region (72). The layer (44) has a horizontally extending portion over the transistor and terminates at a shallow trench of insulative material (28). Dorhout does not disclose that the layer (44) which forms the channel and the source/drain regions is made of a two-dimensional material. However Yang discloses the known use of a channel layer material which comprises one or more layers of a two-dimensional semiconductor material in the form of graphene, germanene, stanene, silicene, molybdenum disulfide, molybdenum diselenide, tungsten disulfide, tungsten diselenide, tin disulfide, indium sulfide, indium selenide, bismuth selenide (p. 1, paragraph 3, p. 3, paragraph 28, p. 6, paragraph 64). The applicant is reminded in this regard that it has been held that the selection of a known material based on its suitability for its intended use would be entirely obvious. See Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) ("Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). See MPEP 2144.07. In view of the above, it would therefore be obvious to use a channel layer material which comprises one or more layers of a two-dimensional semiconductor material in the device of Dorhout.
With regard to claim 35, in the device of Dorhout constructed in view of Yang, the two-dimensional material comprises one or more of carbon, boron, germanium, silicon, phosphorus, molybdenum, tin, and tungsten (Yang - p. 3, paragraph 28, p. 6, paragraph 64).
In reference to claim 36, the two-dimensional-material comprises one or more of graphene, germanene, stanene, silicene, molybdenum disulfide, molybdenum diselenide, tungsten disulfide, tungsten diselenide, tin disulfide (Yang - p. 3, paragraph 28, p. 6, paragraph 64).
With regard to claim 37, Yang discloses that the channel layer material comprises 1 to 10 separate layers (p. 3, paragraph 30).
In reference to claim 38, Yang discloses the use of 8-10 layers of molybdenum disulfide (p. 3, paragraphs 28 and 30, p. 6, paragraph 64). Yang further discloses that the thickness of a single layer of molybdenum disulfide is 0.65 Angstroms or 0.065 nm (p. 1, paragraph 4). The use of 8-10 layers of molybdenum disulfide results in respective thicknesses of 0.52 nm, 0.585 nm, and 0.65 nm which are all inside of the claimed range of about 0.5 nm to about 5 nm.
In reference to claim 40, in the device of Dorhout constructed in view of Yang, the two-dimensional material comprises one or more of boron, phosphorus, bismuth, indium, and tin (Yang - p. 3, paragraph 28, p. 6, paragraph 64).
With regard to claim 41, Yang discloses the use of a the two-dimensional-material in the form of stanene, molybdenum disulfide, tungsten diselenide, and tin disulfide (p. 3, paragraph 28, p. 6, paragraph 64). The examiner also notes the claimed material, “phosphorene.” Yang also discloses the use of a single layer of black phosphorus (p. 3, paragraphs 28 and 30, p. 6, paragraph 64). Zhou et al. (United States Patent Application Publication No. US 2017/0322166 A1, hereinafter “Zhou”) discloses (p. 1, paragraph 3) that a single layer of black phosphorus is also known as phosphorene thus meeting claim 41.
In reference to claim 42, in the device of Dorhout constructed in view of Yang, the channel layer/two-dimensional material (44 – fig. 16 of Dorhout) is configured as spaced-apart linear structures since the structure of fig. 16 of Dorhout is a small portion of a memory cell array in which there are multiple rows of channel layers/two-dimensional material (44 – fig. 16 of Dorhout) formed over the same substrate (14 – fig. 16 of Dorhout). The channel layer/two-dimensional material (44 – fig. 16 of Dorhout) is directly over a conductive line (12 – fig. 16 of Dorhout). The conductive line (12 – fig. 16 of Dorhout) in the memory array disclosed by Dorhout in fig. 16 is not referred to as a digit line. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e., identity of terminology is not required. See In re Bond, 910 F.2d 831, 15 USPQ2d 1566 (Fed. Cir. 1990). Although Dorhout does not specifically use the term, “digit lines,” it is not required in order for the Dorhout reference to teach this limitation in the claim. Thus this limitation is not patentable over Dorhout and Yang.
In reference to claim 43, Yang discloses that the channel layer material comprises 1 to 10 separate layers (p. 3, paragraph 30) which overlaps the claimed range of 3-10 separate layers. The examiner would like to note:
In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). See MPEP 2144.05.
Thus claim 43 is not patentable over Dorhout and Yang.
In reference to claim 44, Dorhout discloses a similar device. Fig. 16 of Dorhout discloses a transistor which comprises a layer (44) with a channel region (72) and is shaped as an upwardly-opening container with horizontally extending portions that terminate at an insulative region (28) of a shallow trench. A lower source/drain region (74) is below the channel region (72) while an upper source/drain region (76) is above the channel region (72). A gate dielectric (42) is against the layer (44). A gate (62) is operatively adjacent the channel region (72). The gate dielectric (42) is between the gate (62) and the layer (72). Dorhout does not disclose that the layer (44) which forms the channel and the source/drain regions is made of a two-dimensional material. However Yang discloses the known use of a channel layer material which comprises one or more layers of a two-dimensional semiconductor material in the form of graphene, germanene, stanene, silicene, molybdenum disulfide, molybdenum diselenide, tungsten disulfide, tungsten diselenide, tin disulfide, indium sulfide, indium selenide, bismuth selenide (p. 1, paragraph 3, p. 3, paragraph 28, p. 6, paragraph 64). The applicant is reminded in this regard that it has been held that the selection of a known material based on its suitability for its intended use would be entirely obvious. See Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) ("Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). See MPEP 2144.07. In view of the above, it would therefore be obvious to use a channel layer material which comprises one or more layers of a two-dimensional semiconductor material in the device of Dorhout.
With regard to claim 45, Yang discloses the use of 8-10 layers of molybdenum disulfide (p. 3, paragraphs 28 and 30, p. 6, paragraph 64). Yang further discloses that the thickness of a single layer of molybdenum disulfide is 0.65 Angstroms or 0.065 nm (p. 1, paragraph 4). The use of 8-10 layers of molybdenum disulfide results in respective thicknesses of 0.52 nm, 0.585 nm, and 0.65 nm which are all inside of the claimed range of about 0.5 nm to about 5 nm.
In reference to claim 50, in the device of Dorhout constructed in view of Yang, the two-dimensional material comprises one or more of boron, phosphorus, and tin (Yang - p. 3, paragraph 28, p. 6, paragraph 64).
With regard to claim 51, the two-dimensional-material comprises one or more of stanene, molybdenum diselenide, tungsten diselenide, and tin disulfide (Yang - p. 3, paragraph 28, p. 6, paragraph 64). The examiner also notes the claimed material, “phosphorene.” Yang also discloses the use of a single layer of black phosphorus (p. 3, paragraphs 28 and 30, p. 6, paragraph 64). Zhou discloses (p. 1, paragraph 3) that a single layer of black phosphorus is also known as phosphorene thus meeting claim 51.
With regard to claim 52, in the device of Dorhout constructed in view of Yang, the channel layer/two-dimensional material (44 – fig. 16 of Dorhout) is configured as spaced-apart linear structures since the structure of fig. 16 of Dorhout is a small portion of a memory cell array in which there are multiple rows of channel layers/two-dimensional material (44 – fig. 16 of Dorhout) formed over the same substrate (14 – fig. 16 of Dorhout). The channel layer/two-dimensional material (44 – fig. 16 of Dorhout) is directly over a conductive line (12 – fig. 16 of Dorhout). The conductive line (12 – fig. 16 of Dorhout) in the memory array disclosed by Dorhout in fig. 16 is not referred to as a digit line. However note that the elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e., identity of terminology is not required. See In re Bond, 910 F.2d 831, 15 USPQ2d 1566 (Fed. Cir. 1990). Although Dorhout does not specifically use the term, “digit lines,” it is not required in order for the Dorhout reference to teach this limitation in the claim. Thus this limitation is not patentable over Dorhout and Yang.
In reference to claim 53, Yang discloses that the channel layer material comprises 1 to 10 separate layers (p. 3, paragraph 30) which overlaps the claimed range of 3-10 separate layers. The examiner would like to note:
In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). See MPEP 2144.05.
Thus claim 53 is not patentable over Dorhout and Yang.
With regard to claim 54, in the device of Dorhout constructed in view of Yang, a first insulative material (46 – fig. 16 of Dorhout) is over and against the channel layer/two-dimensional material (44 – fig. 16 of Dorhout) and terminates against a contact plug (60 – fig. 16 of Dorhout).
In reference to claim 55, in the device of Dorhout constructed in view of Yang, a second insulative material (50 – fig. 16 of Dorhout) is over and against the first insulative material (46 – fig. 16 of Dorhout) and terminates against the contact plug (60 – fig. 16 of Dorhout).
With regard to claim 56, in the device of Dorhout constructed in view of Yang, a first insulative material (46 – fig. 16 of Dorhout) fills the upwardly-opening container shaped by the channel layer/two-dimensional material (44 – fig. 16 of Dorhout) and extends outward of the upwardly-opening container to terminate at a contact plug (60 – fig. 16 of Dorhout).
In reference to claim 57, in the device of Dorhout constructed in view of Yang, a second insulative material (50 – fig. 16 of Dorhout) is against the first insulative material (46 – fig. 16 of Dorhout) and terminates at the contact plug (60 – fig. 16 of Dorhout).
In reference to claim 58, Dorhout discloses a similar device. Fig. 16 of Dorhout discloses a transistor which comprises a trench having opposite sides and between two gate structures (62) with source/drains (74, 76) above and below each gate structure (62). A gate dielectric (42) is along each side of the trench. A channel region/layer (44) is against the gate dielectric (42) along each side. The channel region/layer (44) has portions that extend out of the trench and terminate at insulative material (28) of a shallow trench. Dorhout does not disclose that the layer (44) which forms the channel region and the source/drain regions is made of a two-dimensional material. However Yang discloses the known use of a channel layer material which comprises one or more layers of a two-dimensional semiconductor material in the form of graphene, germanene, stanene, silicene, molybdenum disulfide, molybdenum diselenide, tungsten disulfide, tungsten diselenide, tin disulfide, indium sulfide, indium selenide, bismuth selenide (p. 1, paragraph 3, p. 3, paragraph 28, p. 6, paragraph 64). The applicant is reminded in this regard that it has been held that the selection of a known material based on its suitability for its intended use would be entirely obvious. See Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) ("Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). See MPEP 2144.07. In view of the above, it would therefore be obvious to use a channel layer material which comprises one or more layers of a two-dimensional semiconductor material in the device of Dorhout.
With regard to claim 59, in the device of Dorhout constructed in view of Yang, the first insulative material (46 – fig. 16 of Dorhout) has portions that extend out of the trench over and against the layer (44 – fig.16 of Dorhout) of the two-dimensional material.
In reference to claim 60, in the device of Dorhout constructed in view of Yang, the first insulative material (46 – fig. 16 of Dorhout) terminates against a contact plug (60 – fig. 16 of Dorhout).
With regard to claim 61, in the device of Dorhout constructed in view of Yang, a second insulative material (50 – fig. 16 of Dorhout) is over and against the first insulative material (46 – fig. 16 of Dorhout) and terminates against the contact plug (60 – fig. 16 of Dorhout).
Claim 39 is rejected under 35 U.S.C. 103 as being unpatentable over Dorhout in view of Yang and as applied to claim 34 above and further in view of Choi et al. (United States Patent Application Publication No. US 2008/0283939 A1, hereinafter “Choi”).
In reference to claim 39, Yang does not explicitly disclose that the two-dimensional material used as the channel material is entirely monocrystalline. However Choi discloses that monocrystalline or single crystal materials exhibit better properties with regard to current, mobility, and gain compared to amorphous and polycrystalline materials (p. 4, paragraph 55). In view of Choi, it would therefore be obvious to implement the two-dimensional material with a monocrystalline structure in the device of Dorhout constructed in view of Yang.
Claims 46 and 47 are rejected under 35 U.S.C. 103 as being unpatentable over Dorhout in view of Yang as applied to claim 44 above and further in view of Douseki et al. (USPN 5,594,371, hereinafter “Douseki”).
In reference to claim 46, Dorhout does not disclose the exact thickness of the gate dielectric (42) as that claimed by the applicant. However Douseki discloses that the gate dielectric thickness can be adjusted to optimize the threshold voltage of the transistor (column 6, lines 56-67, column 7, lines 1-67, column 8, lines 1-12). Thus Douseki makes it clear that the gate dielectric thickness is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the gate dielectric thickness, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore claim 46 is not patentable over Dorhout, Yang, and Douseki.
With regard to claim 47, Yang does not disclose the exact thickness of the channel layer as that claimed by the applicant. However Douseki discloses that the channel layer thickness can be adjusted to optimize the threshold voltage of the transistor (column 6, lines 56-67, column 7, lines 1-67, column 8, lines 1-12). Thus Douseki makes it clear that the channel layer thickness is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the channel layer thickness, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore claim 47 is not patentable over Dorhout, Yang, and Douseki.
Claim 49 is rejected under 35 U.S.C. 103 as being unpatentable over Dorhout in view of Yang as applied to claim 44 above and further in view of Choi.
In reference to claim 49, Yang does not explicitly disclose that the two-dimensional material used as the channel material is entirely monocrystalline. However Choi discloses that monocrystalline or single crystal materials exhibit better properties with regard to current, mobility, and gain compared to amorphous and polycrystalline materials (p. 4, paragraph 55). In view of Choi, it would therefore be obvious to implement the two-dimensional material with a monocrystalline structure in the device of Dorhout constructed in view of Yang.
Response to Arguments
Applicant's arguments filed June 18, 2026 have been fully considered but they are not persuasive. The applicant argues that the 35 U.S.C. § 102(b)(2)(C) exception applies to the Dorhout reference (p. 7-8 of the response). However the Dorhout reference was published on May 25, 2017. The publication date for the Dorhout reference is more than three years before the earliest effective filing date for the current application’s earliest parent application 63/072,033 which was filed on August 28, 2020. Therefore the Dorhout reference is prior art under 102(a)(1). The common ownership exception only applies to prior art under 102(a)(2) as seen in the below section (emphasis added) of 35 U.S.C. § 102(b)(2):
(b) EXCEPTIONS.—
(2) DISCLOSURES APPEARING IN APPLICATIONS AND PATENTS.—A disclosure shall not be prior art to a claimed invention under subsection (a)(2) if—
(A) the subject matter disclosed was obtained directly or indirectly from the inventor or a joint inventor;
(B) the subject matter disclosed had, before such subject matter was effectively filed under subsection (a)(2), been publicly disclosed by the inventor or a joint inventor or another who obtained the subject matter disclosed directly or indirectly from the inventor or a joint inventor; or
(C) the subject matter disclosed and the claimed invention, not later than the effective filing date of the claimed invention, were owned by the same person or subject to an obligation of assignment to the same person.
Therefore the argument that the Dorhout reference is unavailable due to the 35 U.S.C. § 102(b)(2)(C) exception is not persuasive.
The applicant also mentions 35 U.S.C. § 102(c), which is common ownership under joint research agreement, on p. 8 of the remarks. The common ownership under joint research agreement exception only applies to prior art under 102(a)(2) since it follows the provision of subsection 35 U.S.C. § 102(b)(2)(C) as seen in the below section (emphasis added) of 35 U.S.C. § 102(c):
c) COMMON OWNERSHIP UNDER JOINT RESEARCH AGREEMENTS.—Subject matter disclosed and a claimed invention shall be deemed to have been owned by the same person or subject to an obligation of assignment to the same person in applying the provisions of subsection (b)(2)(C) if—
(1) the subject matter disclosed was developed and the claimed invention was made by, or on behalf of, 1 or more parties to a joint research agreement that was in effect on or before the effective filing date of the claimed invention;
(2) the claimed invention was made as a result of activities undertaken within the scope of the joint research agreement; and
(3) the application for patent for the claimed invention discloses or is amended to disclose the names of the parties to the joint research agreement.
Therefore the argument that the Dorhout reference is unavailable due to the 35 U.S.C. § 102(c) exception is not persuasive.
Since Dorhout is prior art under 102(a)(1), the applicant may only rely on the below exceptions under 35 U.S.C. § 102(b)(1):
(b) EXCEPTIONS.—
(1) DISCLOSURES MADE 1 YEAR OR LESS BEFORE THE EFFECTIVE FILING DATE OF THE CLAIMED INVENTION.—A disclosure made 1 year or less before the effective filing date of a claimed invention shall not be prior art to the claimed invention under subsection (a)(1) if—
(A) the disclosure was made by the inventor or joint inventor or by another who obtained the subject matter disclosed directly or indirectly from the inventor or a joint inventor; or
(B) the subject matter disclosed had, before such disclosure, been publicly disclosed by the inventor or a joint inventor or another who obtained the subject matter disclosed directly or indirectly from the inventor or a joint inventor.
The applicant has not made any remarks with regard to any exceptions under 35 U.S.C. § 102(b)(1). Therefore claims 34-47 and 49-61 stand rejected in the above Office action.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure: Zhou et al. (United States Patent Application Publication No. US 2017/0322166 A1, hereinafter “Zhou”) discloses that a single layer of black phosphorus is also known as phosphorene (p. 1, paragraph 3).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEVIN QUINTO whose telephone number is (571)272-1920. The examiner can normally be reached Monday-Friday, 9-5:30.
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/KEVIN QUINTO/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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