Prosecution Insights
Last updated: April 19, 2026
Application No. 18/545,601

HYBRID THERMAL INTERFACE MATERIAL WITH EMBEDDED METAL LAYER

Non-Final OA §102§103
Filed
Dec 19, 2023
Examiner
ENAD, CHRISTINE A
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sandisk Technologies Inc.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
94%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
1105 granted / 1312 resolved
+16.2% vs TC avg
Moderate +10% lift
Without
With
+10.1%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
68 currently pending
Career history
1380
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
61.5%
+21.5% vs TC avg
§102
21.1%
-18.9% vs TC avg
§112
7.7%
-32.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1312 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jha et al (US Publication No. 2014/0246770). Regarding claim 1, Jha discloses a thermal interface material for an integrated circuit, comprising: a first portion Fig 5, 524; a second portion Fig 5, 522 separate from the first portion and defining a plurality of apertures Fig 5; and a metal portion Fig 5, 520 provided between the first portion and the second portion Fig 5, the metal portion including a plurality of stubs that are received in respective apertures of the plurality of apertures defined by the second portion Fig 5. Regarding claim 2, Jha discloses wherein the metal portion is comprised of a copper foil ¶0035. Regarding claim 3, Jha discloses wherein at least one stub of the plurality of stubs is filled with a copper material¶0035. Claims 8-10, 15-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Arrington et al (US Publication No. 2021/0134698). Regarding claims 8 and 15, Arrington discloses a semiconductor package, comprising: a substrate Fig 1, 110; an integrated circuit Fig 1, 130; electrically coupled to the substrate Fig 1, 110; a housing at least partially covering the integrated circuit Fig 1 and Fig 12 ¶0056; and a thermal interface material Fig 1, 160 provided between the integrated circuit and the housing Fig 1, the thermal interface material comprising: a first layer Fig 5, 162; a second layer Fig 5, 162, the second layer defining at least one cavity; and a metal layer Fig 5, 172 positioned between the first layer and the second layer, the metal layer including at least one post that is at least partially received in the at least one cavity Fig 5. Regarding claims 9 and 16, Arrington discloses wherein the metal layer is comprised of copper ¶0047. Regarding claims 10 and 17, Arrington discloses wherein the at least one post is filled with copper ¶0047. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Jha et al (US Publication No. 2014/0246770). Regarding claims 4 and 5, Jha discloses wherein the first portion has a first thickness, the second portion has a second thickness that is less than the first thickness Fig 5 and wherein the second thickness is half as thick as the first thickness and the third thickness is half as thick as the second thickness Fig 5. Jha discloses all the limitations but silent on the thickness of the metal portion. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the thickness, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F. 2d 272, 205 USPQ (CCPA 1980). Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Jha et al (US Publication No. 2014/0246770) in view of Megarity et al (US Publication No. 2013/0301670). Regarding claim 6, Jha discloses all the limitations but silent on the arrangement of the interface material. Whereas Megarity discloses wherein at least a portion of one or more of the plurality of stubs contacts a surface of the integrated circuit when the thermal interface material is coupled to the integrated circuit Fig 10A-10B. Jha and Megarity are analogous art because they are directed to semiconductor devices having TIM and one of ordinary skill in the art would have had a reasonable expectation of success to modify Jha because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the arrangement of the TIM and incorporate the teachings of Megarity to improve isolation. Regarding claim 7, Megarity discloses wherein the first portion, the second portion and the metal portion are compressed to form a single unit prior to being placed on a surface of the integrated circuit Fig 10A-11. Claims 11-12, 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Arrington et al (US Publication No. 2021/0134698) in view of Jha et al (US Publication No. 2014/0246770). Regarding claims 13-14, 18-19, Arrington discloses all the limitations but silent on the thickness. Whereas Jha discloses wherein the first portion has a first thickness, the second portion has a second thickness that is less than the first thickness Fig 5 and wherein the second thickness is half as thick as the first thickness and the third thickness is half as thick as the second thickness Fig 5. Jha and Arrington are analogous art because they are directed to semiconductor devices having TIM and one of ordinary skill in the art would have had a reasonable expectation of success to modify Arrington because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the thickness and incorporate the teachings of Jha as a matter of design choice. Also, TIM Jha discloses all the limitations but silent on the thickness of the metal portion. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the thickness, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F. 2d 272, 205 USPQ (CCPA 1980). Claims 13-14 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Arrington et al (US Publication No. 2021/0134698) in view of Megarity et al (US Publication No. 2013/0301670). Regarding claim 13, Arrington discloses all the limitations but silent on the arrangement of the interface material. Whereas Megarity discloses wherein at least a portion of the at least one post contacts a surface of the integrated circuit when the thermal interface material is placed on a surface of the integrated circuit Fig 10A-10B. Arrington and Megarity are analogous art because they are directed to semiconductor devices having TIM and one of ordinary skill in the art would have had a reasonable expectation of success to modify Arrington because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the arrangement of the TIM and incorporate the teachings of Megarity to improve isolation. Regarding claims 14 and 20, Megarity discloses wherein the first layer, the second layer and the metal layer are compressed to form a single unit prior to being placed on a surface of the integrated circuit Fig 10A-11. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTINE A ENAD whose telephone number is (571)270-7891. The examiner can normally be reached Monday-Friday, 7:30 am -4:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571 272 1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTINE A ENAD/Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Dec 19, 2023
Application Filed
Feb 06, 2026
Non-Final Rejection — §102, §103
Apr 10, 2026
Applicant Interview (Telephonic)
Apr 10, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
94%
With Interview (+10.1%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 1312 resolved cases by this examiner. Grant probability derived from career allow rate.

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