DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, Species A, where the semiconductor material is a carbon nanotube represented by claims 1-2 and 4-14 in the reply filed on April 17, 2026 is acknowledged.
Examiner is withdrawing the election of Species requirement. This is because Sutter et al. (US 2010/0255984 A1) (“Sutter”), describes carbon nanotubes as being an obvious variant of graphene. ¶ 0006, where “graphene can be considered as arising from a single-walled carbon nanotube which has been cut along its length and unrolled into a single sheet.” Therefore, Examiner will rejoin claim 3. The restriction between method and device remains. As such the examined claims will be 1-14.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on December 19, 2023 was considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim Rejections - 35 USC § 103
Claim(s) 1, 3-4, 9-10 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Vijh et al., “Graphene Based Tunnel Field Effect Transistor for RF Applications”, 1019 Photonics & Electromagnetics Research Symposium (PIERS-Spring), pgs. 256-259, IEEE, 17-20 June 2019 (“Vijh”).
Regarding claim 1, Vijh teaches:
a source region (figure 1 source; hereinafter “A”);
a channel region (figure 1 between source, drain, and gate; hereinafter “B”);
a drain region (figure 1 drain; hereinafter “C”); and
a gate (figure 1 gate; hereinafter “D”),
wherein the channel region (B) is between the source region (A) and the drain region (C),
wherein the source region (A), the channel region (B), and the drain region (C) comprise a semiconductor material with a bandgap that is smaller than 0.9 eV (table 1 shows that graphene has a bandgap of 0eV),
wherein the drain region (C) has a dopant concentration that is smaller than 5x1019 cm-3 (pg. 256 at ¶ 2), and
wherein the gate (D) is positioned along the channel (C) and isolated from the channel (D is isolated from C by means of the insulator shown with a thickness of Tox; Pg. 256 at ¶ 2).
Additionally and/or alternatively, Vijh does not teach
wherein the source region (A) has a dopant concentration that is smaller than 5x1019 cm-3.
This is because Vijh teaches the doping concentration of the source is 1x1020 cm-3.
However, changing the doping concentration of source regions in transistors is well-known and routinely done in the semiconductor arts to produce different characteristics of the device. At least one reason why one would change the doping concentration of the source region is to create an ohmic contact or Schottky contact with the source region.
Further, under MPEP 2144.05, citing Titanium Metals Corp. of America v.Banner, 778 F.2d 775, 783 (Fed. Cir. 1985), because the proportions of the prior art are so close to the claimed range one skilled in the art would not expect the source to have different properties or to function differently.
Thus, it would have been obvious to one of ordinary skill in the art to change the doping concentration of the source to be smaller than the claimed amount
Regarding claim 3, Vijh teaches:
wherein the semiconductor material is germanium, a III-V material, graphene, or black phosphorus (Abstract).
Regarding claim 4, Vijh teaches:
wherein the drain region has a dopant concentration that is smaller than 5x1019 cm-3, and wherein the source region has a dopant concentration of more than 5x1019 cm-3 (Pg. 256 at ¶ 2).
Regarding claim 9, Vijh teaches:
wherein a length of the channel region (B) is between 3 nm and 100 nm (As shown in figure 1 the channel is the same length as the gate. Pg. 256 at ¶ 2 teaches the gate length is 30nm. Therefore, the channel is the same length).
Regarding claim 10, Vijh teaches:
wherein a length of the source region or the drain region is between 3 nm and 40 nm (pg. 256 at ¶ 2, where the source is 25nm and the drain in 5 nm).
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as obvious over Vijh, in view of Sutter.
Regarding claim 2, Vijh does not teach:
wherein the semiconductor material is a carbon nanotube.
Sutter teaches:
That carbon nanotubes are an obvious variant of graphene. ¶ 0006. Therefore, it would have been obvious to one of ordinary skill in the art to substitute art recognized equivalents for the same purpose and/or intended purpose. MPEP 2144.06-07.
Claim(s) 5-8 is/are rejected under 35 U.S.C. 103 as obvious over Vijh, in view of Official Notice.
Regarding claims 5-7, Vijh does not teach:
The type of doping of the source and drain region. However, this is extremely obvious to one of ordinary skill in the art. This is because N-type and P-type are the two types of doping one uses for the source and drain to create NMOS and PMOS devices. Examiner is taking Official Notice of this fact. To support this official notice examiner proffers the picture below taken from https://commons.wikimedia.org/wiki/File:Cmos_impurity_profile.PNG. See also Vigh on pg. 256 at ¶ 1, where different doping types are discussed.
PNG
media_image1.png
550
1432
media_image1.png
Greyscale
Figure 1https://en.wikipedia.org/wiki/CMOS#/media/File:Cmos_impurity_profile-en.svg
Regarding claim 8, Vijh does not teach:
a source electrode in contact with the source region; and
a drain electrode in contact with the drain region.
Examiner is taking Official Notice that a source electrode and drain electrode will need to be connected to their respective regions in order for the transistor of Vijh to work. Without said electrodes the one of ordinary skill in the art would not be able to use the device of Vijh. Examiner proffers Lemaitre et al. (US 2017/0040443 A1) (“Lemaitre”) where this is shown in figure 1 and discussed in ¶ 0016.
Claim(s) 11-14 is/are rejected under 35 U.S.C. 103 as obvious over Vijh.
Regarding claim 11, Vijh does not teach:
a plurality of feedback field effect transistors according to claim 1, wherein the feedback field effect transistors are arranged in a logic configuration.
However, this is obvious to one of ordinary skill it the art. It is obvious because one of ordinary skill in the art is going to put a plurality of the transistors together to form logic circuits and other circuits. While Vijh teaches the transistors may be undesirable for use in digital logic circuits is not state they are unacceptable for their use in digital logic circuits. Thus, while they may not ideally be used for logic configurations one of ordinary skill in the art would know that Vijh is not teaching away from their use. To quote the Applicant provided EPO report “Logic devices and memory devices represent standard applications of transistors”. Thus, this limitation would have been obvious to one of ordinary skill in the art.
Regarding claim 12,
Claim 12 is rejected for the same reasons as claim 11 above.
Regarding claim 13,
This is rejected under intended use of the device (e.g. operating). MPEP 2114(II), where the manner of operating the device, the operating with low-power logic with a specific subthreshold slope, does not differentiate the claimed device from the prior art. Because the prior art teaches the same structure it would have been obvious that it could have been operated in the same manner.
Regarding claim 14,
Claim 14 is rejected for the same reason as claim 13 above. There is no structural difference between the prior art device and the claimed device; therefore, the prior art can be used in a memory device. See claim 11 above.
Conclusion
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/VINCENT WALL/ Primary Examiner, Art Unit 2898
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