Prosecution Insights
Last updated: April 19, 2026
Application No. 18/546,010

POWER SUPPLY SYSTEMS AND METHODS

Final Rejection §102§103
Filed
Aug 10, 2023
Examiner
GASSEN, CHRISTOPHER J
Art Unit
2881
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Micromass UK Limited
OA Round
2 (Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
2y 11m
To Grant
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
105 granted / 131 resolved
+12.2% vs TC avg
Strong +24% interview lift
Without
With
+24.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
29 currently pending
Career history
160
Total Applications
across all art units

Statute-Specific Performance

§101
2.9%
-37.1% vs TC avg
§103
42.5%
+2.5% vs TC avg
§102
17.5%
-22.5% vs TC avg
§112
32.6%
-7.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 131 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendments filed 01/23/2026 have been entered. Claims 4-5, 7-8, and 13 have been canceled. Claims 1-3, 6, 9-12, and 14 are now pending in the application. Response to Arguments Applicant’s amendments to the specification have overcome each and every objection previously set forth in the Non-Final Office Action dated 10/24/2025, hereinafter NFOA1024. Applicant’s amendments to the claims have overcome each and every objection previously set forth in NFOA1024. Applicant’s amendments to the claims have overcome each and every 35 U.S.C. 112(b) rejection previously set forth in NFOA1024 by adding sufficient structure for the functional limitations required of the system claims. Applicant’s arguments with respect to amended claims 1 and 14 have been considered but are moot because they pertain to amended claim limitations not present at the time of NFOA1024, and the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Objections Claims 2 and 14 are objected to because of the following informalities: Claim 2 recites “a first power supply” and “a second power supply”, however, amended claim 1 already requires such power supplies, and as such, this recitation should read ‘the first power supply’ and ‘the second power supply’, as the specification appears to indicate only two power supplies total; The amendments to claim 14 erroneously removed a necessary article, so that now the claim reads “controlling the controller to operate in control mode”, which should read ‘controlling the controller to operate in a control mode’. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 6, 9-12, and 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Schury (DOI: 10.1063/1.5104292). Examiner notes that Schury is Applicant provided prior art via the IDS dated 08/10/2023. Regarding claim 1, Schury teaches a power supply system for a mass spectrometer (Abstract), the system comprising: a system output terminal for delivering a system output signal to a component of a mass spectrometer (See Fig. 1, output terminal on left to be delivered to mass spectrometer (or component thereof); Abstract; Section III); a first power supply (See Fig. 1, DAC that supplies V-set; Description of Fig. 1; Section III, and in particular paragraphs 2 and 6; Vset being between 0 and +Vref-, i.e., 5V); a second power supply (See Fig. 1, DAC that supplies V-set; Description of Fig. 1; Section III, and in particular paragraphs 2 and 6; Vset being between 0 and -Vref-, i.e., -5V; Examiner notes that the claim does not preclude the two power supplies being housed within the same element); a positive voltage terminal that is electrically coupled to the first power supply and which is configured to provide a positive supply voltage (See Fig. 1, DAC that supplies V-set to voltage input; Description of Fig. 1; Section III, and in particular paragraphs 2 and 6; Vset being between 0 and -Vref-, i.e., -5V); a negative voltage terminal that is electrically coupled to the second power supply and which is configured to provide a negative supply voltage (See Fig. 1, DAC that supplies V-set to voltage input; Description of Fig. 1; Section III, and in particular paragraphs 2 and 6; Vset being between 0 and -Vref-, i.e., -5V); a first optocoupler (See Fig. 1, items D1 and D3, and Q1) which is configured to couple the positive voltage terminal (See Fig. 1; Section III; e.g., when Vset = +5V) to the system output terminal electrically (See Fig. 1, items D1 and D3 electrically coupled to Vout) by a variable electrical conductance which is set in response to a first control signal (See Fig. 1, item Q1, D1, D3, Section III; Examiner interprets controlling Q1 to control the output from D1 to thereby control the output from D3 as reading on this limitation, as the limitation amounts to a recitation of the physical mechanism of such an optocoupler: as the control signal to the LED is adjusted, the output of the LED is adjusted, thereby varying the conductance of the optocoupler; For instruction, Examiner looked to Applicant’s disclosure for instruction regarding the intended meaning/requirements of the electrical conductance in context, which states in [0049]: “The controller 3 adjusts at least one of the first control signal or the second control to vary the intensity of light transmitted by the light transmitters 23, 24 which, in turn sets the electrical conductance of the first and second optocouplers 19, 20.”; This amounts to a conventional description of how to control such optocouplers, and accordingly, the disclosure of Schury is clearly sufficient to read on the limitation); a second optocoupler (See Fig. 1, items D2 and D4, and Q2) which is configured to couple the negative voltage terminal (See Fig. 1; Section III; e.g., when Vset = -5V) to the system output terminal electrically (See Fig. 1, items D1 and D3 electrically coupled to Vout) by a variable electrical conductance which is set in response to a second control signal (See Fig. 1, item Q2, D2, D4, Section III; Examiner interprets controlling Q2 to control the output from D2 to thereby control the output from D4 as reading on this limitation, as the limitation amounts to a recitation of the physical mechanism of such an optocoupler: as the control signal to the LED is adjusted, the output of the LED is adjusted, thereby varying the conductance of the optocoupler; For instruction, Examiner looked to Applicant’s disclosure for instruction regarding the intended meaning/requirements of the electrical conductance in context, which states in [0049]: “The controller 3 adjusts at least one of the first control signal or the second control to vary the intensity of light transmitted by the light transmitters 23, 24 which, in turn sets the electrical conductance of the first and second optocouplers 19, 20.”; This amounts to a conventional description of how to control such optocouplers, and accordingly, the disclosure of Schury is clearly sufficient to read on the limitation); and a controller (See Fig. 1, ‘Digital controls’; Section III, which discloses an MCU to control the DAC and read a thermometer) which is configured to: provide the first control signal to the first optocoupler (See Fig. 1, item Q1, Section III; Examiner interprets controlling Q1 to control the output from D1 as reading on this limitation); receive a positive voltage feedback signal, via a positive voltage feedback path, indicative of the positive supply voltage (See Fig. 1, the branch off of the D3/D4 output that feeds back to the output control; Section III; e.g., when Vset = +5V; In particular, see paragraph 4); provide the second control signal to the second optocoupler (See Fig. 1, item Q1, Section III; Examiner interprets controlling Q2 to control the output from D2 as reading on this limitation); receive a negative voltage feedback signal, via a negative voltage feedback path, indicative of the negative supply voltage (See Fig. 1, the branch off of the D3/D4 output that feeds back to the output control; Section III; e.g., when Vset = -5V; In particular, see paragraph 4; Examiner notes that the negative and positive feedback paths are not required to be separate, and the device of Schury is capable of operating under both positive and negative voltages while providing feedback control of the output voltage); and adjust at least one of the first control signal or the second control signal to set the electrical conductance of the first optocoupler and the electrical conductance of the second optocoupler respectively (See Fig. 1, items Q1, Q2, Section III; Examiner interprets controlling Q1 and Q2 to control the output from D1 and D2 and thereby controlling the output from D3 and D4, respectively, respectively as reading on this limitation) such that the system output terminal delivers a system output signal having a voltage between the positive supply voltage and the negative supply voltage (See Sections III and IV; Examiner notes that the broadest reasonable interpretation of such a functional limitation in a system claim is that the reference system be capable of performing this functionality; Schury discloses sufficient structure and control capabilities to achieve an output signal having a voltage between the positive and negative supply voltages). Regarding claim 6, Schury teaches the system of claim 1. Schury further teaches wherein the system further comprises: a system output feedback path which provides a feedback path between the system output terminal and the controller (See Fig. 1, the branch off of the D3/D4 output that feeds back to the output control; Section III; In particular, see paragraph 4). Regarding claim 9, Schury teaches the system of claim 1. Schury further teaches wherein the system further comprises: a first capacitor (See Fig. 1, item Cfb) which is coupled electrically between the positive voltage terminal and ground (See Fig. 1, item Cfb, between the voltage terminal and a ground connection; Section III, and in particular paragraphs 5 and 7; e.g., when Vset = +5V; Examiner notes that the capacitor is used in order to prevent oscillations as disclosed). Regarding claim 10, Schury teaches the system of claim 1. Schury further teaches wherein the system further comprises: a second capacitor (See Fig. 1, item Cfb) which is coupled electrically between the negative voltage terminal and ground (See Fig. 1, item Cfb, between the voltage terminal and a ground connection; Section III, and in particular paragraphs 5 and 7; e.g., when Vset = -5V; Examiner notes that the capacitor is used in order to prevent oscillations as disclosed). Regarding claim 11, Schury teaches the system of claim 1. Schury further teaches wherein each optocoupler has a maximum voltage rating of between 10kV and 25kV (Section III, paragraphs 1 and 3). Regarding claim 12, Schury teaches the system of claim 1. Schury further teaches wherein each optocoupler comprises: a control terminal (See Fig. 1, i.e., D1 connected to Q1 or D2 connected to Q2) which is coupled electrically to the controller to receive a control signal (See Fig. 1 and description thereof; Section III); a light transmitter (See Fig. 1, item D1 or D2; Section III) which is configured to transmit light in response to a control signal from the controller (See Fig. 1, item D1 or D2 and description thereof; Section III); first and second output terminals (See Fig. 1, outputs of optocoupler formed by D1, D3, and Q1, or of optocoupler formed by D2, D4, and Q2), wherein one output terminal is coupled electrically to one of the positive voltage terminal and the system output terminal (See Fig. 1, wherein the output of D3 and D4 are coupled to both of the positive voltage terminal (e.g., when Vset = +5V), to the negative voltage terminal (e.g., when Vset = -5V), and to the system output terminal Vout; Section III; Examiner interprets the first output terminal as the one coupled to the positive voltage terminal on the input side) and the other output terminal is coupled electrically to one of the system output terminal and the negative voltage terminal (See Fig. 1, wherein the output of D3 and D4 are coupled to both of the positive voltage terminal (e.g., when Vset = +5V), to the negative voltage terminal (e.g., when Vset = -5V), and to the system output terminal Vout, and the positive and negative voltage terminals are connected at a first side of the optocouplers as well; Section III; Examiner interprets the second output terminal as the one coupled to the system output terminal); and a light sensitive semiconductor (See Fig. 1, D3 or D4; Section III) which is coupled electrically between the first and second output terminals (See Fig. 1, D3 or D4, electrically coupled between input of positive or negative voltage terminals and system output terminal; Section III), the light sensitive semiconductor having an electrical conductance which varies depending upon the intensity of light transmitted from the light transmitter onto the light sensitive semiconductor (Section III, paragraph 3; As discussed in regards to claim 1, Examiner interprets controlling Q1 to control the output from D1 and the resultant control of the output of D3 as reading on this limitation, as does controlling Q2 to control the output from D2 and the resultant control of the output of D4; In other words, the electrical conductance of D3 and D4 depend on the intensity of light transmitted from D1 and D2, respectively). Regarding claim 14, Schury teaches a method of operating a power supply system for a mass spectrometer (See Fig. 1 for power supply system; Abstract), the power supply system comprising: a first power supply (See Fig. 1, DAC that supplies V-set; Description of Fig. 1; Section III, and in particular paragraphs 2 and 6; Vset being between 0 and +Vref-, i.e., 5V); a second power supply (See Fig. 1, DAC that supplies V-set; Description of Fig. 1; Section III, and in particular paragraphs 2 and 6; Vset being between 0 and -Vref-, i.e., -5V; Examiner notes that the claim does not preclude the two power supplies being housed within the same element); a system output terminal for delivering a system output signal to a component of a mass spectrometer (See Fig. 1, output terminal on left to be delivered to mass spectrometer (or component thereof); Abstract; Section III); a positive voltage terminal that is electrically coupled to the first power supply and which is configured to provide a positive supply voltage (See Fig. 1, DAC that supplies V-set to voltage input; Description of Fig. 1; Section III, and in particular paragraphs 2 and 6; Vset being between 0 and -Vref-, i.e., -5V); a negative voltage terminal that is electrically coupled to the second power supply and which is configured to provide a negative supply voltage (See Fig. 1, DAC that supplies V-set to voltage input; Description of Fig. 1; Section III, and in particular paragraphs 2 and 6; Vset being between 0 and -Vref-, i.e., -5V); a first optocoupler (See Fig. 1, items D1 and D3, and Q1) which is configured to couple the positive voltage terminal to the system output terminal (See Fig. 1; Section III; e.g., when Vset = +5V) electrically by a variable electrical conductance which is set in response to a first control signal (See Fig. 1, item Q1, D1, D3, Section III; Examiner interprets controlling Q1 to control the output from D1 to thereby control the output from D3 as reading on this limitation, as the limitation amounts to a recitation of the physical mechanism of such an optocoupler: as the control signal to the LED is adjusted, the output of the LED is adjusted, thereby varying the conductance of the optocoupler; For instruction, Examiner looked to Applicant’s disclosure for instruction regarding the intended meaning/requirements of the electrical conductance in context, which states in [0049]: “The controller 3 adjusts at least one of the first control signal or the second control to vary the intensity of light transmitted by the light transmitters 23, 24 which, in turn sets the electrical conductance of the first and second optocouplers 19, 20.”; This amounts to a conventional description of how to control such optocouplers, and accordingly, the disclosure of Schury is clearly sufficient to read on the limitation); a second optocoupler (See Fig. 1, items D2 and D4, and Q2) which is configured to couple the negative voltage terminal (See Fig. 1; Section III; e.g., when Vset = -5V) to the system output terminal electrically (See Fig. 1, items D1 and D3 electrically coupled to Vout) by a variable electrical conductance which is set in response to a second control signal (See Fig. 1, item Q2, D2, D4, Section III; Examiner interprets controlling Q2 to control the output from D2 to thereby control the output from D4 as reading on this limitation, as the limitation amounts to a recitation of the physical mechanism of such an optocoupler: as the control signal to the LED is adjusted, the output of the LED is adjusted, thereby varying the conductance of the optocoupler; For instruction, Examiner looked to Applicant’s disclosure for instruction regarding the intended meaning/requirements of the electrical conductance in context, which states in [0049]: “The controller 3 adjusts at least one of the first control signal or the second control to vary the intensity of light transmitted by the light transmitters 23, 24 which, in turn sets the electrical conductance of the first and second optocouplers 19, 20.”; This amounts to a conventional description of how to control such optocouplers, and accordingly, the disclosure of Schury is clearly sufficient to read on the limitation); and a controller (See Fig. 1, ‘Digital controls’; Section III, which discloses an MCU to control the DAC and read a thermometer), wherein the method comprises controlling the controller to operate in control mode (Controller inherently has control mode under the broadest reasonable interpretation, as the controller equivalent performs control actions in operation) in which the controller: provides the first control signal to the first optocoupler (See Fig. 1, item Q1, D1, D3, Section III; Examiner interprets controlling Q1 to control the output from D1 to control the output from D3 as reading on this limitation; See Sections IV and V for operation); receives a positive voltage feedback signal, via a positive voltage feedback path, indicative of the positive supply voltage (See Fig. 1, the branch off of the D3/D4 output that feeds back to the output control; Section III; e.g., when Vset = +5V; In particular, see paragraph 4; See Sections IV and V for operation); provides the second control signal to the second optocoupler (See Fig. 1, item Q2, D2, D4, Section III; Examiner interprets controlling Q2 to control the output from D2 to control D4 as reading on this limitation; See Sections IV and V for operation); receives a negative voltage feedback signal, via a negative voltage feedback path, indicative of the negative supply voltage (See Fig. 1, the branch off of the D3/D4 output that feeds back to the output control; Section III; e.g., when Vset = -5V; In particular, see paragraph 4; See Sections IV and V for operation); and adjusts at least one of the first control signal or the second control signal to set the electrical conductance of the first optocoupler and the electrical conductance of the second optocoupler respectively (See Fig. 1, items Q1, Q2, Section III; Examiner interprets controlling Q1 and Q2 to control the output from D1 and D2 and thereby controlling the output from D3 and D4, respectively, respectively as reading on this limitation) such that the system output terminal delivers a system output signal having a voltage between the positive supply voltage and the negative supply voltage (See Sections III, IV, V; See various output voltages achieved, some of which are between the positive and negative supply voltages). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Schury (DOI: 10.1063/1.5104292) in view of Watanabe (WIPO Doc. No. WO 2017/145334 A1), further in view of Chen (USPN US 8710819 B2). Examiner notes that Watanabe and Chen are Applicant provided prior art via the IDS dated 08/10/2023. Regarding claim 2, Schury teaches the system of claim 1. Schury does not teach wherein the system further comprises: a first power supply having a first output which is coupled electrically to the positive voltage terminal and a second output which is a return output; a second power supply having a third output which is a return output and a fourth output which is coupled electrically to the negative voltage terminal, wherein the second and third outputs of the first and second power supplies are coupled electrically to one another by a return path. However, Schury discloses a single voltage system operating to provide both positive and negative voltages. However, modifying the device of Schury to be formed of plural voltage sources would be within the abilities of one of ordinary skill in the art, as it merely represents and alternative prior art device with equivalent relevant capabilities, such as that of Watanabe. Watanabe teaches wherein the system further comprises: a first power supply (See Fig. 5, item V3) having a first output which is coupled electrically to the positive voltage terminal (See Fig. 5, item T41) a second power supply (See Fig. 5, item V4) having (See Fig. 5, item T62), It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schury with the teachings of Watanabe to achieve wherein the system further comprises: a first power supply having a first output which is coupled electrically to the positive voltage terminal . Doing so represents a simple substitution of a prior art embodiment including separate, plural voltage sources for an embodiment with a singular voltage source (i.e., for both positive and negative voltages), in order to obtain predictable results, namely the ability to independently control the different voltages applied in the way described in Watanabe. Schury in view of Watanabe does not explicitly teach a first power supply having…a second output which is a return output and a second power supply having a third output which is a return output and wherein the second and third outputs of the first and second power supplies are coupled electrically to one another by a return path (Emphases added by Examiner). However, the use of return paths for monitoring a current/voltage feedback signal is well represented in the prior art of record and that searched and one of ordinary skill in the art would be reasonably apprised thereof. Nevertheless, Chen teaches a first power supply having…a second output which is a return output and a second power supply having a third output which is a return output and wherein the second and third outputs of the first and second power supplies are coupled electrically to one another by a return path (See Fig. 1, showing outputs of two power supplies E+ and E- being returned and coupled to one another via a return path; Col. 4, Lines 16-35). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schury in view of Watanabe to include a first power supply having…a second output which is a return output and a second power supply having a third output which is a return output and wherein the second and third outputs of the first and second power supplies are coupled electrically to one another by a return path (Emphases added by Examiner), as taught by Chen. Doing so represents combining known prior art elements according to known methods in order to achieve predictable results and would allow one to monitor the current output as discussed in the above cited portions of Chen, allowing one to ensure proper output via typical techniques. Regarding claim 3, Schury in view of Watanabe, further in view of Chen, teaches the system of claim 2. Watanabe further teaches wherein: the first power supply is configured to provide a positive voltage of between +1kV and +15kV at the positive voltage terminal ([0041]); and the second power supply is configured to provide a negative voltage of between -1kV and -15kV at the negative voltage terminal ([0054]). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER J GASSEN whose telephone number is (571)272-4363. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ROBERT H KIM can be reached at (571)272-2293. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTOPHER J GASSEN/ Examiner, Art Unit 2881 /WYATT A STOFFA/ Primary Examiner, Art Unit 2881
Read full office action

Prosecution Timeline

Aug 10, 2023
Application Filed
Oct 16, 2025
Non-Final Rejection — §102, §103
Jan 23, 2026
Response Filed
Apr 02, 2026
Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
99%
With Interview (+24.3%)
2y 11m
Median Time to Grant
Moderate
PTA Risk
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