DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group II (claims 1-2, 7-13, and 19-20) in the reply filed on 04/28/2026 is acknowledged.
Claims 3-6, and 14-18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group I, there being no allowable generic or linking claim.
Specification
The abstract of the disclosure is objected to because it contains more than 150 words. See MPEP 608.01(b). A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 10 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 10 recites the limitation “the counter”. There is insufficient antecedent basis for this limitation in the claim. For the purposes of compact prosecution, claim 10 will be interpreted as dependent on claim 7, where the term “counter” is introduced.
Claim 20 recites the limitations “the element is configured to be only activated in case of the configuration element.” There is insufficient antecedent basis for these limitations in the claim. For the purposes of compact prosecution, claim 20 will be interpreted as dependent on claim 9, where “element” and “configuration element” are introduced.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 7, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Jakubek, J. et al., (2006). CdTe hybrid pixel detector for imaging with thermal neutrons. Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 563(1), [hereinafter Jakubek] in view of Hirvonen, L. et al., (2016). Photon Counting Imaging with an Electron-Bombarded Pixel Image Sensor. Sensors, 16(5), 617–617 [hereinafter Hirvonen].
Regarding Claim 1:
Jakubek teaches a radiation detector for position-resolved detection of radiation (“Midipix2”, a hybrid pixel detector for detecting neutrons), comprising
at least one sensor tile with a front side facing incident radiation, and a back side opposite the front side (Fig. 1, Pages 1-2: Jakubek discloses a hybrid pixel detecting device including a “semiconductor detector chip ... bonded to a readout chip.” Fig. 1(a) shows the detector chip stacked above the readout chip, with the converter/neutron beam-entry side (“front side”) above the detector chip and bump-bonding/readout chip side (“back side”) below the detector chip);
the sensor tile comprising sensor material sensitive to the radiation (Pages 1-2: the CdTe detector “is used as direct counter of thermal neutrons,” and due to “the high neutron capture cross-section of Cd, the 1mm thick CdTe sensor is practically opaque for slow neutrons,” i.e., the sensor material is sensitive to the radiation);
a set of contacts of electrically conducting material arranged on the back side of the sensor tile and in contact with the sensor material, thereby defining sensor pixels (Pages 1-2: Jakubek teaches the “detector chip is equipped with…a front side matrix of electrodes (256 x 256 square pixels with pitch of 55 µm),” each electrode in then matrix is “a pixelated electrode is bump bonded to Medipix2 readout chip”, i.e., “ a set of contacts on the back side of the sensor tile”, where “[e]ach element of the matrix (pixel) is connected to its respective preamplifier, double discriminator and digital counter integrated on a readout chip”);
a front electrode arranged on the front side of the sensor tile (Page 1 and Fig. 1(a)/(c): Jakubek discloses that the “detector chip is equipped with a single common backside electrode and a front side matrix of electrodes (256 x 256 square pixels with pitch of 55 µm)”, as discussed above, the “front side matrix of electrodes” corresponds to the claimed “set of contacts on the back side of the sensor tile.” Therefore, the “single common backside electrode,” which is opposite the pixelated/bump-bonded contact side, corresponds to the claimed “front electrode on the front side of the sensor tile”);
at least one ASIC comprising a set of readout circuits in electrical connection with the contacts, each readout circuit being configured to process a signal received from the sensor pixel the readout circuit is electrically connected to (Page 1: the Medipix2 readout chip (“ASIC”) includes a “preamplifier, double discriminator and digital counter integrated on a readout chip” for each pixel (“readout circuits”), and each readout circuit is connected to a corresponding pixelated electrode/contact through the bump bonding, so that the signal from each sensor pixel goes to the corresponding preamplifier/discriminator/counter, which processes the signal and produces a count),
wherein each readout circuit of the set is configured to provide an output signal representative of the radiation incident in the corresponding sensor pixel (Pages 1-2: each pixel is connected to its respective preamplifier, double discriminator, and digital counter integrated on the readout chip. When a slow neutron beam is captured by the CdTe sensor, a 558 keV photon is emitted, and some photons are converted to electrons by internal conversion. The generated photon/electron loses energy in the CdTe sensor pixel, and the pixel readout circuit compares that energy-loss signal with a threshold; if the energy loss in that pixel is above the threshold, the particle is detected and the digital counter for that pixel is incremented (“output signal representative of the radiation incident”).
However, Jakubek does not specifically disclose a braking layer arranged on and at least partly covering the front electrode, for decreasing energy or flux of the incident radiation.
Hirvonen discloses an entrance-side braking/attenuation layer for decreasing energy or flux of incident electrons (Page 4-Section 2.1: the “sensor is covered by a layer of aluminium, and thus only electrons with energy above a threshold energy eVth will be detected”). As such, incorporating the aluminum layer taught by Hirvonen to cover the front electrode on the front side of Jakubek’s detector would result in a braking layer covering the front electrode for decreasing energy or flux of the incident radiation, as claimed.
It would have been obvious for an ordinary skilled person in the art, before the effective time of filing, to modify Jakubek by placing an aluminum covering layer on the radiation-entry side/front electrode of Jakubek’s detector, as taught by Hirvonen, to control which incident particles reach and are detected by the sensor, suppress detection of lower-energy or background parties, and provide a more selective detector response.
Regarding Claim 2:
Jakubek in view of Hirvonen teaches the radiation detector of claim 1. Jakubek further teaches wherein the sensor material comprises or is made from a high-Z material, with Z>30 (the CdTe sensor comprises Cd (48) and Te (52) which are both high-Z materials).
Regarding Claim 7:
Jakubek in view of Hirvonen teaches the radiation detector of claim 1. Jakubek further teaches wherein each readout circuit of the set comprises a counter for counting pulses generated in the corresponding sensor pixel in response to the radiation incident thereto, and is configured to provide the output signal subject to the counted pulses (Pages 1-2: each pixel is connected to a respective digital counter integrated on the readout chip. Particles are detected by comparing energy loss to a threshold and incrementing the event count in the pixel. The per-pixel count is the output representing detected radiation events).
Regarding Claim 13:
Claim 13 recites method steps of manufacturing a radiation detector, and the manufactured detector includes substantially the same structural components recited in claim1. As discussed above, Jakubek in view of Hirvonen teaches the radiation detector structure of claim 1. In particular, when applying Hirvonen’ s aluminum layer to Jakubek’ s 256 x 256-pixel detectors, the layer would cover at least 10x10 sensor pixels, as required in claim 13. The claimed manufacturing steps, such as “providing,” “forming,” and “electrically connecting,” are generic fabrication steps and do not recite any particular order, tool, or special manufacturing techniques. Therefore, because the combined references teach the resulting detector structure, it would have been obvious for an ordinary skilled person in the art, before the effective time of filing, to manufacture the detector using ordinary fabrication steps to provide the sensor tile, form the electrodes/contacts and breaking layer, provide the ASIC, and electrically connect the contacts to the ASIC readout circuits, as claimed.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Jakubek in view of Hirvonen, and further in view of US20100214654A1 [hereinafter Birk].
Regarding Claim 8:
Jakubek in view of Hirvonen the radiation detector of claim 1. However, the combined references do not specifically note the configurable common-counting arrangement recited in claim 8.
Birk teaches a detector having two detector channels and each generates a pulse when it detects a photon. Instead of always counting the two detector channels separately, Birk teaches that programmable logic, such as an FPGA/CPLD, can connect the two detector channels together so their pulses are accumulated into one summed pulse signal. The summed signal is then sent to a common counter input, which counts the total pulses from both detector channels (See paras. [0024-0028,0030-0031, 0067-0068] of Birk).
As such, in the modified detector, by incorporating Birk’s FPGA/CPLD programmable logic into the ASIC/readout chip in the Jakubek detector, in normal operation, each Jakubek pixel readout circuit could count its own detected pulses independently; when the FPGA/CPLD activates common counting, the pulse outputs from the at least two readout circuits would be logically connected/OR’ed or summed into one combined pulse stream, and that combined pulse stream would be supplied to one selected/common counter input for counting. Thus, the modified detector would have a configuration element for activating common counting, and when activated, one counter/common counter input would count pulses from the at least two readout circuits, as claimed.
It would have been obvious for an ordinary skilled person in the art, before the effective time of filing, to modify Jakubek’s pixel readout circuits to include a configurable common-counting scheme as taught by Birk, to reduce the number of independently read count values and allow faster/lower-resolution readout especially when full pixel resolution is not required.
Claims 9 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Jakubek in view of Hirvonen and Birk, and further in view of US 20170176250A1 [hereinafter Rae].
Regarding Claim 9:
The combined references teach the radiation detector of claim 8. However, the combined references do not specifically note the for each of the at least two readout circuits, an element configured to shorten a duration of the pulses supplied by the readout circuit for the common counting
Rae teaches for each of the at least two readout circuits, an element configured to shorten a duration of the pulses supplied by the readout circuit for the common counting (Abstract, paras. [0031-0036]: a photon detector (SPAD) detects photons and outputs a pulse which is routed to a pulse shape array (“element”) via the quench circuit, “the pulse shaper array 130 may shape the received 10 ns pulse by reducing the pulse length”).
It would have been obvious for an ordinary skilled person in the art, before the effective time of filing, to modify the common-counting arrangement of Jakubek/Hirvonen-Birk detector by providing a pulse-shaping element for each readout circuit, as taught by Rae, to shorten the duration of the pulses supplied for common counting. Rae explains that reducing pulse length prevents the common output path from being “locked up” and unable to process additional near-simultaneous pulses from other detector pixels. Thus, applying Rae’s known pulse-shortening technique to the common-counting detector arrangement would have improved the accuracy of common counting by reducing missed events caused by overlapping or long-duration pulses from different readout circuits.
Regarding Claim 19:
The combined references teach the radiation detector of claim 9.
Rae further teaches wherein the element is configured to shorten a duration of the pulses supplied by the readout circuit to less than 10 ns, preferably less than 5 ns, preferably less than 2 ns or preferably less than 1 ns, and/or preferably more than 0.5 ns (para. [0035] “detection of a photon by a SPAD 112 may cause the SPAD 112 to output a pulse having a 10 nanosecond (ns) pulse length. In such a case, the pulse shaper array 130 may shape the received 10 ns pulse by reducing the pulse length, for example, to 1 ns”)
Regarding Claim 20:
The combined references teach the radiation detector of claim 9.
Rae further teaches that pulse shaper elements are placed in the SPAD output path before the OR-tree/common output, so that the SPAD pulses are shortened before being provided to the OR-tree for common output. Rae also teaches that SPADs may be enabled “by row, column, or individually” and that enabled SPADs contribute to the OR-tree output (para. [0052]).
As such, in the modified detector structure, the pulse-shortening element would be enabled only when the programmable common-counting/OR-connection mode is enabled, so that pulse shortening is applied to pulses being supplied into the common-counting path and need not be activated during normal independent per-pixel counting. This would result in the pulse-shortening element being activated only when the configuration element activates common counting, as claimed.
Claims 10 -11 are rejected under 35 U.S.C. 103 as being unpatentable over Jakubek in view of Hirvonen, and further in view of Hammer, M. et al., (2020). Strategies for on-chip digital data compression for X-ray pixel detectors. Journal of Instrumentation, 16(01), P01025–P01025 [hereinafter Hammer].
Regarding Claim 10:
Jakubek in view of Hirvonen the radiation detector of claim 7. However, the combined references do not specifically note the ASIC comprises at least one compression unit connectable to the or a subset of the readout circuits of the set configured to compress a counter value read out from the counter of the connected readout circuit.
Hammer teaches an on-chip compression scheme (“zeromask”) for pixel detector ASICs, where pixel data are shifted from the pixel array to compression logic at the ASIC edge before being streamed off the ASIC chip. Hammer also teaches compressing photon-counting detector data by encoding a 14-bit photon count into a reduced-bit encoded value, such as 8 or 9 bits, thereby reducing the number of bits transmitted for detector count data (see Abstract and Page 4-S. 3.1.2 of Hammer).
As such, in the modified detector, Hammer’s digital compression logic would be incorporated into Jakubek’s Medipix2 ASIC/readout chip and connected to receive the per-pixel count values output from the readout circuits/counters. Instead of transmitting each full counter value from the pixel readout circuit without compression, the compression unit would encode the counter value into a reduced-bit value before the data are sent off the ASIC. Thus, the modified detector would include an ASIC having a compression unit connectable to at least a subset of the readout circuits and configured to compress counter values read out from the connected counters, as claimed.
It would have been obvious for an ordinary skilled person in the art, before the effective time of filing, to modify Jakubek’s ASIC/readout circuit arrangement to include a compression unit configured to compress counter values, as taught by Hammer. Hammer explains that high-frame-rate pixel detector ASICs are limited by off-chip data bandwidth and that on-chip digital compression can make more efficient use of that bandwidth. Thus, applying Hammer’s known on-chip count-data compression technique to Jakubek’s pixel detector ASIC would have reduced the amount of data transmitted from the detector ASIC and increased effective readout bandwidth/frame-rate capability.
Regarding Claim 11:
The combined references teach the radiation detector of claim 1.
Jakuek further teaches wherein n×m readout circuits of the set are arranged in the ASIC in form of an array (the Medipix2 detector chip has “a front side matrix of electrodes (256 × 256 square pixels with pitch of 55 µm),” and each element of the matrix (pixel) is connected to its respective preamplifier, double discriminator and digital counter integrated on a readout chip.” Thus, Jakubek teaches a 256×156 array of readout circuits/counters in the ASIC readout chip).
However, the combined references not specially teach wherein a number of compression units in the ASIC at least equal to the number m of readout circuits arranged in a row of the array, wherein the ASIC comprises a row control for transferring counter values from the readout circuits of a row to the corresponding compression units, wherein the compression units are configured to operate in parallel in compressing the transferred counter values.
Jakubek in view of Hammer teaches:
wherein a number of compression units in the ASIC at least equal to the number m of readout circuits arranged in a row of the array (Hammer teaches a parallel implementation at the ASIC edge, including an 8-pixel ZM compressor block, where “the compressor block of layout (a) support 8 pixel inputs” and therefore “8 parallel shift buses can be implemented per row,” resulting in reduced row shift time (see Pages 2 and 21 of Hammer). As such, in the modified detector, Hammer’s ASIC-edge compression architecture would be applied by providing a plurality of compression units at the ASIC edge, with the number of compression units corresponding to the number m of pixel/readout circuits in a row, e.g., one compression unit for each column position of the row));
wherein the ASIC comprises a row control for transferring counter values from the readout circuits of a row to the corresponding compression units (Jakubek teaches that each pixel/readout circuit includes a digital counter. Hammer teaches an ASIC readout/transfer logic, under a frame sync pulse, the logic within each pixel loads ADC outputs into registers forming “a long shift register spanning an entire pixel column,” and the digital logic shifts samples “to the edge of the pixel array,” where “compression logic further reduces the number of bits” sent off-chip (see Pages 4-5 of Hammer). As such, in the modified detector, the ASIC readout control would be implemented as row control that selects a row of Jakubek counters and transfers the m counter values from that row to the corresponding m compression units/input paths at the ASIC edge),
wherein the compression units are configured to operate in parallel in compressing the transferred counter values (Hammer teaches “the compressor block of layout (a) supports 8 pixel inputs, 8 parallel shift buses can be implemented per row, resulting in an 8-fold reduction in the row shift time” (see Page 21 of Hammer). As such, in the modified detector, the m compression units/input paths corresponding to the m readout circuits of a selected row would receive the m transferred counter values and operate in parallel to compress those counter values before streaming the compressed data off the ASIC).
It would have been obvious for an ordinary skilled person in the art, before the effective time of filing, to modify Jakubek’s hybrid pixel detector by incorporating Hammer’s ASIC-edge compression architecture. Hammer explains that high frame rate pixel detector ASICs are limited by off-chip bandwidth and that placing compression logic at the ASIC edge, with parallel pixel-data inputs/parallel shift busses, reduces the amount of data sent off-chip and reduces row shift time. As such, applying Hammer’s parallel ASIC-edge compression architecture to Jakubek’s counter array would allow arow of counter values be transferred to corresponding compression units and compressed in parallel before off-chip transmission, thereby improving readout bandwidth and frame-rate capability.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Jakubek in view of Hirvonen, and further in view of Tate, M. et al., (2016). High Dynamic Range Pixel Array Detector for Scanning Transmission Electron Microscopy. Microscopy and Microanalysis, 22(1), 237–249 [hereinafter Tate].
Tate teaches Electron microscope (Abstract: “a hybrid pixel array detector…adapted for use in electron microscope applications”), comprising
a source for generating an electron beam (Page 12: mounting the EMPAD detector in a “FEI Tecnai F20 200 keV Schottky field emission STEM,” which necessarily includes a Schottky field-emission electron source/gun for generating the electron beam),
a sample holder for holding a sample to be investigated in the electron beam (Page 4: “the electron beam is progressively scanned over the sample”, which inherently requires a holder/stage alike structure to support the sample), and
a radiation detector, arranged to detect electrons transmitted through or scattered by the sample when arranged in the electron beam (Pages 29 and 36: Fig. 1(a) shows scanning transmission electron microscopy imaging using the EMPAD, where the electron beam is “stepped at each scan position and the full convergent beam electron diffraction pattern is recorded”. Tate further teaches that the detector was mounted in an FEI Tecnai F20 200 keV Schottky field-emission STEM and used to record diffraction patterns and extract BF, ADF/HAADF, DPC, and COM signals from the same EMPAD-STEM data set),
wherein the electron microscope is a 4D-STEM device (Fig. 1(a) shows STEM imaging using EMPAD, where the beam is stepped at each scan position and the full CBED/diffraction pattern is recorded, i.e., for each 2D scan position, a 2D diffraction image is stored. That is essentially the 4D-STEM setup).
However, Tate does not specially note its radiation detector has the same structure as claim 1. As discussed before, Jakubek in view of Hirvonen teaches a radiation detector according to according to claim 1.
Therefore, it would have been obvious for an ordinary skilled person in the art, before the effective time of filing, to incorporate the Jakubek/Hirvonen radiation detector into a STEM/4D STEM electron microscope, as taught by Tate. The STEM acquisition in Tate records the full scattering pattern at each scan position, which requires a position resolved detector capable of distinguishing where scattered electron land on the detector plane. The Jakubek/Hirvonen detector is hybrid pixel radiation detector that provides per-pixel output signals representative of incident radiation. Thus, using the modified Jakubek/Hirvonen detector as Tate’s electron detector would have provided the position resolved detector needed to collect the 2D scattered electron pattern at each probe position for 4D-STEM acquisition.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JING WANG whose telephone number is (571)272-2504. The examiner can normally be reached M-F 7:30-17:00.
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/JING WANG/Examiner, Art Unit 2881
/WYATT A STOFFA/Primary Examiner, Art Unit 2881
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