Attorney Docket Number: SYP332914US01
Filing Date: 9/07/2023
Claimed Foreign Priority Date: 3/18/2021 (JP2021-045132)
Inventors: Terahata et al.
Examiner: Thomas McCoy
DETAILED ACTION
This Office action responds to the amendments filed on 2/06/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Acknowledgement
The Amendment filed on 2/06/2026, responding to the Office action mailed 11/07/2025, has been
entered. Applicant amended claims 1-8. The present Office action is made with all the suggested amendments being fully considered. Accordingly, pending in this application are claims 1-8.
Response to Amendments
Applicant’s amendments to the claims have overcome the respective claim rejections under 35 U.S.C. 102 and 35 U.S.C. 103 as previously formulated in the Non-Final Office action mailed on 11/07/2025. Accordingly, the claim rejections of 35 U.S.C. 102 and 35 U.S.C. 103 are hereby withdrawn. Accordingly, pending in this application are claims 1-8. New grounds of rejections are presented below, however, as necessitated by applicant’s amendments to the claims.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4 recites the limitation "…the pad electrode…" in lines 3-4. There is insufficient antecedent basis for this limitation in the claim. For the purpose examination, “the pad electrode” will be construed to recite “the aluminum pad electrode”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 20210225727 A1) in view of Ho (US 20140117523 A1) further in view of Chen (US 20190172802 A1) (hereinafter Chen2).
Regarding claim 1, Chen (see, e.g., fig. 8) shows most aspects of the instant invention including a flip-chip connection structure comprising:
A plurality of terminals (e.g., conductive terminals 230 + contact pads 310) configured to connect to a semiconductor (e.g., core portion 202 + paragraph 65 “…the core portion 202 may be a substrate such as a bulk semiconductor substrate” + paragraph 79 “The conductive terminals 230 may be used to bond to an external device or an additional electrical component. In some embodiments, the conductive terminals 230 are used to bond to a…semiconductor substrate”),
Each of the plurality of terminals (e.g., conductive terminals 230 + contact pads 310) includes aluminum (Al) (see, e.g., paragraph 79 “the conductive terminals 230 may include a conductive material such as …aluminum…”);
a joined body (e.g., top contact pad 310 + conductive terminal 230 + bottom contact pad 310) that includes a first terminal (e.g., first terminal, see annotated fig. 1 below) of the plurality of terminals (e.g., conductive terminals 230 + contact pads 310) and a second terminal (e.g., second terminal, see annotated fig. 1 below) of the plurality of terminals (e.g., conductive terminals 230 + contact pads 310);
at least one of the first terminal (e.g., terminal 230 of core portion 202) or the second terminal includes an aluminum bump (e.g., terminal 230 of core portion 202) is formed by an aluminum bump (see, e.g., paragraph 79 “…the conductive terminals 230 include …C4 bumps, bumps…the conductive terminals 230 may include a conductive material such as …aluminum…”);
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Annotated Fig. 1
Chen (see, e.g., fig. 8), however, fails to show wherein the plurality of terminals is configured to a connect to a plurality of semiconductors, a first semiconductor of the plurality of semiconductors is connected to a second semiconductor of the plurality of semiconductors by a flip chip, a first terminal of the plurality of terminals and the second terminal of the plurality of terminals are integrally joined, and the aluminum bump is in a wedge shape and the wedge shape is different from a ball shape.
Ho (see, e.g., fig. 6A), in a similar device to Chen, teaches a bump (e.g., interconnection structures 108’a, 108’b, 108’’a and 108’’b) is in a wedge shape (see, e.g., paragraph 38 “The interconnection structures 108'a, 108'b, 108''a and 108''b can be cylindrical, spherical or wedge-shaped metal bumps (such as Au and Cu)”), and the wedge shape is different from a ball shape (e.g., note that the “wedge-shaped” configuration is explicitly listed after the “spherical-shaped” configuration, hence the two are viewed as distinct/different).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the wedge shape of Ho within the first terminal aluminum bump configuration of Chen, in order to allow for a tighter pitch terminal interconnect within the joined body, enhancing the signal integrity within the device.
Chen in view of Ho, however, fails to teach wherein the plurality of terminals is configured to a connect to a plurality of semiconductors and a first semiconductor of the plurality of semiconductors is connected to a second semiconductor of the plurality of semiconductors by a flip chip.
Chen2 (see, e.g., fig. 9), in a similar device to Chen in view of Ho, teaches a plurality of terminals (e.g., plurality of solder balls 105 + shared contact pad structure, see annotated fig. 2) connected to a plurality of semiconductors (e.g., plurality of semiconductor chips 106), and a first terminal of the plurality of terminals (e.g., plurality of solder balls 105) and a second terminal of the plurality of terminals (e.g., plurality of solder balls 105) are integrally joined (e.g., note that the solder balls 105 are joined together by the contact pad structure shared between them, see annotated fig. 2 below).
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Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the plurality of semiconductor configuration of Chen2 within the device of Chen in view of Ho (as opposed to the current single large semiconductor structure of Chen in view of Ho), in order to achieve the expected result of providing numerous semiconductor functionalities and configurations within the device as desired. It further would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the integrally joined terminal configuration (shared contact pad within the terminal and connecting the plurality of bumps within the plurality of terminals) of Chen2 within the bottom contact pad setup of Chen in view of Ho further in view of Chen2, in order to achieve the expected result of providing a direct pad connection between the bumps within the device. Note that the bumps of Chen already comprise a flip chip variation (see, e.g., C4 bump variation in paragraph 79 of Chen), and hence the two separate semiconductors are still connected via this C4 flip chip configuration.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Ho further in view of Chen2 and Akira (JP 2003303853 A).
Regarding claim 5, Chen (see, e.g., fig. 8) shows most aspects of the instant invention including a flip-chip connection structure comprising:
A semiconductor (e.g., core portion 202 + paragraph 65 “…the core portion 202 may be a substrate such as a bulk semiconductor substrate” + paragraph 79 “The conductive terminals 230 may be used to bond to an external device or an additional electrical component. In some embodiments, the conductive terminals 230 are used to bond to a…semiconductor substrate”);
A substrate (e.g., circuit substrate 300), wherein the semiconductor (e.g., core portion 202) is joined (e.g., note that the plurality of terminals directly electrically connect the semiconductor to the substrate) to the substrate (e.g., circuit substrate 300);
A plurality of terminals (e.g., conductive terminals 230 + contact pads 310) configured to connect the semiconductor (e.g., core portion 202) to the substrate (e.g., circuit substrate 300);
a joined body (e.g., top contact pad 310 + conductive terminal 230 + bottom contact pad 310) that includes a first terminal (e.g., first terminal, see annotated fig. 3 below) of the plurality of terminals (e.g., conductive terminals 230 + contact pads 310) and a second terminal (e.g., second terminal, see annotated fig. 3 below) of the plurality of terminals (e.g., conductive terminals 230 + contact pads 310);
at least one of the first terminal (e.g., terminal 230 of core portion 202) or the second terminal includes an aluminum bump (e.g., terminal 230 of core portion 202) is formed by an aluminum bump (see, e.g., paragraph 79 “…the conductive terminals 230 include …C4 bumps, bumps…the conductive terminals 230 may include a conductive material such as …aluminum…”)
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Chen (see, e.g., fig. 8), however, fails to show wherein the substrate is at least one of a liquid crystal panel or an organic EL panel of a display system, the first terminal of the plurality of terminals and the second terminal of the plurality of terminals are integrally joined, and the aluminum bump is in a wedge shape and the wedge shape is different from a ball shape.
Ho (see, e.g., fig. 6A), in a similar device to Chen, teaches a bump (e.g., interconnection structures 108’a, 108’b, 108’’a and 108’’b) is in a wedge shape (see, e.g., paragraph 38 “The interconnection structures 108'a, 108'b, 108''a and 108''b can be cylindrical, spherical or wedge-shaped metal bumps (such as Au and Cu)”), and the wedge shape is different from a ball shape (e.g., note that the “wedge-shaped” configuration is explicitly listed after the “spherical-shaped” configuration, hence the two are viewed as distinct/different).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the wedge shape of Ho within the first terminal aluminum bump configuration of Chen, in order to allow for a tighter pitch terminal interconnect within the joined body, enhancing the signal integrity within the device.
Chen in view of Ho, however, fails to teach wherein the plurality of terminals is configured to a connect to a plurality of semiconductors and a first semiconductor of the plurality of semiconductors is connected to a second semiconductor of the plurality of semiconductors by a flip chip.
Chen2 (see, e.g., fig. 9), in a similar device to Chen in view of Ho, teaches a plurality of terminals (e.g., plurality of solder balls 105 + shared contact pad structure, see annotated fig. 4) connected to a plurality of semiconductors (e.g., plurality of semiconductor chips 106), and a first terminal of the plurality of terminals (e.g., plurality of solder balls 105) and a second terminal of the plurality of terminals (e.g., plurality of solder balls 105) are integrally joined (e.g., note that the solder balls 105 are joined together by the contact pad structure shared between them, see annotated fig. 4 below)
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Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the plurality of semiconductor configuration of Chen2 within the device of Chen in view of Ho (as opposed to the current single large semiconductor structure of Chen in view of Ho), in order to achieve the expected result of providing numerous semiconductor functionalities and configurations within the device as desired. It further would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the integrally joined terminal configuration (shared contact pad within the terminal and connecting the plurality of bumps within the plurality of terminals) of Chen2 within the bottom contact pad setup of Chen in view of Ho further in view of Chen2, in order to achieve the expected result of providing a direct pad connection between the bumps within the device.
Chen in view of Ho further in view of Chen2, however, fails to teach the substrate is at least one of a liquid crystal panel or an organic EL panel of a display system.
Akira (see, e.g., description text), in a similar device to Chen in view of Ho further in view of Chen2 teaches a substrate (see, e.g., paragraph text “substrates … in the manufacturing process of flat display panels such as plasma displays, semiconductor chips…are mounted on the substrate…”) of at least one of a liquid crystal panel or an organic EL panel of a display system or an organic EL panel of a display system (see, e.g., paragraph text “substrates (for example, liquid crystal, EL…)…”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the liquid crystal panel of Akira within the substrate of Chen in view of Ho further in view of Chen2, in order to achieve the expected result of providing a display output medium within the device for monitoring/testing processes as desired.
Regarding claim 6, Akira (see, e.g., description text) teaches wherein the semiconductor is connected to the substrate of the at least one of the liquid crystal panel or the organic EL panel (see, e.g., paragraph text “substrates (for example, liquid crystal, EL…)…”) performed by functions of an ultrasonic wave (see, e.g., paragraph text “the present inventor has focused on bonding both electrodes of the chip and the substrate by ultrasonic waves”) and pressurizing force (see, e.g., paragraph text “the chip and the substrate are heated and temporarily pressure-bonded to bond Temporary pressure bonding step A2”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the ultrasonic wave and pressurizing force of Akira between the semiconductor contact pads/pad electrodes of the terminals and the substrate of Chen in view of Ho further in view of Chen2 and Akira, as ultrasonic waves and pressurizing forces were well known techniques at the time of filing the invention to bond a substrate to a pad electrode.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Ho further in view of Chen2 and Tsai (US 20220293524 A1).
Regarding claim 2, Chen (see, e.g., fig. 8) shows the joined body (e.g., top contact pad 310 + conductive terminal 230 + bottom contact pad 310) further includes a first configuration in which the first terminal (e.g., first terminal, see annotated fig. 1 above) includes the aluminum bump (see, e.g., paragraph 79 “…the conductive terminals 230 include …C4 bumps, bumps…the conductive terminals 230 may include a conductive material such as …aluminum…”) and the second terminal (e.g., second terminal, see annotated fig. 1 above) includes a pad electrode (see, e.g., contact pad 310 of second terminal, see annotated fig. 1 above).
Chen in view of Ho further in view of Chen2, however, fails to teach that this semiconductor terminal formed by a pad electrode is aluminum.
Tsai (see, e.g., fig. 1A), in a similar device to Chen in view of Ho further in view of Chen2, teaches a contact pad (e.g., second contact pad 122) comprising aluminum (paragraph 27 “The second contact pads 122 may include, or may consist of, a conductive material such as aluminum…”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the aluminum of Tsai within the pad electrode of Chen in view of Ho further in view of Chen2, as aluminum was a well-known material to be included within a conductive pad, as taught by Tsai.
Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Ho further in view of Chen2, Tsai, and Stansbury (US 6001724 A).
Regarding claim 3, Chen (see, e.g., fig. 8) shows the aluminum bump (see, e.g., paragraph 79 “…the conductive terminals 230 include …C4 bumps, bumps…the conductive terminals 230 may include a conductive material such as …aluminum…”) is joined to a pad electrode (e.g., bottom contact pad 310).
Chen in view of Ho further in view of Chen2 and Tsai, however, fails to teach wherein the aluminum bump is joined to the pad electrode by an aluminum wire.
Stansbury (see, e.g., paragraph 14), in a similar device to Chen in view of Ho further in view of Chen2 and Tsai, teaches a bump is joined to a pad electrode by an aluminum wire (see, e.g., paragraph 14 “The method, simply stated, comprises: providing a semiconductor die having a pad, providing an aluminum wire; forming a ball bump on the aluminum wire using a thermosonic ball bonding apparatus….and then thermosonically bonding the ball bump to the pad of the die”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the ball bonding method of Stansbury within the aluminum bump forming of Chen in view of Ho further in view of Chen2 and Tsai, as this wire ball-bonding method was a well-known technique at the time of filing the invention in order to form a bump on a conductive pad, as taught by Stansbury.
Regarding claim 4, Stansbury (see, e.g., paragraph 14), in a similar device to Chen in view of Ho further in view of Chen2 and Tsai teaches wherein the pad electrode includes an aluminum wire (see, e.g., paragraph 14 “The method, simply stated, comprises: providing a semiconductor die having a pad, providing an aluminum wire; forming a ball bump on the aluminum wire using a thermosonic ball bonding apparatus….and then thermosonically bonding the ball bump to the pad of the die”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the aluminum wire of Stansbury within the device of Chen in view of Ho further in view of Chen2 and Tsai, in order to include the superior bonding configuration between the pad electrode on the substrate semiconductor chip as desired, as taught by Stansbury (see, e.g., paragraph 14).
Claim 7 is rejected under 35 U.S.C. 103 over Chen in view of Ho further in view of Chen2, Akira, and Visani (US 20200348576 A1).
Regarding claim 7, Akira (see, e.g., paragraph text) teaches the joining between part of the substrate and the chip (see, e.g., paragraph text “When ultrasonic vibration is applied to the contact portion of both electrodes of the substrate and the chip, the heat generated is at room temperature…”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the room temperature configuration of Akira during the ultrasonic step of Chen in view of Ho further in view of Chen2 and Akira, as room temperature was a well-known environment at the time of filing the invention to use as a heat condition during the ultrasonic bonding step (as taught by Akira).
Chen in view of Ho further in view of Chen2 and Akira fails to teach the substrate includes a substrate of a stacked display-panel, and the semiconductor is joined to the substrate of the stacked display-based panel at room temperature.
Visani (see, e.g., fig. 1A), in a similar device to Chen in view of Ho further in view of Chen2 and Akira, teaches a substrate (e.g., substrate 150) includes a stacked display-panel (e.g., stack of displays 101, 102, 103, 104, 105, 106).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the stacked display-panel of Visani within the substrate of Chen in view of Ho further in view of Chen2 and Akira, in order to increase the reliability of the display panel setup, as providing more than one display panel decreases the risk of device failure due to single display-panel degradation. Note that Chen in view of Ho further in view of Chen2 and Akira already teaches joining the semiconductor to the substrate, and it would have been obvious to one of ordinary skill in the art to further join this new substrate of a stacked display-panel to the semiconductor, in order to achieve the expected result of providing a direct electrical connection to the stacked display-panels.
Claim 8 is rejected under 35 U.S.C. 103 over Chen2 in view of Chen further in view of Tsai, Ho, and Akira.
Regarding claim 8, Chen2 (see, e.g., fig. 9), shows most aspects of the instant invention, including a flip chip connection method comprising:
Joining (e.g., note that the semiconductors are electrically connected by the redistribution layer) a first semiconductor (e.g., left-side semiconductor chip 106) of a plurality of semiconductors (e.g., plurality of semiconductor chips 106) to a second semiconductor (e.g., right-side semiconductor chip 106) of the plurality of semiconductors (e.g., plurality of semiconductor chips 106);
Chen2 (see, e.g., fig. 9), however, fails to explicitly show a first aluminum bump and an aluminum pad electrode, or the first aluminum bump and a second aluminum bump, wherein at least one of the first aluminum bump or the second aluminum bump is in a wedge shape, the wedge shape is different from a ball shape, and the first semiconductor is joined to the second semiconductor based on the joining of the joined body, joining a flip chip based on one of weighting or pressurization and an ultrasonic wave in an environment of room temperature.
Chen (see, e.g., fig. 8), in a similar device to Chen2, teaches a joining a joined body (e.g., top contact pad 310 + conductive terminal 230 + bottom contact pad 310) by an aluminum bump (see, e.g., paragraph 79 “…the conductive terminals 230 include …C4 bumps, bumps…the conductive terminals 230 may include a conductive material such as …aluminum…”) and a pad electrode (e.g., bottom contact pad 310).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the aluminum bump of Chen within the joining setup of Chen2 (e.g., modifying the current plurality of solder ball/RDL layer setup for the aluminum bump and contact pad configuration of Chen), in order to achieve the expected result of providing a superior thermal conductivity within the device as desired.
Chen2 in view of Chen, however, fails to teach that the pad electrode is aluminum, while it also fails to teach wherein at least one of the first aluminum bump or the second aluminum bump is in a wedge shape, the wedge shape is different from a ball shape, and the first semiconductor is joined to the second semiconductor based on the joining of the joined body, joining a flip chip based on one of weighting or pressurization and an ultrasonic wave in an environment of room temperature.
Tsai (see, e.g., fig. 1A), in a similar device to Chen2 in view of Chen, teaches a contact pad (e.g., second contact pad 122) comprising aluminum (paragraph 27 “The second contact pads 122 may include, or may consist of, a conductive material such as aluminum…”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the aluminum of Tsai within the contact pad/pad electrode of the joined body of Chen2 in view of Chen, as aluminum was a well-known material to be included within a conductive pad, as taught by Tsai.
Chen2 in view of Chen further in view of Tsai, however, fails to teach wherein at least one of the first aluminum bump or the second aluminum bump is in a wedge shape, the wedge shape is different from a ball shape, and the first semiconductor is joined to the second semiconductor based on the joining of the joined body, joining a flip chip based on one of weighting or pressurization and an ultrasonic wave in an environment of room temperature.
Ho (see, e.g., fig. 6A), in a similar device to Chen2 in view of Chen further in view of Tsai, teaches a bump (e.g., interconnection structures 108’a, 108’b, 108’’a and 108’’b) is in a wedge shape (see, e.g., paragraph 38 “The interconnection structures 108'a, 108'b, 108''a and 108''b can be cylindrical, spherical or wedge-shaped metal bumps (such as Au and Cu)”), and the wedge shape is different from a ball shape (e.g., note that the “wedge-shaped” configuration is explicitly listed after the “spherical-shaped” configuration, hence the two are viewed as distinct/different).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the bump wedge shape of Ho within the first aluminum bump configuration of Chen2 in view of Chen further in view of Tsai, in order to allow for a tighter pitch terminal interconnect within the joined body, enhancing the signal integrity within the device. Note that these modifications all occur within the joined body, hence the electrically connected first semiconductor and the second semiconductor are joined by these modifications within the joined body of the electrical connection.
Chen2 in view of Chen further in view of Tsai and Ho, however, fail to teach joining a flip chip based one of weighting or pressurization and an ultrasonic wave in an environment of room temperature.
Akira (see, e.g., description text), in a similar device to Chen2 in view of Chen further in view of Tsai and Ho, teaches joining a flip chip based on pressurization (see, e.g., paragraph text “the chip and the substrate are heated and temporarily pressure-bonded to bond Temporary pressure bonding step A2”) and an ultrasonic wave (see, e.g., paragraph text “the present inventor has focused on bonding both electrodes of the chip and the substrate by ultrasonic waves”) in an environment of room temperature (see, e.g., paragraph text “When ultrasonic vibration is applied to the contact portion of both electrodes of the substrate and the chip, the heat generated is at room temperature…”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the pressurization and ultrasonic wave methodology of Akira within the method of Chen2 in view of Chen further in view of Tsai and Ho, as pressurization and ultrasonic wave bonding were well-known techniques in the art at the time of filing the invention, in order to bond/join the conductive interface portions of the semiconductor to one another, as taught by Akira.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thomas McCoy at (571) 272-0282 and between the hours of 9:30 AM to 6:30 PM (Eastern Standard Time) Monday through Friday or by e-mail via Thomas.McCoy@uspto.gov. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705.
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/THOMAS WILSON MCCOY/ Examiner, Art Unit 2814 /WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
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