DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang(USPGPUB DOCUMENT: 2016/0133594, hereinafter Huang) in view of Satoh (USPGPUB DOCUMENT: 2019/0157229, hereinafter Satoh).
Re claim 1 Huang discloses in Fig 1 a packaged semiconductor power module, comprising: a first substrate(substrates of 200/300); a second substrate(substrates of 200/300); a semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029], the pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029] being positioned between the first substrate(substrates of 200/300) and the second substrate(substrates of 200/300); a first terminal(202a/202b/204a/204b/206a/206b) on a first side of the power module and electrically coupled to the first substrate(substrates of 200/300); and a second terminal(202a/202b/204a/204b/206a/206b) on a second side of the power module and electrically coupled to the second substrate(substrates of 200/300).
Huang does not disclose a sintered-silver semiconductor die pillar
Satoh disclose in Fig 10 a sintered-silver semiconductor die pillar[0052]
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Satoh to the teachings of Huang in order to withstand higher temperatures [0002, Satoh].
It would have been obvious to one of ordinary skill in the art at the time of the inventions to use the material of Satoh to replace the material of Huang’s device because such material replacement is art recognized suitability for an intended purpose. See MPEP 2144.07.
Re claim 2 Huang and Satoh disclose the power module of claim 1, further comprising: an enclosure made of a molding compound(234); and an insulating encapsulant(232) between the semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029] and the enclosure.
Re claim 3 Huang and Satoh disclose the power module of claim 1, wherein at least one of the first substrate(substrates of 200/300) or the second substrate(substrates of 200/300) comprises an insulated metal substrate(substrates of 200/300) (IMS[0017]).
Re claim 4 Huang and Satoh disclose the power module of claim 3, wherein: the IMS[0017] comprises a layer of ceramic or polymer[0017] between two layers of copper; and the layer of ceramic or polymer[0017] is less than or equal to 1 mm in thickness.
Re claim 5 Huang and Satoh disclose the power module of claim 1, wherein the pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029] comprises a plurality of sintered- silver semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s, the pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s being positioned between the first substrate(substrates of 200/300) and the second substrate(substrates of 200/300).
Re claim 6 Huang and Satoh disclose the power module of claim 5, wherein the plurality of sintered-silver semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s comprise a 2x2 array of pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s.
Re claim 7 Huang and Satoh disclose the power module of claim 5, wherein the plurality of sintered-silver semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s comprise a 4x4 array of pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s.
Re claim 8 Huang and Satoh disclose the power module of claim 5, wherein: each of the plurality of sintered-silver semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s comprises a diode; and the diodes are arranged in a parallel configuration in the power module.
Re claim 9 Huang and Satoh disclose the power module of claim 5, wherein: each of the plurality of sintered-silver semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s comprises a diode; and the diodes are arranged in a full bridge rectifier configuration in the power module.
Re claim 10 Huang and Satoh disclose the power module according to claim 5, wherein at least one of the plurality of sintered-silver semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s comprises a semiconductor device die(300) positioned in a stack between two metal spacer(222/224/226/228)[0029](since 224/226/228 can separate this may be interpreted as a spacer)s, with sintered-silver interconnection(interconnection of 302/304/306/308)[0026]s between the semiconductor device die(300) and the two metal spacer(222/224/226/228)[0029](since 224/226/228 can separate this may be interpreted as a spacer)s.
Re claim 11 Huang and Satoh disclose the power module according to claim 5, wherein at least one of the plurality of sintered-silver semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s comprises a semiconductor device die(300) positioned in a stack next to a metal spacer(222/224/226/228)[0029](since 224/226/228 can separate this may be interpreted as a spacer), with a sintered-silver interconnection(interconnection of 302/304/306/308)[0026] between the semiconductor device die(300) and the metal spacer(222/224/226/228)[0029](since 224/226/228 can separate this may be interpreted as a spacer).
Re claim 12 Huang and Satoh disclose the power module of claim 1, wherein: the first substrate(substrates of 200/300) comprises an intermediate layer, a first metal layer on one side of the intermediate layer, and a second metal layer on another side of the intermediate layer; and the intermediate layer comprises an insulating layer of ceramic or polymer[0017] less than or equal to 1 mm in thickness.
Re claim 13 Huang and Satoh disclose the power module of claim 12, further comprising: a composite coating[0028], the composite coating[0028] being coated along at least a length of a peripheral edge of the first metal layer at an interface between the peripheral edge and the intermediate layer.
Re claim 14 Huang and Satoh disclose the power module of claim 1, wherein: the first substrate(substrates of 200/300) comprises a first intermediate layer, a first inner metal layer on one side of the first intermediate layer, a second inner metal layer on the one side of the first intermediate layer, and an outer metal layer on another side of the first intermediate layer; and the second substrate(substrates of 200/300) comprises a second intermediate layer, a first inner metal layer on one side of the second intermediate layer, a second inner metal layer on the one side of thesecond intermediate layer, and an outer metal layer on another side of the second intermediate layer.
Re claim 15 Huang and Satoh disclose the power module of claim 14, wherein: the first inner metal layer and the second inner metal layer of the first substrate(substrates of 200/300) extend side-by-side in a first longitudinal direction; and the first inner metal layer and the second inner metal layer of the second substrate(substrates of 200/300) extend side-by-side in a second longitudinal direction perpendicular to the first longitudinal direction.
Re claim 16 Huang and Satoh disclose the power module of claim 14, further comprising a composite coating[0028], wherein: the composite coating[0028] is coated along at least a length of peripheral edges of the first inner metal layer and the second inner metal layer of the first substrate(substrates of 200/300); and the composite coating[0028] is coated along at least a length of peripheral edges of the first inner metal layer and the second inner metal layer of the second substrate(substrates of 200/300).
Re claim 17 Huang discloses in Fig 1 a packaged semiconductor power module, comprising: a first substrate(substrates of 200/300); a second substrate(substrates of 200/300); a plurality of semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s positioned between the first substrate(substrates of 200/300) and the second substrate(substrates of 200/300); a first terminal(202a/202b/204a/204b/206a/206b) on a first side of the power module and electrically coupled to the first substrate(substrates of 200/300); anda second terminal(202a/202b/204a/204b/206a/206b) on a second side of the power module and electrically coupled to the second substrate(substrates of 200/300), wherein at least one of the plurality of semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s comprises a semiconductor device die(300) positioned in a stack next to a metal spacer(222/224/226/228)[0029](since 224/226/228 can separate this may be interpreted as a spacer), with a sintered-silver interconnection(interconnection of 302/304/306/308)[0026] between the semiconductor device die(300) and the metal spacer(222/224/226/228)[0029](since 224/226/228 can separate this may be interpreted as a spacer).
Huang does not disclose a sintered-silver semiconductor die pillar, with a sintered-silver interconnection
Satoh disclose in Fig 10 a sintered-silver semiconductor die pillar[0052], with a sintered-silver interconnection[0070]
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Satoh to the teachings of Huang in order to withstand higher temperatures [0002, Satoh].
It would have been obvious to one of ordinary skill in the art at the time of the inventions to use the material of Satoh to replace the material of Huang’s device because such material replacement is art recognized suitability for an intended purpose. See MPEP 2144.07.
Re claim 18 Huang and Satoh disclose the power module of claim 17, wherein: the first substrate(substrates of 200/300) comprises an intermediate layer, a first metal layer on one side of the intermediate layer, and a second metal layer on another side of the intermediate layer; and the intermediate layer comprises an insulating layer of ceramic or polymer[0017] less than or equal to 1 mm in thickness.
Re claim 19 Huang and Satoh disclose the power module of claim 18, further comprising: a composite coating[0028], the composite coating[0028] being coated along at least a length of a peripheral edge of the first metal layer at an interface between the peripheral edge and the intermediate layer.
Re claim 20 Huang and Satoh disclose the power module of claim 17, wherein the plurality of sintered-silver semiconductor die pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s comprise a 2x2 array of pillar(222a/224a/226a/228a/222/224/226/228/300/interconnection)[0029]s.
Conclusion
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/PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812