DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2, 7-8, and 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Minari (WO2018212175, cited in IDS, citations to U.S. PGPub 2020/0219908 for convenience).
Regarding claim 1, Minari teaches a solid state imaging element comprising: a photoelectric conversion layer containing a compound semiconductor material, two semiconductor layers laminated and disposed on an opposite side of a light incident surface of the photoelectric conversion layer, the two semiconductor layers containing impurities of different conductivity types from each other; and a diffusion layer disposed in sidewalls of the photoelectric conversion layer and the two semiconductor layers, wherein the two semiconductor layers have a width in a plane direction excluding the diffusion layer in the sidewalls, wherein the width of the two semiconductor layers is narrower than a width of the photoelectric conversion layer in a plane direction excluding the diffusion layer in the sidewalls (conversion layer 14, two semiconductor layers 12/13, diffusion layer D, [0172]-[0180], [0108], [0181]-[0183], Fig. 25).
Minari does not explicitly teach wherein the diffusion layer contains impurities of an impurity concentration higher than an impurity concentration of the two semiconductor layers.
Minari teaches wherein the impurity concentration of the diffusion layer is controlled within a range of 1×1017 cm−3 to 5×1019 cm−3 to reduce dark currents and wherein within the range the concentration is controlled to be high enough suppress dark current and low enough not to cause crystal defects ([0114]). Therefore, the impurity concentration of the diffusion layer is a result-effective variable. Mere optimization of a result effective variable is prima facie obvious. See MPEP 2144.05IIB.
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to modify the teachings of Minari such that the diffusion layer contains impurities of an impurity concentration higher than an impurity concentration of the two semiconductor layers.
Regarding claim 2, Minari teaches wherein the two semiconductor layers include: a first semiconductor layer containing impurities of a first conductivity type, a second semiconductor layer disposed between the first semiconductor layer and the photoelectric conversion layer and containing impurities of a second conductivity type, and the diffusion layer is disposed in the sidewalls of the first semiconductor layer and the second semiconductor layer, and contains impurities of the second conductivity type having an impurity concentration higher than an impurity concentration of the second semiconductor layer ([0110], first semiconductor layer 12, n-type, second semiconductor layer 13, p-type; [0114], see rejection of claim 1).
Regarding claim 7, Minari teaches wherein the two semiconductor layers including the diffusion layer in the sidewalls have a width in the plane direction gradually narrowed from the photoelectric conversion layer including the diffusion layer in the sidewall (Fig. 25).
Regarding claim 8, Minari teaches wherein the diffusion layer in the sidewalls of the two semiconductor layers has a thickness substantially a same as a thickness of the diffusion layer in the sidewall of the photoelectric conversion layer (Fig. 25).
Regarding claim 11, Minari teaches an electrode that is disposed so as to sandwich the two semiconductor layers between the electrode and the photoelectric conversion layer and reads out charges photoelectrically converted by the photoelectric conversion layer, wherein the diffusion layer in the sidewalls of the two semiconductor layers is disposed so as to be close to the electrode while being spaced apart from the electrode (Fig. 25, 11, [0106]-[0107]).
Regarding claim 12, Minari teaches an electrode that is disposed so as to sandwich the two semiconductor layers between the electrode and the photoelectric conversion layer and reads out charges photoelectrically converted by the photoelectric conversion layer (11, [0106]-[0107]) and a fourth semiconductor layer that is disposed between the two semiconductor layers and the electrode and has a conductivity type different from a conductivity type of the photoelectric conversion layer, wherein the diffusion layer of the sidewalls of the two semiconductor layers is disposed so as to be close to the fourth semiconductor layer while being spaced apart from the fourth semiconductor layer (Fig. 47, 33, [0236]-[0238]). It would have been obvious to a person having ordinary skill to modify the teachings of Minari to include the contact layer for the purpose of making it easier to read out signal charges ([0238]).
Regarding claim 13, Minari teaches wherein the two semiconductor layers have band gap energy larger than band gap energy of the photoelectric conversion layer (Minari, [0130]).
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Minari (WO2018212175, cited in IDS, citations to U.S. PGPub 2020/0219908 for convenience) in view of Suzuki (U.S. PGPub 2020/0292391).
Regarding claim 16, Minari teaches a manufacturing method of a solid-state imaging element, the manufacturing method comprising: forming a laminate of a photoelectric conversion layer containing a compound semiconductor material and two semiconductor layers that are laminated, the two semiconductor layers containing impurities of conductivity types different from each other, forming a first groove that exposes sidewalls of the two semiconductor layers and a sidewall of the photoelectric conversion layer; (Fig. 23A, 14, 12, 13, G1, [0174]-[0176], [0018]; Fig. 24, [0182]), and forming a diffusion layer in the sidewalls of the photoelectric conversion layer and the two semiconductor layers, the diffusion layer containing impurities of an impurity concentration higher than an impurity concentration of the two semiconductor layers (Figs. 23B, 24; [0179], [0183]) but does not explicitly teach removing a part of the two semiconductor layers from a side of the sidewalls.
Suzuki teaches forming a laminate including a photoelectric conversion layer, forming a first groove that exposes sidewalls of the laminate, and removing a part of the sidewalls of the laminate (Fig. 2B, [0056]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Suzuki with Minari such that the method comprises removing a part of the two semiconductor layers from a side of the sidewalls for the purpose of removing damage formed during mesa etching (Suzuki, [0056]).
Claims 3-4, 6, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Minari (WO2018212175, cited in IDS, citations to U.S. PGPub 2020/0219908 for convenience) in view of Ogawa (U.S. PGPub 2011/0193133).
Regarding claim 3, Minari does not explicitly teach wherein the diffusion layer in the sidewalls of the two semiconductor layers is thicker than the diffusion layer in the sidewall of the photoelectric conversion layer.
Ogawa teaches two semiconductor layers comprising a p-n junction formed on a photoelectric conversion layer, a diffusion layer disposed in sidewalls of the photoelectric conversion layer and the two semiconductor layers, wherein the diffusion layer in the sidewalls of the two semiconductor layers is thicker than the diffusion layer in the sidewall of the photoelectric conversion layer (Fig. 1(B), 3, 4, 41, 6, [0074]-[0076]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Ogawa with Minari such that the diffusion layer in the sidewalls of the two semiconductor layers is thicker than the diffusion layer in the sidewall of the photoelectric conversion layer for the purpose of setting back the p-n junction to reduce influence of leakage currents (Ogawa, [0059], [0081], [0100]).
Regarding claim 4, the combination of Minari and Ogawa teaches wherein the width in the plane direction of the two semiconductor layers including the diffusion layer in the sidewalls is continuously narrowed from the side of the light incident surface of the photoelectric conversion layer including the diffusion layer in the sidewall toward the two semiconductor layers (Minari, Fig. 25).
Regarding claim 6, the combination of Minari and Ogawa teaches wherein the two semiconductor layers include: a first semiconductor layer containing impurities of a first conductivity type and a second semiconductor layer disposed between the first semiconductor layer and the photoelectric conversion layer and containing impurities of a second conductivity type (Minari, [0108]), the solid-state imaging element further comprises a first insulating film disposed on the first semiconductor layer and disposed inside the first semiconductor layer in plan view from an opposite side of the light incident surface (Minari, Fig. 25, [0119]), and the diffusion layer in the sidewall of the first semiconductor layer is thicker than the diffusion layer in the sidewall of the second semiconductor layer (Ogawa, Fig. 1(B)).
Regarding claim 9, Minari does not explicitly teach wherein the diffusion layer in the sidewalls of the two semiconductor layers is thicker than the diffusion layer in the sidewall of the photoelectric conversion layer.
Ogawa teaches two semiconductor layers comprising a p-n junction formed on a photoelectric conversion layer, a diffusion layer disposed in sidewalls of the photoelectric conversion layer and the two semiconductor layers, wherein the diffusion layer in the sidewalls of the two semiconductor layers is thicker than the diffusion layer in the sidewall of the photoelectric conversion layer (Fig. 1(B), 3, 4, 41, 6, [0074]-[0076]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Ogawa with Minari such that the diffusion layer in the sidewalls of the two semiconductor layers is thicker than the diffusion layer in the sidewall of the photoelectric conversion layer for the purpose of setting back the p-n junction to reduce influence of leakage currents (Ogawa, [0059], [0081], [0100]).
Allowable Subject Matter
Claims 5, 10, 14-15, and 17-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding dependent claim 5, the prior art, alone or in combination, does not teach or suggest a third semiconductor layer disposed on the side of the light incident surface of the photoelectric conversion layer and having a same conductivity type as the photoelectric conversion layer, wherein the diffusion layer disposed in a sidewall of the third semiconductor layer is thicker than the diffusion layer in the sidewall of the photoelectric conversion layer and thinner than the diffusion layer in the sidewalls of the two semiconductor layers.
Regarding dependent claim 10, the prior art, alone or in combination, does not teach or suggest a first insulating film disposed so as to cover the diffusion layer in the sidewalls of the two semiconductor layers; and a second insulating film disposed so as to cover the diffusion layer in the sidewall of the photoelectric conversion layer and being different from the first insulating film.
Regarding independent claims 14 and 17, the prior art teaches multiple methods for forming the semiconductor laminate, forming a groove, and forming a diffusion layer (See 20090020841, 20180374881, 20230327041, 10297708) but does not, alone or in combination, teach or suggest the methods as claimed.
Conclusion
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/ALIA SABUR/ Primary Examiner, Art Unit 2812