DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4, 8-14, 16-18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Huang (US Pub. No. 2018/0151759) in view of Finkelstein (US Pub. No. 2020/0135776).
Regarding claim 1, in FIG. 8, Huang discloses a solid-state imaging device comprising a first substrate including a first semiconductor substrate (102/108, paragraph [0029]) having a first surface (102f) and a second surface (102b) that is opposite to the first surface and on which light (115) is incident, a plurality of pixels (associated with 104a/104b, paragraph [0029]) that is provided in the first semiconductor substrate and performs photoelectric conversion, and a first uneven structure (124/830, paragraph [0021]) that is provided on the first surface side of the first semiconductor substrate and includes a material different from a material of the first semiconductor substrate (paragraph [0021]).
Huang appears not to explicitly disclose a second substrate including a pixel transistor that is bonded to the first substrate on the first surface side and outputs a pixel signal based on electric charge output from the plurality of pixels.
However, in paragraph [0080], Finkelstein discloses a similar solid-state imaging device having a second substrate (readout wafer 402) including a pixel transistor (MOSFET) that is bonded to a first substrate (Sensor Wafer 401) on a first surface side and outputs a pixel signal based on electric charge output from the plurality of pixels; and provides controller/timing functions to the pixels of the first substrate.
To provide controller/timing functions to the pixels of the first substrate it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to provide a second substrate including a pixel transistor that is bonded to the first substrate on the first surface side and outputs a pixel signal based on electric charge output from the plurality of pixels.
Regarding claim 2, in FIG. 8, Huang discloses a second uneven structure (816/817, paragraph [0031]) provided on the second surface side of the first semiconductor substrate and including a material different from a material of the first semiconductor substrate.
Regarding claim 4, in FIG. 8, Huang discloses an element isolation structure (828, paragraphs [0033] and [0039]) provided between the pixels adjacent to each other in the first semiconductor substrate.
Regarding claim 8, the combination of Huang and Finkelstein discloses that (see Huang FIG. 8) at least a part of the pixel transistor is provided below (vertically) the element isolation structure.
Regarding claim 9, the combination of Huang and Finkelstein discloses that (see Huang FIG. 8) at least a part of the pixel transistor overlaps the element isolation structure in plan view as viewed from an incident direction of the light (incident direction can be any direction that can enter the upper surface of the substrate).
Regarding claim 10, the combination of Huang and Finkelstein discloses (see Finkelstein FIG. 4) a first wiring layer (e.g. 108) of the second substrate includes a plurality of first wirings extending in a first direction (e.g. into the page) and arranged in a second direction (horizontal) orthogonal to the first direction in plan view as viewed from an incident direction of the light.
Regarding claim 11, in FIG. 8, Huang discloses that the first or second uneven structure has a substantially triangular, substantially trapezoidal, or substantially rectangular shape in a cross section perpendicular to the first surface.
Regarding claim 12, in FIG. 8, Huang discloses that the first or second uneven structure has a shape of a substantially quadrangular pyramid, a substantially truncated cone, a substantially truncated pyramid, a substantial cylinder, or a substantial prism (paragraph [0021]).
Regarding claim 13, in FIG. 8, Huang discloses that a plurality of the first or second uneven structures is arranged in a matrix in a first direction and a second direction orthogonal to the first direction in plan view as viewed from an incident direction of the light (paragraph [0021]).
Regarding claim 14, in FIGs. 5 and 8, Huang discloses that a plurality of the first or second uneven structures extends in a first direction, is arranged in a second direction orthogonal to the first direction, and is formed in a stripe shape in plan view as viewed from an incident direction of the light.
Regarding claim 16, the combination of Huang and Finkelstein discloses (see Huang FIG. 8) a reflection member (e.g. 122, paragraph [0036]) provided between the first uneven structure and the second substrate.
Regarding claim 17, the combination of Huang and Finkelstein discloses (see Huang FIG. 8) an electrode plug (plug/via included in 112) provided between the first substrate and the second substrate.
Regarding claim 18, the combination of Huang and Finkelstein discloses a wiring of the first substrate and a wiring of the second substrate are bonded by bonding the first substrate and the second substrate.
Regarding claim 20, in FIG. 8, Huang discloses an electronic device comprising a solid-state imaging device including a first substrate including a first semiconductor substrate (102, paragraph [0029]) having a first surface (102f) and a second surface (102b) that is opposite to the first surface and on which light (115) is incident, a plurality of pixels (associated with 104a/104b, paragraph [0029]) that is provided in the first semiconductor substrate and performs photoelectric conversion, and a first uneven structure (124/830, paragraph [0021]) that is provided on the first surface side of the first semiconductor substrate and includes a material different from a material of the first semiconductor substrate (paragraph [0021]).
Huang appears not to explicitly disclose a second substrate including a pixel transistor that is bonded to the first substrate on the first surface side and outputs a pixel signal based on electric charge output from the plurality of pixels.
However, in paragraph [0080], Finkelstein discloses a similar solid-state imaging device having a second substrate (readout wafer 402) including a pixel transistor (MOSFET) that is bonded to a first substrate (Sensor Wafer 401) on a first surface side and outputs a pixel signal based on electric charge output from the plurality of pixels; and provides controller/timing functions to the pixels of the first substrate.
To provide controller/timing functions to the pixels of the first substrate it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to provide a second substrate including a pixel transistor that is bonded to the first substrate on the first surface side and outputs a pixel signal based on electric charge output from the plurality of pixels.
Claims 3 and 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Huang (US Pub. No. 2018/0151759) in view of Finkelstein (US Pub. No. 2020/0135776) as applied to claim 1, and further in view of Matsunuma (US Pub. No. 2011/0049336).
Regarding claim 3, the combination of Huang and Finkelstein discloses (see Huang FIG. 8) that the pixel includes a photoelectric conversion element (104a/104b), a transfer transistor (802, paragraph [0029]) electrically connected to the photoelectric conversion element, and a floating diffusion (well known component of a solid-state imaging device, paragraph [0050]) that temporarily holds electric charge output from the photoelectric conversion element via the transfer transistor.
The combination of Huang and Finkelstein appears not to explicitly disclose that the pixel transistor includes an amplification transistor that generates, as the pixel signal, a voltage signal according to electric charge held in the floating diffusion, and a selection transistor that controls an output timing of the pixel signal from the amplification transistor.
The art however well recognized a pixel transistor that includes an amplification transistor that generates, as the pixel signal, a voltage signal according to electric charge held in the floating diffusion, and a selection transistor that controls an output timing of the pixel signal from the amplification transistor to be suitable for use as a circuit arrangement in a solid-state imaging device. See, for example, Matsunuma, paragraph [0006].
According to well-established patent law precedents (see, for example, M.P.E.P. § 2144.07), therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form the pixel transistor to include an amplification transistor that generates, as the pixel signal, a voltage signal according to electric charge held in the floating diffusion, and a selection transistor that controls an output timing of the pixel signal from the amplification transistor for its recognized suitability as a circuit arrangement in a solid-state imaging device.
Regarding claim 5, the combination of Huang, Finkelstein, and Matsunuma discloses (see Huang FIG. 8) that the transfer transistor is arranged at substantially the same position in each of the plurality of pixels in plan view as viewed from an incident direction of the light.
Regarding claim 6, the combination of Huang, Finkelstein, and Matsunuma discloses (see Huang FIG. 8) that the transfer transistor includes an embedded gate electrode embedded in the first semiconductor substrate.
Regarding claim 7, the combination of Huang, Finkelstein, and Matsunuma discloses (see Huang FIG. 8) that a first insulating film (gate sidewall insulating film) provided on a part of a side surface of the embedded gate electrode is thinner in film thickness (measured horizontally) than a second insulating film (dielectric structure 108) provided on another part of the side surface of the gate electrode.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Huang (US Pub. No. 2018/0151759) in view of Finkelstein (US Pub. No. 2020/0135776) as applied to claim 1, and further in view of Shim (US Pub. No. 2020/0219910).
Regarding claim 15, the combination of Huang and Finkelstein appears not to explicitly disclose that the first or second uneven structure has a cross shape extending in a first direction and a second direction orthogonal to the first direction in plan view as viewed from an incident direction of the light.
The art however well recognized a second uneven structure having a cross shape extending in a first direction and a second direction orthogonal to a first direction in plan view as viewed from an incident direction of the light to be suitable for use as an uneven structure in a solid-state imaging device. See, for example, Shim, FIGs. 17-18, element 670, paragraph [0138].
According to well-established patent law precedents (see, for example, M.P.E.P. § 2144.07), therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form the second uneven structure to have a cross shape extending in a first direction and a second direction orthogonal to the first direction in plan view as viewed from an incident direction of the light for its recognized suitability as an uneven structure in a solid-state imaging device.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Huang (US Pub. No. 2018/0151759) in view of Finkelstein (US Pub. No. 2020/0135776) as applied to claim 1, and further in view of Wan (US Pub. No. 2014/0042298).
Regarding claim 19, the combination of Huang and Finkelstein appears not to explicitly disclose a third substrate bonded to the second substrate and including a logic circuit that processes the pixel signal.
The art however well recognized a third substrate bonded to a second substrate and including a logic circuit that processes a pixel signal to be suitable for use as a substrate arrangement in a solid-state imaging device. See, for example, Wan, third substrate 202, logic circuit 204, paragraph [0027].
According to well-established patent law precedents (see, for example, M.P.E.P. § 2144.07), therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form a third substrate bonded to the second substrate and including a logic circuit that processes the pixel signal for its recognized suitability as a substrate arrangement in a solid-state imaging device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUCKER J WRIGHT whose telephone number is (571)270-3234. The examiner can normally be reached 8:30am-5:00pm.
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/TUCKER J WRIGHT/ Primary Examiner, Art Unit 2891