Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18550726 filed on 09/15/2023.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Allowable Subject Matter
Claims 9-20 are allowed.
The following is an examiner' s statement of reasons for allowance:
Claims 9-12: The primary reason for the allowance of the claims is the inclusion of the limitation “injecting the cooling medium into a region surrounded by the adhesive”, in all of the claims in combination with the remaining features of independent claim 9.
Claims 13-16: The primary reason for the allowance of the claims is the inclusion of the limitation “injecting the cooling medium into a clearance formed by the substrate, the adhesive, and the semiconductor element”, in all of the claims in combination with the remaining features of independent claim 13.
Claims 17, 20: The primary reason for the allowance of the claims is the inclusion of the limitation “placing metal-coated small spheres on a plurality of recesses provided on a substrate”, in all of the claims in combination with the remaining features of independent claim 17.
Claim 18: The primary reason for the allowance of the claims is the inclusion of the limitation “placing metal-coated small spheres on a plurality of soldering pads disposed on a substrate”, in all of the claims in combination with the remaining features of independent claim 18.
Claim 19: The primary reason for the allowance of the claims is the inclusion of the limitation “placing metal-coated small spheres on a plurality of soldering pads disposed on a lower surface of a semiconductor element”, in all of the claims in combination with the remaining features of independent claim 19.
Hirokazu (JP 2010129827 A) teaches a method for manufacturing a semiconductor device, comprising: applying an adhesive (Fig. 1, element 30) in such a manner as to surround a region on a substrate (Fig. 1, element 20) where a cooling medium (Fig. 1, elements 321 & 322) is disposed; and adhering a semiconductor (Fig. 1, element 10) element onto the adhesive.
However, Hirokazu does not teach or render obvious the above-quoted features recited in independent claims 9, 13, 17, 18, 19.
Claims 2-4, 7 are objected to as being dependent upon a rejected base claim (independent claim 1), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner' s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Hirokazu (JP 2010129827 A).
With respect to dependent claim 2, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the cooling medium is a liquid metal”.
With respect to dependent claim 3, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the cooling medium is a metal-coated small sphere”.
With respect to dependent claim 4, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the cooling medium is a liquid metal and a metal-coated small sphere”.
With respect to dependent claim 7, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the clearance is formed by the substrate, the semiconductor element, and an adhesive applied to an entire peripheral edge of the semiconductor element to fix both the substrate and the semiconductor element, and a partition having a height lower than a thickness height of the adhesive protrudes from an upper surface of the substrate along an inner periphery of the adhesive”.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 6 recites the limitation “a low surface tension material”. The metes and bounds of the claimed limitation can not be determined for the following reasons: The specification does not define what constitutes “a low surface tension material” and therefore this limitation is unclear.
For the purpose of the examination, the elements 321 & 322 are interpreted as “a low surface tension material”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5-6, 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hirokazu (JP 2010129827 A).
Regarding independent claim 1, Hirokazu teaches a semiconductor device, comprising:
a semiconductor element (Fig. 1, element 10);
a substrate (Fig. 1, element 20) to which the semiconductor element is fixed; and
a cooling medium (Fig. 1, elements 321 & 322) with which a clearance (Fig. 1) formed when the semiconductor element and the substrate are fixed (Fig. 1, element 10 and 20 are fixed to each other by adhesive 30) to each other is filled.
Regarding claim 5, Hirokazu teaches wherein the cooling medium with which the clearance is filled is disposed below a heat generating source (Fig. 1, the semiconductor element 10 generates heat when it is ON) of the semiconductor element.
Regarding claim 6, Hirokazu teaches wherein the clearance is formed by the substrate, the semiconductor element, and an adhesive applied to an entire peripheral edge of the semiconductor element to fix both the substrate and the semiconductor element, and an upper surface of the substrate is covered with a low surface tension material along an inner periphery of the adhesive (Fig. 1).
Regarding independent claim 21, Hirokazu teaches an electronic apparatus having a semiconductor device, comprising:
a semiconductor element (Fig. 1, element 10);
a substrate (Fig. 1, element 20) to which the semiconductor element is fixed fixed (Fig. 1, element 10 and 20 are fixed to each other by adhesive 30); and
a cooling medium (Fig. 1, elements 321 & 322) with which a clearance (Fig. 1) formed when the semiconductor element and the substrate are fixed to each other is filled.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Hirokazu (JP 2010129827 A) in view of Kazuo et al. (JP H06177299 A).
Regarding claim 8, Hirokazu teaches all of the limitations as discussed above.
Hirokazu does not explicitly disclose further comprising a heat exhausting mechanism on a lower surface of the substrate.
Kazuo et al. teach a semiconductor device comprising a heat exhausting mechanism on a lower surface of the substrate (Claim 12).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Hirokazu according to the teachings of Kazuo et al. with the motivation to “excluding heat on a surface opposite to a board mounting surface”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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/SHAHED AHMED/
Primary Examiner, Art Unit 2813