Prosecution Insights
Last updated: April 19, 2026
Application No. 18/550,994

SOLID-STATE IMAGING ELEMENT AND IMAGING DEVICE

Non-Final OA §102§112
Filed
Sep 18, 2023
Examiner
STEVENSON, ANDRE C
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
96%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
764 granted / 852 resolved
+21.7% vs TC avg
Moderate +7% lift
Without
With
+6.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
43 currently pending
Career history
895
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
57.8%
+17.8% vs TC avg
§102
26.8%
-13.2% vs TC avg
§112
8.7%
-31.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 852 resolved cases

Office Action

§102 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Information Disclosure Statement The information disclosure statement (IDS) submitted on 09/28/23 was filed in a timely manner; thus, the submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims #1-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: Claim #1 and 11 state, “the inter-pixel isolator is formed without intersecting the inter-pixel isolator”. The Examiner takes the position that the present wording in the claim fails to describe the design or structure of the claimed invention that would allow one of ordinary skill in the art, at the time of conception of the device, to reproduce said claim item, without undue experimentation. It is unclear what is meant by the inter-pixel isolator being formed without intersecting the inter-pixel isolator. For Examination purposes, the Examiner will take the position that the Applicant is trying to describe no end-to-end intersections of the inter-pixel isolator. Correction or clarity to this matter is requested. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) #1-11 are rejected under 35 U.S.C. 102(a)(2) as being unpatentable by Okazaki et al., (U.S. Pub. No, 2015/0091122), hereinafter referred to as " Okazaki ". Okazaki shows, with respect to claim #1, a solid-state imaging element comprising a pixel array unit (fig. #3A, item 30) (paragraph 0059) in which a plurality of pixels (fig. #3A, item 33) each having a photoelectric converter is arranged in each of a row direction and a column direction (paragraph 0050, 0066), wherein the pixel array unit includes an inter-pixel isolator (fig. #3B, item 32) that isolates the plurality of pixels adjacent to each other (paragraph 0061), each of the plurality of pixels includes a filter (fig. #4, item 42) having a predetermined light transmission characteristic (paragraph 0058, 0066), the inter-pixel isolator is formed without intersecting the inter-pixel isolator (fig. #4, item 32) (paragraph 0067), and the filter having a same light transmission characteristic is disposed between the plurality of pixels adjacent to each other (paragraph 0058, 0066). Okazaki shows, with respect to claim #2, a solid-state imaging element wherein the filter (fig. #6, item 42) (paragraph 0065, 0088) includes a polarizing filter that transmits incident light with a specific polarization direction and causes the incident light to be incident on the photoelectric converter, and the polarizing filter having a same direction of a polarization transmission axis is disposed between the plurality of pixels adjacent to each other (paragraph 0066). Okazaki shows, with respect to claim #3, a solid-state imaging element wherein the filter includes a color filter that transmits incident light of a specific wavelength band and causes the incident light to be incident on the photoelectric converter, and the color filter having a same wavelength band to be transmitted is disposed between the plurality of pixels adjacent to each other (fig. #6, item 42) (paragraph 0065-0066, 0088). Okazaki shows, with respect to claim #4, a solid-state imaging element wherein the filter includes a polarizing filter (fig. #4, item 42) that transmits incident light with a specific polarization direction and causes the incident light to be incident on the photoelectric converter (paragraph 0050), and a color filter that transmits incident light of a specific wavelength band and causes the incident light to be incident on the photoelectric converter, and the polarizing filter having a same direction of a polarization transmission axis and the color filter having a same wavelength band to be transmitted are disposed between the plurality of pixels adjacent to each other (paragraph 0065-0066, 0088). Okazaki shows, with respect to claim #5, a solid-state imaging element wherein the inter-pixel isolator includes a trench isolation formed at a depth not penetrating a semiconductor substrate on which the photoelectric converter is formed (fig. #6, item 42) (paragraph 0051-0054). Okazaki shows, with respect to claim #6, a solid-state imaging element wherein the inter-pixel isolator includes a trench isolation formed from a back surface of the semiconductor substrate (fig. #10, item 32) (paragraph 0072). Okazaki shows, with respect to claim #7, a solid-state imaging element wherein the inter-pixel isolator (fig. #4, item 32) is formed in one direction of a row direction or a column direction at a cross portion of the pixels adjacent to each other in the row direction and the column direction (paragraph 0067). Okazaki shows, with respect to claim #8, a solid-state imaging element wherein the inter-pixel isolator (fig. #4, item 32) is not formed at a cross portion of the pixels adjacent to each other in the row direction and the column direction (paragraph 0067). Okazaki shows, with respect to claim #9, a solid-state imaging element further comprising a plurality of pixel blocks (fig. #3A, item 33) each including the plurality of pixels adjacent to each other in a row direction and a column direction, wherein the polarizing filter (fig. #4, item 42) is disposed on one side between the pixel blocks adjacent to each other in the row direction or the column direction (paragraph 0058-0059, 0065, 0088). Okazaki shows, with respect to claim #10, a solid-state imaging element further comprising a plurality of pixel blocks (fig. #3A, item 33) each including a plurality of the pixels adjacent to each other in a row direction and a column direction, wherein the polarizing filter (fig. #4, item 42) having the same direction of the polarization transmission axis is disposed between the pixel blocks adjacent to each other in the row direction or the column direction (paragraph 0058-0059, 0065-0066, 0088). Okazaki shows, with respect to claim #11, am imaging device comprising: a solid-state imaging element including a pixel array unit (fig. #3A, item 30) (paragraph 0059) in which a plurality of pixels (fig. #3A, item 33) each having a photoelectric converter is arranged in a row direction and a column direction (paragraph 0050, 0066); and an image processor (fig. #3A, item 30) that processes an image signal generated by the solid-state imaging element (paragraph 0058, 0065), wherein the pixel array unit includes an inter-pixel isolator (fig. #3B, item 32) that isolates the plurality of pixels adjacent to each other (paragraph 0061), each of the plurality of pixels includes a filter (fig. #4, item 42) having a predetermined light transmission characteristic (paragraph 0058, 0066), the inter-pixel isolator is formed without intersecting with the inter-pixel isolator (fig. #4, item 32) (paragraph 0067), and the filter having a same light transmission characteristic is disposed between the plurality of pixels adjacent to each other (paragraph 0058, 0066). . EXAMINATION NOTE The rejections above rely on the references for all the teachings expressed in the text of the references and/or one of ordinary skill in the art would have reasonably understood or implied from the texts of the references. To emphasize certain aspects of the prior art, only specific portions of the texts have been pointed out. Each reference as a whole should be reviewed in responding to the rejection, since other sections of the same reference and/or various combinations of the cited references may be relied on in future rejections in view of amendments. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andre’ Stevenson whose telephone number is (571) 272 1683 (Email Address, Andre.Stevenson@USPTO.GOV). The examiner can normally be reached on Monday through Friday from 7:30 am to 4:30 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached on 571-272 2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Andre’ Stevenson Sr./ Art Unit 2899 11/18/2025 /ZANDRA V SMITH/ Supervisory Patent Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Sep 18, 2023
Application Filed
Nov 20, 2025
Non-Final Rejection — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
96%
With Interview (+6.8%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 852 resolved cases by this examiner. Grant probability derived from career allow rate.

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