DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restrictions
Claim 14 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected group, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01/23/2026.
Claim Objections
Claims 1-13 is/are objected to because of the following informalities:
Claim 1 recites “performs photoelectric conversion” in Line L4, but should read –performs a photoelectric conversion--.
Claim 3 recites “performs photoelectric conversion” in Line L2, but should read –performs a photoelectric conversion--.
Claim 3 recites “in plan view” in Line L7, but should read – in a plan view --.
Claim 11 recites “from each of the first main surface of the first semiconductor substrate” in Lines L 5-6, but should read -- from the first main surface of the first semiconductor substrate--.
The balance of claims are objected to for being dependent upon an already objected claim.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 10 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 10 recites the limitation "the first main surface side " in Line L2. There is insufficient antecedent basis for this limitation in the claim.
Regarding claim 10, the limitation "the sensor pixel " in Line L3 renders the claim indefinite because the antecedent basis is unclear as to whether “the sensor pixel” (L3) refers to one of the “plurality of first channel layers” previously cited in Claim 1 Line L3, or a new sensor pixel. In the purpose of compact prosecution, “the sensor pixel” has been interpretated as one of the plurality of sensor pixels.
The balance of claims are rejected for being dependent upon an already rejected claim.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 6, 8-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Honda et al. (US20180302597A1-Honda97) in view of Yamauchi et al. (JP 2002124474 A with machine translation-Yamauchi74).
Regarding claim 1, Honda97 discloses an imaging device, comprising:
a first semiconductor substrate (First substrate 102-Examiner's annotated Fig 2);
a plurality of sensor pixels that is provided on the first semiconductor substrate (pixel array unit 11, so a plurality of pixel, formed on a semiconductor substrate- Fig 1, [0054] L 2-3, [0057] L1-6) and
performs photoelectric conversion (each pixel Pp/Pc includes a photoelectric conversion unit 123p/c so performing photoelectric conversion-[0058] L L1-5, Examiner's annotated Fig 2); and
a trench provided in a depth direction of the first semiconductor substrate from a first main surface of the first semiconductor substrate (trench with the interpixel isolation 125 with a portion 125A extending from the incident side of substrate 102 so in a depth direction of the first substrate-Examiner's annotated Fig 2, [0077] L1-7).
Honda97 does not disclose an imaging device
wherein the first semiconductor substrate is a (110) substrate in which the first main surface is a (110) plane, and
at least a part of a side surface of the trench is a (111) plane.
Yamauchi74 teaches an imaging device
wherein the first semiconductor substrate is a (110) substrate in which the first main surface is a (110) plane (annotated pages 5-6 [0025), and
at least a part of a side surface of the trench is a (111) plane (annotated pages 5-6 [0025]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the image device of Honda97, as taught by Yamauchi74 for the purpose of increasing the etching rate which depends of the orientation of the silicon substrate (Yamauchi74: [0025]).
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Regarding claim 2, Honda97 and Yamauchi74 combination teaches all the elements of claim 1, as noted above.
Honda97 further discloses an imaging device further comprising
an inter-pixel isolation portion that is provided in the first semiconductor substrate (interpixel isolation 125 provided in the first substrate 102-Fig 2) and
separates one sensor pixel and another sensor pixel adjacent to each other among the plurality of sensor pixels (interpixel isolation 125 separating Pixel Pp to adjacent pixel Pc of the plurality of pixel Pp/Pc of Pixel array 11-Examiner's annotated Fig 2, Fig 1),
wherein the inter-pixel isolation portion includes the trench (interpixel isolation 125 has a portion 125A in the trench-Examiner's annotated Fig 2).
Regarding claim 3, Honda97 discloses an imaging device, comprising:
a plurality of sensor pixels (pixel array unit 11, so a plurality of pixel, formed on a semiconductor substrate- Fig 1, [0054] L 2-3, [0057] L1-6) that performs photoelectric conversion (each pixel Pp/Pc includes a photoelectric conversion unit 123p/c so performing photoelectric conversion-[0058] L L1-5, Examiner's annotated Fig 2); and
an inter-pixel isolation portion that separates one sensor pixel and another sensor pixel adjacent to each other among the plurality of sensor pixels (interpixel isolation 125 separating Pixel Pp to adjacent pixel Pc of the plurality of pixel Pp/Pc of Pixel array 11-Examiner's annotated Fig 2, Fig 1),
wherein a shape of each of the plurality of sensor pixels in plan view is a rhombus (the shape of each of the plurality of pixels, color pixels and polarizing pixels arranged in pixel array 11, in plan view parallel to substrate 102, is a square so a rhombus. -Examiner's annotated Fig 2, Fig 3, [0031], [0057]) .
Honda97 does not disclose an imaging device
wherein the first semiconductor substrate is a (110) substrate in which a first main surface is a (110) plane.
Yamauchi74 teaches an imaging device
wherein the first semiconductor substrate is a (110) substrate in which the first main surface is a (110) plane (annotated pages 5-6 [0025]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the image device of Honda97, as taught by Yamauchi74 for the purpose of increasing the etching rate which depends of the orientation of the silicon substrate (Yamauchi74: [0025]).
Regarding claim 6, Honda97 and Yamauchi74 combination teaches all the elements of claim 3, as noted above.
Honda97 further discloses an imaging device further comprising
wherein the inter-pixel isolation portion includes a trench provided from the first main surface of the first semiconductor substrate in a depth direction of the first semiconductor substrate (interpixel isolation 125 separating Pixel Pp to adjacent pixel Pc of the plurality of pixel Pp/Pc of Pixel array 11-Examiner's annotated Fig 2, Fig 1).
Honda97 does not disclose an imaging device
at least a part of a side surface of the trench is a (111) plane.
Yamauchi74 teaches an imaging device
at least a part of a side surface of the trench is a (111) plane (annotated pages 5-6 [0025]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the image device of Honda97, as taught by Yamauchi74 for the purpose of increasing the etching rate which depends of the orientation of the silicon substrate (Yamauchi74: [0025])
Regarding claim 8, Honda97 and Yamauchi74 combination teaches all the elements of claim 1, as noted above.
Honda97 further discloses an imaging device further comprising
further comprising an epitaxial film embedded in the trench (epitaxial film 124 embedded in the trench on the vertical portion of the interpixel isolation 125A-Examiner's annotated Fig 2).
Regarding claim 9, Honda97 and Yamauchi74 combination teaches all the elements of claim 1, as noted above.
Honda97 further discloses an imaging device further comprising
a light shielding film embedded in the trench (light shielding film embedded in the trench 125A-Examiner's annotated Fig 2, [0077] L1-7).
Regarding claim 10, Honda97 and Yamauchi74 combination teaches all the elements of claim 1, as noted above.
Honda97 further discloses an imaging device further comprising
an uneven structure provided on the first main surface side of the first semiconductor substrate (uneven structure 124+126 provided on first main surface of substrate 102-Examiner's annotated Fig 2) and
arranged in the sensor pixel (Uneven structure 126+124 provided on the first main surface of substrate 102, arranged in the sensor pixel Pp/Pc-Examiner's annotated Fig 2).
Honda97 does not disclose an imaging device further
wherein at least a part of a surface of the uneven structure is a (111) plane.
Yamauchi74 teaches an imaging device
wherein at least a part of a surface of the uneven structure is a (111) plane (uneven structure following the trench, and one side of the trench is a (111) plane, so at least a part of a surface of the uneven structure is a (111) plane-annotated pages 5-6 [0025]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the image device of Honda97, as taught by Yamauchi74 for the purpose of increasing the etching rate which depends of the orientation of the silicon substrate (Yamauchi74: [0025]).
Regarding claim 11, Honda97 and Yamauchi74 combination teaches all the elements of claim 1, as noted above.
Honda97 further discloses an imaging device further comprising
an intra-pixel isolation portion provided on the first semiconductor substrate and separating an inside of the sensor pixel into one region and another region (Examiner's annotated Fig 2),
wherein the intra-pixel separation portion includes the trench (Examiner's annotated Fig 2), and
in a partial region in the sensor pixel, the trench is separated from each of the first main surface of the first semiconductor substrate and a second main surface located on an opposite side of the first main surface (inter-pixel-isolation portion provided in first substrate 102 as a portion of Light Shielding film 125 A, including the trench separated from the first semiconductor substrate 102 by a epitaxial film 124, and from the opposite side of the first main surface-Examiner's annotated Fig 2).
Claim(s) 4-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Honda et al. (US20180302597A1-Honda97) in view of Yamauchi et al. (JP 2002124474 A with machine translation-Yamauchi74), and further in view of Wang et al. (US20040056560A1-Wang60).
Regarding claim 4, Honda97 and Yamauchi74 combination teaches all the elements of claim 3, as noted above.
Honda97 and Yamauchi74 combination does not teach an imaging device
wherein an angle of a first internal angle of the rhombus is 109.50°, and an angle of a second internal angle of the rhombus is 70.5°.
Wang60 teaches an imaging device
wherein an angle of a first internal angle of the rhombus is 109.50°, and an angle of a second internal angle of the rhombus is 70.5°.
In addition, Honda97 teaches an imaging device with the plurality of pixel sensors of Rhombus shape to be arranged in a grid for the purpose of improving the detection accuracy of the polarization information and color information (Honda97: [0106]).
By definition, a Rhombus has any of two adjacent angles adding up to 180°, while the four sides are equal in length (https://www.britannica.com/science/rhombus), so there is a finite number of angles pairs for the potential internal angle and second internal angle for a Rhombus.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the
claimed invention to modify the imaging device of Honda97 in view of Yamauchi74, as taught by Wang60, absent unexpected results, to try a first internal angle of the rhombus is 109.50°, and an angle of a second internal angle of the rhombus is 70.5° (MPEP 2141 III (E) - "Obvious to try"), for the purpose of improving the detection accuracy of the polarization information and color information (Honda97: [0106]).
Regarding claim 5, Honda97 and Yamauchi74 combination teaches all the elements of claim 3, as noted above.
Honda97 and Yamauchi74 combination does not teach an imaging device
wherein a first side constituting an outer periphery of the rhombus and a second side constituting the outer periphery and intersecting the first side are each parallel to a longitudinal direction of a crystal orientation <111>.
Wang60 teaches an imaging device
wherein a first side constituting an outer periphery of the rhombus and a second side constituting the outer periphery and intersecting the first side are each parallel to a longitudinal direction of a crystal orientation <111> ([0013], Fig 6).
In addition, Yamauchi74 teaches an imaging device wherein the first semiconductor substrate is a (110) substrate in which the first main surface is a (110) plane (annotated pages 5-6 [0025]), and etching along the crystal orientation <111> for the purpose of increasing the etching rate which depends of the orientation of the silicon substrate (Yamauchi74: [0025]).
Considering that the etching rate which depends of the orientation of the silicon substrate (Yamauchi74: [0025]), there is a finite number of crystal orientation associated with the unit cell of silicon.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the
claimed invention to modify the imaging device of Honda97 in view of Yamauchi74, as taught by Wang60, absent unexpected results, to try a first side constituting an outer periphery of the rhombus and a second side constituting the outer periphery and intersecting the first side are each parallel to a longitudinal direction of a crystal orientation <111> (MPEP 2141 III (E) - "Obvious to try"), in the purpose of increasing the etching rate which depends of the orientation of the silicon substrate (Yamauchi74: [0025]).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Honda et al. (US20180302597A1-Honda97) in view of Yamauchi et al. (JP 2002124474 A with machine translation-Yamauchi74), and further in view of Hoshi et al (JP2020077650A published 05/21/2020 with US 20220223642 A1 for translation Hoshi42).
Regarding claim 7, Honda97 and Yamauchi74 combination teaches all the elements of claim 1, as noted above.
Honda97 and Yamauchi74 combination does not teach an imaging device
wherein a bottom surface of the trench is a (111) plane.
Hoshi42 teaches an imaging device
wherein a bottom surface of the trench is a (111) plane (Fig 1c).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the imaging device of Honda97 in view of Yamauchi74, as taught by Hoshi42 for the purpose of improving effects of reducing crosswalk (Hoshi42: Abstract L2-3).
Claim(s) 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Honda et al. (US20180302597A1-Honda97) in view of Yamauchi et al. (JP 2002124474 A with machine translation-Yamauchi74), and further in view of Shimotsusa et al. (US20130099291A1-Shimotsusa91).
Regarding claim 12, Honda97 and Yamauchi74 combination teaches all the elements of claim 1, as noted above.
Honda97 further discloses an imaging device further comprising
a second semiconductor substrate bonded to the first semiconductor substrate (a second semiconductor substrate 101 bonded to the first semiconductor substrate 102-Examiner's annotated Fig 2).
Honda97 does not disclose an imaging device
wherein the second semiconductor substrate is a (100) substrate in which a facing surface facing the first semiconductor substrate is a (100) plane.
Shimotsusa91 teaches an imaging device
wherein the second semiconductor substrate is a (100) substrate in which a facing surface facing the first semiconductor substrate is a (100) plane (Second semiconductor substrate 402 is a (100) substrate with facing/top/bottom surface facing first substrate 401, is a (100) plane-[0082]; Fig 4)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the imaging device of Honda97 in view of Yamauchi74, as taught by Shimotsusa91 for the purpose of improving effects of reducing interface defect (Shimotsusa91: [0082]).
Regarding claim 13, Honda97 and Yamauchi74 combination teaches all the elements of claim 12, as noted above.
Shimotsusa91 further teaches an imaging device
wherein the second semiconductor substrate includes a transistor provided on a side of the facing surface (the second semiconductor substrate 402 includes a transistor 412 provided on a side of the top surface facing the First semiconductor substrate so on the facing surface-Fig 4).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the imaging device of Honda97 in view of Yamauchi74, as taught by Shimotsusa91 for the purpose of improving effects of reducing interface defect (Shimotsusa91: [0082]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Yoshimoto et al. (US20220399391A1-Yoshimoto91) teaches an imaging device comprising a first semiconductor substrate (11-Fig 4A), a plurality of sensor pixels (Fig 1) performing photoelectric conversions ([0002]), a trench (13-Fig 4A), wherein the shape of the sensor pixels is on Rhombus (Fig 10A).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHALIE R FAYETTE whose telephone number is (571)272-1220. The examiner can normally be reached Monday-Friday 8:30 am-6pm ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at (571) 272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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NATHALIE R. FAYETTE
Examiner
Art Unit 2812
/NATHALIE R FAYETTE/Examiner, Art Unit 2812 02/24/2026
/CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812