Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claim 1-6 and 19 in the reply filed on December 22, 2025 is acknowledged. Claims 7-18 and 20 are withdrawn from further consideration.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on December 27, 2023 was filed before the mailing of a first Office action on the merits. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character 21 for a cable connection and reference character 27 for an optical connector have lead lines that point to the same structure in figure 1, thus, both reference characters been used to designate the same structure in figure 1, reference character 22 for a main board and reference character 26 for an IC package substrate have lead lines that point to the same structure in figure 1, thus, both reference characters been used to designate the same structure in figure 1, reference character 31 for an optical fiber, reference character 35 for a flex circuit, and reference character 37 for an electrical cable have lead lines that point to the same structure in figure 1, thus, the three reference characters have been used to designate the same structure in figure 1. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character 20 has been used to designate structurally different interconnection systems in figures 2-3, 4-5, 6-7, reference character 38 has been used to designate structurally different sockets in figures 2, 9-10, 11-12 reference character 44 has been used to designate structurally different frames in figure2-3, 4-56-8, 9-10,11-12. The examiner also notes that figure 10 has two lead lines for reference character 22 for the main board and two lead line for the reference character 24 for the mating substrate. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The use of the terms FUZZ BUTTON®, PARIPOSER®, and KAPTON® which are a trade names or marks used in commerce, has been noted in this application. The term should be accompanied by the generic terminology; furthermore the term should be capitalized wherever it appears or, where appropriate, include a proper symbol indicating use in commerce such as ™, SM , or ® following the term. The examiner also notes that CIN::ASPE does not appear to be a federally registered trademark.
Although the use of trade names and marks used in commerce (i.e., trademarks, service marks, certification marks, and collective marks) are permissible in patent applications, the proprietary nature of the marks should be respected and every effort made to prevent their use in any manner which might adversely affect their validity as commercial marks.
The disclosure is objected to because of the following informalities: the specification in paragraph 23 lines 28-31 does not describe the subject matter shown in figure 1. The examiner notes that this sentence appears to describe the subject matter shown in figure 2. The examiner also notes that in this sentence reference character 22 is understood to refer to the main board, reference character 26 is understood to refer to the IC package substrate, and reference character 28 is understood to refer to the IC package.
Appropriate correction is required.
The disclosure is objected to because of the following informalities: the specification uses reference character 29 refers to the cable connector in paragraph 24 line 10. The examiner notes reference character 21 is understood to refer to the cable connector.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-6 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “a plurality of lands are electrical lands,” on page 2 line 5, this limitation renders claim 1 indefinite because it unclear whether this limitation introduces a new plurality of lands or refers to a plurality of the lands on the first surface of the interposer. For examination purposes, this limitation will be interpreted as reciting a plurality of the lands are electrical lands.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 are rejected under 35 U.S.C. 103 as being unpatentable over Dozier II et al. (US 5,772,451) in view of D’Amato et al. (US 2003/0020179).
Regarding Claim 1:
Dozier II discloses a main board assembly comprising:
an interposer (support substrate, See fig. 3, ref. no. 310, and col. 22 line 38-54) having an array of lands arranged (portions of electrically conductive plating of plated through holes that are on the top surface of the support substrate, See fig. 3, ref. nos. 310, 310a, 312, and col. 22 lines 38-54) in a grid (the portions of the electrically conductive plating of plated through holes are in a land grid array socket for making pressure contacts to the pads on a land grid array package, See fig. 3, ref. no. 300, 304, and col. 22 lines 20-38) on a first surface of the interposer (top surface of the support substrate, See fig. 3, ref. no. 310a), wherein a plurality of lands are electrical lands that serve an electrical function (the portions of electrically conductive plating of plated through holes are in an electrical path that electrically connects the land grid array package to the printed circuit board, See fig. 3 ref. nos. 302, 304, 312, 314, 320, and col. 22 lines 20-38), and
an electrical interconnect member (plurality of free-standing resilient contact structures bonded to the portions of electrically conductive plating of plated through holes that are on the top surface of the supports substrate, See fig. 3, ref. nos. 312, 320, col. 22 lines 61-67 and col. 23 lines 1-19) that makes electrical contact with at least some of the electrical lands;
a frame (frame, See fig. 3, ref. no. 330 and col. 23 lines 47-53) that receives the electrical interconnect member.
Dozier II does not disclose at least two of the lands are mechanical lands that serve only a mechanical alignment function, each of the at least two mechanical lands having an attached interposer alignment feature; the frame having at least two alignment guides, each guide having a respective one of the interposer alignment features positioned in the guide.
D’Amato discloses at least two of the lands are mechanical lands (alignment pads, See fig. 5, ref. nos. 500, 502, fig. 7, ref. no. 500, figs. 11a, 11b, ref. no. 502 and paragraph 37-38) that serve only a mechanical alignment function, each of the at least two mechanical lands having an attached interposer alignment feature (alignment ball, See fig. 7, ref. no. 700, figs. 11a-12, ref. no. 1100, paragraphs 39 and 48); the frame having at least two alignment guides (corresponding holes in the socket, See fig. 12 and paragraph 39), each guide having a respective one of the interposer alignment features positioned in the guide (at least part of each alignment ball protrudes through a corresponding hole in the socket, See fig. 12, ref. no. 1100 and paragraph 39).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the main board assembly of Dozier II to include at least two of the lands are mechanical lands that serve only a mechanical alignment function, each of the at least two mechanical lands having an attached interposer alignment feature; the frame having at least two alignment guides, each guide having a respective one of the interposer alignment features positioned in the guide as taught by D’Amato in order to precisely align the support substrate in the frame. (See D’Amato paragraph 10).
Regarding Claim 2:
Dozier II discloses wherein the frame surrounds the interposer and the electrical interconnect member (the frame surrounds the support substrate and the plurality of free-standing resilient contact structures, See fig. 3, ref. nos. 310, 312, 330).
Regarding Claim 3:
D’Amato disclose wherein the at least two alignment guides are arranged to receive at least two mating substrate alignment features that are attached to at least two lands on a mating interface of a mating substrate (the holes in the socket are not completely filled by the alignment ball, thus, the holes in the socket can receive another alignment ball in the unfilled portion of the holes, See fig. 12, ref. nos. 300, 1100 and paragraph 39).
Regarding Claim 4:
The above stated combination of Dozier II and D’Amato discloses the above stated main board assembly. Dozier II further discloses a mating substrate (bottom surface of the LGA package, See fig. 3, ref. nos. 304, 304a, and col. 22 lines 30-38).
The above stated combination of Dozier II and D’Amato does not disclose wherein the frame further comprises at least two mating substrate alignment guides arranged to receive at least two mating substrate alignment features that are attached to at least two lands on a mating interface of a mating substrate.
D’Amato discloses wherein the frame further comprises at least two mating substrate alignment guides (corresponding holes in the socket, See fig. 12 and paragraph 39) arranged to receive at least two mating substrate alignment features that are attached to at least two lands on a mating interface of a mating substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the main board assembly of Dozier II and D’Amato to include wherein the frame further comprises at least two mating substrate alignment guides arranged to receive at least two mating substrate alignment features that are attached to at least two lands on a mating interface of a mating substrate as taught by D’Amato in order to precisely align the LGA package in the frame. (See D’Amato paragraph 10).
Further, the examiner also notes that drilling two more holes into the frame of Dozier II would have been obvious to one of ordinary skill in the art before the effective filing date since it has been held a duplication of parts is an obvious expedient and not a patentable distinction unless a new and unexpected result is produced. See In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Dozier II et al. (US 5,772,451) in view of Cho et al. (US 8,389,329).
Regarding Claim 5:
Dozier II discloses an interconnection system comprising an interposer (support substrate, See fig. 3, ref. no. 310, and col. 22 line 38-54) that defines a first surface (top surface of support substrate, See fig. 3, ref. no. 310a) and a second surface (bottom surface of support substrate, See fig. 3, ref. no. 310b), solder balls (solder balls, See fig. 3, ref. nos. 310b, 314 and col. 22 lines 30-54) at the second surface that are mounted to a main board (printed circuit board, See fig. 3, ref. no. 302), and a frame that, in turn, aligns with a mating substrate (the frame is sized such that the land grid array package and support substrate fit inside the frame, See fig. 3, ref. nos. 304, 310, and 330).
Dozier II does not disclose solder balls at the first surface that aligned with a frame and wherein the solder balls at the first surface provide only a mechanical alignment function.
Cho discloses dummy solder balls attached to a surface of a stackable package carrier that faces support recesses for receiving the dummy solder ball with dummy solder balls not serving an electrical function (See fig. 2, ref. nos. 104, 204, 210, col. 4 lines 38-44 and col. 5 lines 31-49).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the interconnection system of Dozier II to include dummy solder balls attached to the interposer and recesses in the frame from receiving the dummy solder balls as taught by Cho in order to precisely align the interposer in the frame.
Regarding Claim 6:
Dozier II discloses wherein the frame is configured to align with the mating substrate, such that the mating substrate is aligned with the main board (the frame is sized such that the land grid array package fit insides the frame and the frame is located above terminal of the printed circuit board, See fig. 3, ref. nos. 304, 306, 330, col. 22 lines 30-38).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Dozier II et al. (US 5,772,451) in view of D’Amato et al. (US 2003/0020179) further in view of Applicant’s admitted prior art.
Regarding Claim 19:
The above stated combination of Dozier II and D’Amato discloses the above stated main board assembly.
The above stated combination of Dozier II and D’Amato does not disclose wherein the electrical interconnect member comprises an anisotropically conductive compliant contact layer.
Applicant’s admitted prior art discloses wherein the electrical interconnect member comprises an anisotropically conductive compliant contact layer (PariPoser®, See paragraph 31)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the main board assembly of Dozier II and D’Amato, wherein the electrical interconnect member comprises an anisotropically conductive compliant contact layer as taught by Applicant’s admitted prior art, so the LGA package does not need to be precisely aligned in the frame.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRETT SQUIRES whose telephone number is (571)272-8214. The examiner can normally be reached Mon-Fri 8:00am-5:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CALEEN O SULLIVAN/Primary Examiner, Art Unit 2899
/B.S./Examiner, Art Unit 2899