Prosecution Insights
Last updated: July 15, 2026
Application No. 18/552,610

TRANSFER METHOD FOR OPTOELECTRONIC SEMICONDUCTOR COMPONENT

Final Rejection §102§103§112
Filed
Sep 26, 2023
Priority
Apr 01, 2021 — DE 10 2021 108 397.4 +1 more
Examiner
JONES, ERIC W
Art Unit
2892
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Ams-osram AG
OA Round
2 (Final)
62%
Grant Probability
Moderate
3-4
OA Rounds
3m
Est. Remaining
79%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allowance Rate
434 granted / 702 resolved
-6.2% vs TC avg
Strong +17% interview lift
Without
With
+17.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
31 currently pending
Career history
728
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
94.0%
+54.0% vs TC avg
§102
3.9%
-36.1% vs TC avg
§112
0.6%
-39.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 702 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claims Status Claims 21-39 are currently pending. Claim Rejections - 35 USC § 112 The rejection of Claims 21-34; and 38 under 35 U.S.C. 112(b), second paragraph is with withdrawn. Claims 21, 30 and 38 have been amended to overcome their rejections. Allowable Subject Matter Claims 21-34 are allowed. The following is a statement of reasons for the indication of allowable subject matter: A. Re claim 21, the prior art cannot anticipate, or render obvious the limitations of: fixing the optoelectronic semiconductor component to the second carrier, wherein the top surface of the partial region of the structured material layer protrudes above the at least one second region after the optoelectronic semiconductor component is arranged on the first region, in combination with the additionally claimed features of claim 21. None of the prior art of record teaches, alone or in combination, an arrangement of a partial region of the structured material layer and a second region as claimed above. In Re claims 22-34, they are allowed due to their dependence from claim 21. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 35-36 and 38-39 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by MLADENOVSKI et al (US 2020/0335482 A1-of record, hereafter Mladenovski). Re claim 35, Mladenovski discloses in FIG. 4 (with references to FIG. 3) an optoelectronic intermediate product (light emitting source) comprising: a printed circuit board (32; [0030]) having at least one first region (bottom of 24; [0030]) and at least one second region (left/right 22; [0030] and [0034]) adjacent to the first region (bottom of 24); at least one optoelectronic semiconductor component (LED 20; [0030]) arranged on (within) the at least one first region (bottom of 24); and a partial region (upper part) of a structured sacrificial layer (30 before curing; [0016]; [0030] and [0040]) arranged on a top surface (upper plane) of the at least one optoelectronic semiconductor component (20), wherein the at least one second region (left/right 22) protrudes (extends) above the top surface (upper plane) of the optoelectronic semiconductor component (LED 20), and wherein a top surface (upper plane) of the partial region (upper part) of the structured sacrificial layer (30 before curing) opposite (above) the optoelectronic semiconductor component (LED 20) protrudes above (extends vertically beyond) the at least one second region (left/right 22). Re claim 36, Mladenovski discloses the optoelectronic intermediate product according to claim 35, further comprising a contact pad (27/28; [0030]) arranged between the first region (bottom of 24) and the optoelectronic semiconductor component (LED 20). Re claim 38, Mladenovski discloses the optoelectronic intermediate product according to claim 35, wherein the structured sacrificial layer (30 before curing) comprises an at least partially transparent material (optical encapsulant; [0023]), and wherein the at least partially transparent material (optical encapsulant) is parylene or silicone ([0023]). Re claim 39, Mladenovski discloses the optoelectronic intermediate product according to claim 35, wherein the structured sacrificial layer (30 before curing) comprises light-converting and/or light-scattering particles (36; [0037]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim 37 is rejected under 35 U.S.C. 103 as being unpatentable over Mladenovski in view Ogihara et al (US 2004/0259331 A1-of record, hereafter Ogihara). Re claim 37, Mladenovski discloses the optoelectronic intermediate product according to claim 35, wherein the structured sacrificial layer (30 before curing) comprises an organic material (epoxy or acrylic resins or silicone; [0023]). But, fails to disclose wherein the structured sacrificial layer (30 before curing) comprises a photoresist. However, Ogihara discloses in FIG. 5 an optoelectronic intermediate product comprising: a structurable material layer (19; [0102]) on the at least one optoelectronic semiconductor component (left 20b; [0103]) arranged on a first carrier (11; [0103]), the structurable material layer (19) comprises a photoresist ([0097] and [0127]). Thus, it would have been obvious to modify the structure of Mladenovski by using the photoresist of Ogihara as a substitutional equivalent (MPEP § 2144.06) for the structured sacrificial layer of Mladenovski, for varying mechanical and etching characteristics (Ogihara; [0127]) of the structured sacrificial layer according to the requirements necessary for removal of the structured sacrificial layer to replace failed optoelectronic semiconductor components. Response to Arguments Applicant's arguments filed 4/30/2026 have been fully considered but they are not persuasive for the following reason(s): For claim 35, the applicant argues that the prior art to Mladenovski fails to disclose an optoelectronic intermediate product comprising a structured sacrificial layer. The examiner, respectfully, disagrees since optical encapsulant (30) is formed according to FIGS. 3-4 to be removeable prior to its being cured ([0016] and [0040]). Prior to curing, if an optoelectronic semiconductor component fails, it and the optical encapsulant (30) are removed and replaced ([0009]; [0016]; [0032] and [0040]). Therefore, the examiner deems the optical encapsulant (30) to be a structured sacrificial layer of an optoelectronic intermediate product that may further include a phosphor layer for color conversion applications ([0039]). Lastly, though it is easier to remove the structured sacrificial layer of Mladenovski, it is formed of a material (silicone; [0023]) that the applicant considers to be structured sacrificial layer material. Thus, it concluded that, prior to or after curing, the silicone optical encapsulant (30) is a structured sacrificial layer of an optoelectronic intermediate product that may further include a phosphor layer for color conversion applications. For the record, the applicant argues that Mladenovski is silent with respect to “disclose an intermediate product where a structured pillar is used to facilitate the fixing step”. However, these limitations are not required for claim 35, and have no bearing on any perceived deficiencies of Mladenovski as claim 35 reads. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W JONES whose telephone number is (408) 918-9765. The examiner can normally be reached M-F 7:00 AM - 6:00 PM PT. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC W JONES/Primary Examiner, Art Unit 2892
Read full office action

Prosecution Timeline

Sep 26, 2023
Application Filed
Feb 04, 2026
Non-Final Rejection mailed — §102, §103, §112
Apr 30, 2026
Response Filed
May 20, 2026
Final Rejection mailed — §102, §103, §112
Jul 13, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
62%
Grant Probability
79%
With Interview (+17.3%)
3y 1m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 702 resolved cases by this examiner. Grant probability derived from career allowance rate.

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