Prosecution Insights
Last updated: April 18, 2026
Application No. 18/553,631

DIFFERENTIAL PAIR IMPEDANCE MATCHING FOR A PRINTED CIRCUIT BOARD

Final Rejection §103
Filed
Oct 02, 2023
Examiner
MAIGA, SIDI MOHAMED
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Jabil Inc.
OA Round
2 (Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
2y 8m
To Grant
85%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
22 granted / 29 resolved
+7.9% vs TC avg
Moderate +9% lift
Without
With
+9.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
32 currently pending
Career history
61
Total Applications
across all art units

Statute-Specific Performance

§103
64.2%
+24.2% vs TC avg
§102
28.5%
-11.5% vs TC avg
§112
6.6%
-33.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 29 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 12/16/2025 have been fully considered but they are not persuasive. Applicant argued that the prior arts do not disclose the differential pins in the connector that can be coupled to a junction or a pad. Examiner respectfully disagreed Wig discloses a connector (500) including first and second differential pins (see para [0136]), wherein the first and second differential pins are electrically coupled to the first and second junctions, respectively (See para [0059], [0065], remember a junction is a point where two or more conductive paths (traces, wires, component leads) meet). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 – 5 and 9 - 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over KAGAYA et al. (US 20170331250 A1, “KAGAYA”) in view of Wig (US 20170047686 A1, “Wig”). Regarding claim 1, KAGAYA discloses (Fig. 3A, 6A) a printed circuit board (PCB) (31) comprising: a differential pair including a first conductor (121A) and a second conductor (121B); a first junction and a second junction connected to the first conductor and the second conductor (See annotated figure below), respectively; and a first impedance matching tuning stub (124A) and a second impedance matching tuning stub (124B) connected to the first junction and to the second junction, respectively; and a connector(122A-B) (122A – B) PNG media_image1.png 594 1046 media_image1.png Greyscale KAGAYA is silent on including first and second differential pins, wherein the first and second differential pins are electrically coupled to the first and second junctions, respectively. However, Wig discloses (Fig. 5, 6) a connector (500) including first and second differential pins (see para [0136]), wherein the first and second differential pins are electrically coupled to the first and second junctions, respectively (See para [0059], [0065]). KAGAYA and Wig are both considered to be analogous to the claimed invention because they are in the same field of printed circuit board. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified KAGAYA to incorporate the teachings of Wig and provide a connector (500) including first and second differential pins (see para [0136]), wherein the first and second differential pins are electrically coupled to the first and second junctions, respectively (See para [0059], [0065]). Doing so would minimize crosstalk and maintain signal integrity (see para [0059], [0061]). Regarding claim 2, KAGAYA in view of Wig discloses the PCB of claim 1, wherein KAGAYA further discloses the differential pair (121A, 121B) has a first impedance, the first junction and the second junction (See figure above) have a second impedance, and the first impedance matching stub (124A) and the second impedance matching stub (124B) match the second impedance to the first impedance (See fig. 3A and para [0086]). Regarding claim 3, KAGAYA in view of Wig discloses the PCB of claim 1, wherein KAGAYA further discloses the differential pair has a first impedance, the first junction and the second junction have a second impedance, the first impedance matching stub (124A) has a first length and a first shape, the second impedance matching stub (124B) has the first length and the first shape, and at least one of the first length or the first shape being such that the first impedance matching stub and the second impedance matching stub match the second impedance to the first impedance (See para [0086]). Regarding claim 4, KAGAYA in view of Wig discloses the PCB of claim 1, wherein KAGAYA further discloses the differential pair has a first impedance, the first junction and the second junction have a second impedance, the first impedance matching stub has a first length and a first shape, the second impedance matching stub has second length and a second shape, and at least one of the first length, the first shape, the second length, or the second shape match the second impedance to the first impedance (See para [0086]). Regarding claim 5, KAGAYA in view of Wig discloses the PCB of claim 1, wherein KAGAYA further discloses at least one of the first impedance matching stub or the second impedance matching stub is either a stripline or a microstrip (See para [0086]). Regarding claim 9, KAGAYA in view of Wig discloses the PCB of claim 1, wherein KAGAYA further discloses the PCB has a first side and a second side separated by a non-conductive substrate (138), the first side having a ground plane, and the differential pair of conductors, the first impedance matching stub, the second impedance matching stub, the first junction, and the second junction, are on the second side (See para [0103]). Regarding claim 10, KAGAYA in view of Wig discloses the PCB of claim 1, wherein KAGAYA further discloses the PCB is a multilayer printed circuit board, and the first impedance matching stub and the second impedance matching stub are on an internal layer of the PCB (see Fig. 2). Regarding claim 11, KAGAYA discloses (Fig. 3A, 6A) a printed circuit board (PCB) (31) comprising: a differential pair of conductors, the differential pair having a first conductor (121A) and a second conductor (121A); a first pad (123A) and a second pad (123B) connected to the first conductor and the second conductor, respectively; a first impedance matching stub (124A) and a second impedance matching stub (124B) connected to the first pad and the second pad, respectively; and a connector (122A, 122B) mounted on the PCB (31), the connector having a differential pair of pins, the differential pair of pins being connected to the first pad (123A) and the second pad (123B), wherein the differential pair has a first impedance, the first and second pad, the connector, and the differential pair of pins present a second impedance, and the first impedance matching stub and the second impedance matching stub match the second impedance to the first impedance. KAGAYA is silent on the connector having a differential pair of pins, the differential pair of pins being connected to the first pad and the second pad, wherein the differential pair has a first impedance, and the first and second pad, the connector, and the differential pair of pins present a second impedance, and the first impedance matching stub and the second impedance matching stub match the second impedance to the first impedance. However, Wig discloses (Fig. 5) the connector (500) having a differential pair of pins (see para [0136]), the differential pair of pins being connected to the first pad and the second pad, wherein the differential pair has a first impedance, and the first and second pad, the connector, and the differential pair of pins present a second impedance, and the first impedance matching stub and the second impedance matching stub match the second impedance to the first impedance (since impedance depends on the type and dimension of a material, one of ordinary skill in the art can the select the type and dimension of the material so that the impedances match). KAGAYA and Wig are both considered to be analogous to the claimed invention because they are in the same field of printed circuit board. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified KAGAYA to incorporate the teachings of Wig and provide the connector (500) having a differential pair of pins (see para [0136]), the differential pair of pins being connected to the first pad and the second pad, wherein the differential pair has a first impedance, and the first and second pad, the connector, and the differential pair of pins present a second impedance, and the first impedance matching stub and the second impedance matching stub match the second impedance to the first impedance (since impedance depends on the type and dimension of a material, one of ordinary skill in the art can the select the type and dimension of the material so that the impedances match). Doing so would minimize crosstalk and maintain signal integrity (see para [0059], [0061]). Regarding claim 12, KAGAYA in view of Wig discloses the PCB of claim 11, wherein KAGAYA further discloses that the distal end of the first impedance matching stub and the distal end of the second impedance matching stub are open- circuited (See para [0086]). Regarding claim 13, KAGAYA in view of Wig discloses the PCB of claim 11, wherein KAGAYA further discloses that the first impedance matching stub has a first length, the second impedance matching stub has the first length, and the first length being such that the first impedance matching stub and the second impedance matching stub match the second impedance to the first impedance (See para [0086]). Regarding claim 14, KAGAYA in view of Wig discloses the PCB of claim 11, wherein KAGAYA further discloses that the first impedance matching stub has a first length, the second impedance matching stub has a second, different length, and the first length and the second length being such that the first impedance matching stub and the second impedance matching stub match the second impedance to the first impedance (See para [0086]). Regarding claim 15, KAGAYA in view of Wig discloses the PCB of claim 11, wherein KAGAYA further discloses that the first impedance matching stub has a first shape, the second impedance matching stub has the first shape, and the first shape being such that the first impedance matching stub and the second impedance matching stub match the second impedance to the first impedance (See para [0086]). Regarding claim 16, KAGAYA in view of Wig discloses the PCB of claim 11, wherein KAGAYA further discloses that the first impedance matching stub has a first shape, the second impedance matching stub has a second, different shape, and the first shape and the second shape are such that the first impedance matching stub and the second impedance matching stub match the second impedance to the first impedance (See para [0086]). Allowable Subject Matter Claim 21 – 22 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SIDI MOHAMED MAIGA whose telephone number is (703)756-1870. The examiner can normally be reached Monday - Friday 8 am 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached on 571-272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SIDI M MAIGA/ Examiner, Art Unit 2847
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Prosecution Timeline

Oct 02, 2023
Application Filed
Nov 14, 2025
Non-Final Rejection — §103
Dec 16, 2025
Response Filed
Mar 21, 2026
Final Rejection — §103
Apr 08, 2026
Response after Non-Final Action

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12586995
ELECTRICAL APPARATUS AND PLUG
2y 5m to grant Granted Mar 24, 2026
Patent 12588142
HIGH-FREQUENCY ELECTRONIC COMPONENT
2y 5m to grant Granted Mar 24, 2026
Patent 12568584
WIRING BOARD
2y 5m to grant Granted Mar 03, 2026
Patent 12563665
INSULATING CIRCUIT BOARD AND SEMICONDUCTOR DEVICE IN WHICH SAME IS USED
2y 5m to grant Granted Feb 24, 2026
Patent 12550257
WIRING SUBSTRATE
2y 5m to grant Granted Feb 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
85%
With Interview (+9.4%)
2y 8m
Median Time to Grant
Moderate
PTA Risk
Based on 29 resolved cases by this examiner. Grant probability derived from career allow rate.

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