Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Liu et al. (US 2015/0145115).
Regarding claim 1, Liu et al. disclose a first semiconductor chip(103); a heat dissipation member(107); a heat conductive member (106) (fig. 2) disposed between a chip plane of the first semiconductor chip and the heat dissipation member; and an outflow prevention part (105c) (fig. 2) that prevents outflow of the heat conductive member from the chip plane [0057] (fig. 2).
Regarding claim 2, Liu et al. disclose a first sealing resin [0053, cured epoxy would be the resin]configured to seal the first semiconductor chip,wherein the outflow prevention part is formed in the first sealing resin [0052-0056].
Claim(s) 1-2 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Denso (JP 2010-245468).
Regarding claim 1 Denso disclose disclose a first semiconductor chip(10); a heat dissipation member(2); a heat conductive member (3) (fig. 1) disposed between a chip plane of the first semiconductor chip and the heat dissipation member; and an outflow prevention part (molded resin has 20 has recess 22) (fig. 1) that prevents outflow of the heat conductive member from the chip plane.
Regarding claim 2, Denso. disclose a first sealing resin [20, mold resin]configured to seal the first semiconductor chip,wherein the outflow prevention part is formed in the first sealing resin (recess 22 in mold resin 20)(fig.1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Denso (JP 2010-245468) as applied to claim 1 above in view of Fujitsu (JP 2007-174179).
Denso disclose disclose a first semiconductor chip(10); a heat dissipation member(2); a heat conductive member (3) (fig. 1) disposed between a chip plane of the first semiconductor chip and the heat dissipation member; and an outflow prevention part (molded resin has 20 has recess 22) (fig. 1) that prevents outflow of the heat conductive member from the chip plane.
Denso further discloses a first sealing (20) resin configured to seal (the top of ) the first semiconductor chip and an outflow prevention part is formed in the first sealing resin.
Denso fails to explicitly disclose the outflow prevention part is formed in the heat dissipation member.
However Fujitsu discloses a wall in the heat spreader (20, dissipation member)(fig. 1). The wall (20) would perform as the outflow prevention part.
The combination of Denso and Fujitsu would result in the wall being formed in the heat dissipation member.
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods (forming a wall on the heat spreader), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the wall would perform as an outflow prevention part).
Allowable Subject Matter
Claims 3-18 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter the prior art of record fails to teach or suggest: the first sealing resin is formed with a first opening that exposes at least a part of a chip plane of the first semiconductor chip, and the outflow prevention part includes a first notch adjacent to at least a part of an outer periphery of the first opening (claims 3-6) one of both surfaces of the semiconductor chip is a light-receiving surface,the heat conductive member is disposed between the other of the both surfaces of the first semiconductor chip and the heat dissipation member, and the outflow prevention part includes a notch formed in the first sealing resin and a trench formed in the heat dissipation member (claim 7-9) the heat dissipation member includes a base having a plate shape and a plurality of protrusions protruding from the base in a direction perpendicular to the chip plane, anda height of the base from the chip plane is lower than a height of the first sealing resin from the chip plane (claim 10) a second sealing resin having a lower elastic modulus than an elastic modulus of the first sealing resin; and a wiring layer in which an external terminal is provided on one of both surfaces and the second sealing resin and the first semiconductor chip are stacked on the other of the both surfaces, wherein the first sealing resin is stacked on the second sealing resin (claim 11) a substrate on which the first semiconductor chips are stacked and in which an opening that exposes a part of the chip plane is formed, wherein one of both surfaces of the first semiconductor chip is a light-receiving surface, and the other of the both surfaces is the chip plane, and the outflow prevention part includes a notch formed in the substrate (claims 12-15) the notch is formed adjacent to a part of an outer periphery of the opening (claim 16) the notch is formed in a region surrounding an outer periphery of the opening (claim 17) a predetermined electronic component is mounted on the substrate (claim 18) the outflow prevention part further includes a holding part formed in the heat dissipation member, andthe holding part holds the heat conductive member (claim 20).
Conclusion
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/BRADLEY SMITH/Primary Examiner, Art Unit 2817