DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Remarks
Although an attempt has been made to identify all instances of claim language non- complacence, such identification is extremely burdensome due to the large number of instances. Examples are provided herein below. Since such noncompliance confuses the claims to the extent that not all of the problems are ready apparent, then upon amendment, if an alternative interpretation of claim language requires a change in the rejection, the new rejection may properly made final.
Applicant’s cooperation is requested in reviewing the claims’ structure to ensure proper claim construction and to correct any subsequently discovered instances of claim language noncompliance. See Morton International Inc., 28USPQ2d 1190, 1195 (CAFC, 1993).
Claim Objections
Claims 1, are objected to because of the following informalities:
Claim 1 recites the limitation “first layer of a semiconductor material (8) doped with a doping of a first type and made at least near adjacently said front surface (4)” in lines 5-6.
Claim 1 recites “a second layer of the semiconductor material (9) doped with a doping of a second type of electrically opposite sign to said first type and made arranged to a first depth in said substrate (9)” in lines 8-10.
Claim 1 recites the limitation “a third layer of said semiconductor material (12) doped with a doping of said second type and made arranged at a second depth in said substrate (3)” in lines 14-15.
However, there is a lack of clarity in the scope for “a first type” and “a second type” With regarding impurity of the dopant related to the “first layer,” “second layer” and “third layer” and the conductivity should be recited in order to avoid ambiguity in the claim. In addition, “a second type of electrically opposite sign” also lacks clarity in the scope and meaning. When it comes electrical sign, it is normally related to positive charge and negative charge. However, when it comes to dopant it is related more to conductivity such as p-type or n-type rather than signs. Therefore, applicant should use proper claim language that clearly describes the impurities of the dopants.
For example, the claim can be modified as follows:
--first layer of a semiconductor material (8) doped with a doping of a first type and made at least near adjacently said front surface (4), wherein the first type comprises p-type impurities--. Other alternative form can also be recited in order to provide clarity in the claim.
Claim 1 recites the limitation “said second layer (9) being substantially parallel to said first layer (8) so as to affect a second area and so as to make to create, between said first layer (8) and said second layer (9)” in lines 10-11.
Claim 1 recites the limitation “said third layer (12) affecting a third area” in line 16.
However, it is not clear that where “second area” and “a second area” located within the device structure. Without defining the position or location of these area it may render the claim ambiguous,
Claim 1 recites the limitation “a first layer of a semiconductor material (8)” in line 5. Change “a first layer of a semiconductor material” to --a first layer of semiconductor material—provides proper claim language in the claim.
Claim 1 recites the limitation “a second layer of the semiconductor material (9)” in line 8. However, there is lack of antecedent basis for “the semiconductor material.” Changing “a second layer of the semiconductor material” to -- a second layer of semiconductor material -- provides proper antecedent basis.
Claim 1 recites the limitation “said second layer (9) being substantially parallel to said first layer (8) so as to affect a second area and so as to create, between said first layer (8) and said second layer (9), with a polarization of said diode radiation sensor (1; 100)” in lines 10-13.
However, there is al ack of antecedent basis for “said firs layer” and “said second layer.”
Changing “said firs layer” and “said second layer” to – said first layer of semiconductor material-- and --said second layer of semiconductor material--. In order to provide proper antecedent basis and consistency throughout the claim language.
Clam 5 recites the limitation “a fourth layer of the semiconductor material (25) doped with a doping of said first type and arranged at least adjacently to said front surface (4) of said substrate (3) above said first layer (8), said doping of said fourth layer (25) being greater than said doping of said first layer (8) so as to obtain a conductivity of said fourth layer (25) greater than a conductivity of said first layer (8)” in lines 2-7. However, there is alack of proper antecedent basis for “fourth layer” and “first layer.”
Changing the limitation claim 5 to -- a fourth layer of semiconductor material (25) doped with a doping of said first type and arranged at least adjacently to said front surface (4) of said substrate (3) above said first layer (8), said doping of said fourth layer of semiconductor material (25) being greater than said doping of said first layer of semiconductor material (8) so as to obtain a conductivity of said fourth layer (25) greater than a conductivity of said first layer of semiconductor material (8)-- in order to provide proper antecedent basis.
Claim 6 recites the limitation “wherein said second isolation region (15) reaches a third depth in said substrate (3) greater than said second depth at which said third layer (12) is present” in lines 2-3.
However, there is a lack of proper antecedent basis for “said third layer” in the claim.
Changing “said third layer” to -- said third layer of semiconductor material” provided proper antecedent basis and consistency in the claim.
Claim 8 recites the limitation “a sixth layer of the semiconductor material (30) doped with a doping of said second type arranged deep in into said substrate (3) starting from said third layer (12) and interposed between said substrate (3) and said second isolation region (15)” in lines 2-4.
However, there is a lack of proper antecedent basis for “the semiconductor material” and “said second layer” in the claim.
Changing claims 6 to --a sixth layer of semiconductor material (30) doped with a doping of said second type arranged deep in into said substrate (3) starting from said third layer of semiconductor material (12) and interposed between said substrate (3) and said second isolation region (15).
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Clam 1 recites the limitation “a first isolation region (18) interposed between a lateral edge (15b) of said charge multiplication diode (2) and said first (8) and second layer of said semiconductor material (9) and which extends deep said first isolation region extending into said substrate (3) from said front surface (4) to said third layer of said semiconductor material (12) so as to create, between said lateral edge (15b) of said charge multiplication diode (2) and said first isolation region (18) in a first direction, and between said front surface (4) and said third layer (12), in a second direction orthogonal to said first direction, a working area (19; 119) electrically separated from said first (8) and second layer of the semiconductor material (9)” in lines 18-25.
However, there is a lack of proper antecedent basis for “said first (8) and second layer of said semiconductor material” and “second layer of the semiconductor material” in the claim.
Changing the aforementioned limitation in lines 18-25 to --a first isolation region (18) interposed between a lateral edge (15b) of said charge multiplication diode (2) and said first layer of semiconductor material (8) and said second layer of semiconductor material (9) and which extends deep said first isolation region extending into said substrate (3) from said front surface (4) to said third layer of semiconductor material (12) so as to create, between said lateral edge (15b) of said charge multiplication diode (2) and said first isolation region (18) in a first direction, and between said front surface (4) and said third layer of semiconductor material (12), in a second direction orthogonal to said first direction, a working area (19; 119) electrically separated from said first (8) and said second layer of semiconductor material (9)-- in order to provide proper antecedent basis.
Claims 2-9 are also rejected as being directly or indirectly dependent of the rejected independent base claim.
Allowable Subject Matter
Claim 1 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure KALNITSKY et al. (US 2016/0351604), Mazzillo et al. (US 2017/0098730) and YAMASHITA (US 2019/0103504) also disclose similar inventive subject matter.
Correspondence
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BROOK KEBEDE whose telephone number is 571-272-1862. The examiner can normally be reached Monday Friday 8:00 AM 5:00 PM.
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/BROOK KEBEDE/
Primary Examiner, Art Unit 2894
/BK/
January 10, 2026