Prosecution Insights
Last updated: April 19, 2026
Application No. 18/555,483

A diode radiation sensor

Non-Final OA §102§103
Filed
Oct 13, 2023
Examiner
ABDELAZIEZ, YASSER A
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fondazione Bruno Kessler
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
89%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
687 granted / 798 resolved
+18.1% vs TC avg
Minimal +3% lift
Without
With
+3.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
34 currently pending
Career history
832
Total Applications
across all art units

Statute-Specific Performance

§101
1.6%
-38.4% vs TC avg
§103
46.5%
+6.5% vs TC avg
§102
30.4%
-9.6% vs TC avg
§112
18.5%
-21.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 798 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-5 and 10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by NICLASS et al. (US 2015/0054111), (hereinafter, NICLASS). PNG media_image1.png 380 602 media_image1.png Greyscale RE Claim 1, NICLASS discloses a photodiode, i.e. diode radiation sensor, “single photon avalanche photodiode SPAD” and a method of making the same and its application as an image sensor [0055 and 0060]. NICLASS discloses in FIGS. 1-9 a diode radiation sensor “image sensor” having one or more charge multiplication diodes “SPAD”, which is formed by two layer 203 and 204, referring to FIGS. 6 and 7, said diode radiation sensor comprising: a substrate made 202 “silicon” “epitaxial layer” of a semiconductor material, the substrate having a front surface and a rear surface opposite said front surface, referring to FIG. 7 [0058 and 0059]; a first layer of the semiconductor material 204 doped with a doping of a first type “n-type” and provided at least adjacently to said front surface of said substrate 201/216/202 so as to cover at least a first central area of said front surface of said substrate 202, referring to FIG. 7; a second layer of the semiconductor material 203 doped with a doping of a second type “p-type” of electrically opposite sign to said first type and provided at a first depth in said substrate 202 “silicon” “epitaxial layer”, said second layer being parallel to said first layer so that a second area, between said first layer and said second layer, generates, with a polarization of said diode radiation sensor, a high electric field region for generating a charge multiplication effect. Examiner notes that the aforementioned limitation is met the since the diode formed between first and second semiconductor regions 204/203 is a single photon avalanche photodiode, in which a polarization of said diode radiation sensor, a high electric field region for generating a charge multiplication effect [0009-0011 and 0036]; a third layer 215 of the semiconductor material doped with the doping of said second type “p-type” and provided at a second depth in said substrate greater than said first depth, said third layer 215 defining a third area which, in plan projection, is lateral and at most partially overlapping said second area, referring to FIGS. 1 and 7; at least one a first isolation region 205 made provided peripherally to said substrate 202 “epitaxial layer”, the first isolation region 205 extending into said substrate from said front surface to an intermediate area between said front surface and said rear surface so as to be arranged laterally at least to said first and second layers 204/203, referring to FIGS. 6 and 7; and a passivation layer 211 interposed between at least a lateral wall portion of said first isolation region 205 and said substrate 202 “silicon” at least from said second depth of said third layer 215 towards said rear surface, referring to FIGS. 6 and 7. Examiner notes that the maximum electric field in an area 211 of the depletion layer extending in the lateral direction to be lower than the planar electric field in the avalanche multiplication is functionally equivalent to the claimed passivation layer, since it performs the same function, hence the claimed limitation is met. RE Claim 2, NICLASS discloses a diode radiation sensor, further comprising a fourth layer 207 “contact layer via highly doped” of the semiconductor material doped with the doping of said first type “n-type” and made at least adjacently to said front surface of said substrate 202 “silicon” above said first layer 204, said doping of said fourth layer being greater “heavily doped, i.e. n+” than said doping of said first layer so as to obtain a conductivity of said fourth layer 207 greater than the conductivity of said first layer 204 [0032]. Since the fourth layer 207 is a contact layer to the n-type doped first layer 204, it is implicit that the heavy doped contact “fourth layer” 207 is of the same conductivity as the first layer 204, hence meeting the claimed limitation. RE Claim 3, NICLASS discloses a diode radiation sensor, wherein each point of a perimeter of said second area is spaced from said passivation layer by at least one predetermined distance, referring to FIGS. 6 and 7. Examiner notes that the second area wherein the charges multiplication in the 203 layer is clearly having each point of a perimeter of said second area is spaced from said passivation layer 211 by at least one predetermined distance, hence meeting the claimed limitation. RE Claim 4, NICLASS discloses a diode radiation sensor, wherein said third area defined by said third layer 215 on a first side is in contact with said passivation layer 211 and extends in an opposite direction for a length at least coincident with said predetermined distance, referring to FIGS. 6 and 7. RE Claim 5, NICLASS discloses a diode radiation sensor, further comprising at least one a fifth layer 216 “graded doped layer” of the semiconductor material doped with the doping of said second type “p-type” and interposed between said passivation layer 211 and said rear surface of said substrate 202 “silicon” “epitaxial layer”. RE Claim 10, NICLASS discloses a diode radiation sensor, further comprising a further an additional layer 201 doped with the doping of the second type “p-type” on said rear surface of said substrate 202 “epitaxial layer”, referring to FIG. 7. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or non-obviousness. Claim(s) 6 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over NICLASS et al. (US 2015/0054111), (hereinafter, NICLASS) in view of Lan et al. (US 2021/0273003), (hereinafter, Lan). RE Claim 6, NICLASS does not discloses a diode radiation sensor, further comprising a second isolation region provided peripherally to said substrate and extending in depth into said substrate starting from said rear surface. However, in the same field of endeavor, Lan discloses an image sensor including a single photon avalanche diode 324/326 “SPAD” with dual isolation regions 104/308 “upper and lower isolation” surrounding the “SPAD” region 324/326 with the second region 308 extending in depth into said substrate starting from said rear surface, referring to FIG. 3B. Therefore, it would have been obvious for one of ordinary skill in the art, prior to the effective filing date of the instant application, to use a second isolation region provided peripherally to said substrate and extending in depth into said substrate starting from said rear surface and laterally surrounding the radiation diode sensor region in order to reduce the cross-talk between adjacent photo-diode elements, as disclosed by Lan [0034]. RE Claim 9, NICLASS in view of Lan do not discloses a diode radiation sensor, wherein said first and said second isolation regions are made of an oxide of said semiconductor material 202 “silicon”. However, in the field of endeavor, Lan discloses an image sensor including a single photon avalanche diode 324/326 “SPAD” with dual isolation regions 104/308 “upper and lower isolation” surrounding the “SPAD” region 324/326 with the second region 308 extending in depth into said substrate starting from said rear surface, referring to FIG. 3B, wherein isolation regions 104/308 are made of an oxide of said semiconductor material “silicon oxide” [0032 and 0034]. Therefore, it would have been obvious for one of ordinary skill in the art, prior to the effective filing date of the instant application, to use a second isolation region provided peripherally to said substrate and extending in depth into said substrate starting from said rear surface and laterally surrounding the radiation diode sensor region in order to reduce the cross-talk between adjacent photo-diode elements, as disclosed by Lan [0034]. Claim(s) 7 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over NICLASS et al. (US 2015/0054111), (hereinafter, NICLASS) in view of Lan et al. (US 2021/0273003), (hereinafter, Lan) as implemented in Claim 6 and in further view of OTAKE et al. (US 2019/0267414), (hereinafter, OTAKE). RE Claim 7, NICLASS in view of Lan do not discloses a diode radiation sensor, further comprising a sixth layer of the semiconductor material doped with the doping of said second type, said sixth layer being interposed between said second isolation region and said substrate. However, in the same field of endeavor, OTAKE discloses in FIG. 8 an avalanche photodetector formed by the regions 101 n-type and 102 p-type withing a substrate 103 that can be doped as p or n type with a silicon oxide region 108 isolating adjacent photodiodes [0094 and 0097] multiple hole accumulation layer, hence p-type, i.e. second type, adjacent to isolating silicon oxide layer 108 that extends from the backside of the substrate 103 to its front side, referring to FIG. 8, wherein layer 107c’ of the semiconductor material doped with the doping of said second type, p-type, said layer 107c’ being interposed between said isolation region 108 and said substrate 10. Therefore, it would have been obvious for one of ordinary skill in the art, prior to the effective filing date of the instant application, to have a sixth layer of the semiconductor material with the doping of said second type p-type, said sixth layer being interposed between said second isolation region 308 and said substrate similar to the hole accumulation layer 107c’ of OTAKE disclosure in order to suppress dark current of NICLASS disclosed SPAD. RE Claim 8, NICLASS in view of Lan do not discloses a diode radiation sensor, further comprising a seventh layer of the semiconductor material doped with the doping of said second type and interposed between said passivation layer and said sixth layer. However, in the same field of endeavor, OTAKE discloses in FIG. 8 an avalanche photodetector formed by the regions 101 n-type and 102 p-type withing a substrate 103 that can be doped as p or n type with a silicon oxide region 108 isolating adjacent photodiodes [0094 and 0097] multiple hole accumulation layer, hence p-type, i.e. second type, adjacent to isolating silicon oxide layer 108 that extends from the backside of the substrate 103 to its front side, referring to FIG. 8, wherein layer 107c “hole accumulation layer” being interposed between said isolation region 108 and the “hole accumulation layer 107c’. Therefore, it would have been obvious for one of ordinary skill in the art, prior to the effective filing date of the instant application, to have a seventh layer of the semiconductor material, similar to the hole accumulation layer 107c of OTAKE with the doping of said second type p-type, said seventh layer being interposed between said second isolation region 308 and said the hole accumulation layer 107c’ similar to OTAKE disclosure in order to suppress dark current of NICLASS disclosed SPAD. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to YASSER ABDELAZIEZ whose telephone number is (571)270-5783. The examiner can normally be reached Monday - Friday 9 am - 6 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at (571)270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YASSER A ABDELAZIEZ, PhD/Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Oct 13, 2023
Application Filed
Feb 11, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12595167
DUAL MICRO-ELECTRO MECHANICAL SYSTEM AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Apr 07, 2026
Patent 12588551
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
2y 5m to grant Granted Mar 24, 2026
Patent 12588193
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12581641
MEMORY CELL, MEMORY AND METHOD FOR MANUFACTURING MEMORY
2y 5m to grant Granted Mar 17, 2026
Patent 12575199
IMAGE SENSOR DEVICES INCLUDING A SUPERLATTICE
2y 5m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
89%
With Interview (+3.3%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 798 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month