Prosecution Insights
Last updated: July 17, 2026
Application No. 18/556,910

ROTATIONAL INDEXERS WITH WAFER CENTERING CAPABILITY

Non-Final OA §112
Filed
Oct 24, 2023
Priority
Apr 27, 2021 — provisional 63/201,390 +1 more
Examiner
LIN, JASON
Art Unit
2117
Tech Center
2100 — Computer Architecture & Software
Assignee
Lam Research Corporation
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
549 granted / 754 resolved
+17.8% vs TC avg
Strong +24% interview lift
Without
With
+23.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
22 currently pending
Career history
777
Total Applications
across all art units

Statute-Specific Performance

§101
5.8%
-34.2% vs TC avg
§103
82.2%
+42.2% vs TC avg
§102
1.7%
-38.3% vs TC avg
§112
9.0%
-31.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 754 resolved cases

Office Action

§112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings filed on 10/24/23 are accepted by the examiner. Information Disclosure Statement The information disclosure statement (IDS) submitted on 1/17/25 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The term “nominally circular pattern” in claim 1 is a relative term which renders the claim indefinite. The term “nominally circular pattern” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For the purpose of the examination, the examiner has interpreted “nominally circular pattern” in claim 1 as “circular pattern”. The term “nominally located at the center” in claim 1 is a relative term which renders the claim indefinite. The term “nominally located at the center” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For the purpose of the examination, the examiner has interpreted “nominally located at the center” in claim 1 as “located at the center”. Claims 2-12, included in the statement of rejection but not specifically addressed in the body of the rejection have inherited the deficiency of their parent claim and have not resolved the deficiencies. Therefore, they are rejected based on the same rationale as applied to their parent claim above. Allowable Subject Matter Claims 13-22 are allowed. Claim 1 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. The following is an examiner’s statement of reasons for allowance: Claims 1-12 Regarding claim 1, US10109517 discloses a rotational indexer is provided that may be rotated to move semiconductor wafers or other items between various stations arranged in a circular array; the items being moved may be supported by arms of the indexer during such movement. The rotational indexer may be further configured to also cause the items being moved to rotate about other rotational axes to cause rotation of the items relative to the arms supporting them. US20060137609 discloses a wafer processing apparatus includes one or more processing modules, each having multiple, distinct, single-wafer processing reactors configured for semi-independent ALD and/or CVD film deposition therein; a robotic central wafer handler configured to provide wafers to and accept wafers from each of said wafer processing modules; and a single-wafer loading and unloading mechanism that includes a loading and unloading port and a mini-environment coupling the loading and unloading port to the robotic central wafer handler. The wafer processing reactors may be arranged (i) along axes of a Cartesian coordinate system, or (ii) in quadrants defined by said axes, one axis being parallel to a wafer input plane of the at least one of the process modules to which the single-wafer processing reactors belong. Each processing module can include up to four single-wafer processing reactors, each with an independent gas distribution module. US6860965 discloses a wafer processing system has a loading station, a process module, and a load lock directly adjacent to the process module. The load lock has a small volume and can include integrated heating/cooling units. The load lock also has a wafer transfer mechanism for placing a wafer directly to the process module. The wafer processing system does not employ a transfer chamber to transport wafers between the load lock and the process module. Instead, a wafer is directly transferred from the load lock to the process module using the wafer transfer mechanism. Not requiring a transfer chamber not only improves the throughput of the wafer processing system, but also lowers its complexity and component count as well. The throughput of the wafer processing system is also improved by using a small volume load lock with integrated cooling/heating units. US6760976 discloses a method for a robotic semiconductor wafer processing system to correct for wafers that have become offset or off-center during wafer processing. This is accomplished by determining the amount of offset and re-centering the wafer during wafer transport to the next process station using a single station sensor to locate the wafer center point. Each single sensor located at each station activates when the wafer's edge traverses through the sensor's path. Directional coordinates for the measured designated points on the wafer's edge are calculated, and the intersection points of two circles, analytically derived from using the measured designated points as their centers, are determined. The intersection point closest to the true wafer center position represents the measured wafer's center point. This point is compared to the true wafer center position, and the wafer is then adjusted for this difference. However, regarding claim 1, the combination of prior arts does not describe: select an embarkation pedestal from the plurality of pedestals, select a destination pedestal from the plurality of pedestals, select a selected rotatable wafer support from the plurality of rotatable wafer supports, cause at least one of the central hub and the selected rotatable wafer support to rotate about the first axis and to rotate about the second axis of the selected rotatable wafer support relative to the indexer arms, respectively, such that a corresponding reference point that is fixed with respect to the selected rotatable wafer support and offset from the second axis of the selected rotatable wafer support by a first non-zero distance in a direction perpendicular to the second axis of the selected rotatable wafer support is centered on an estimated center of a wafer located at the semiconductor processing station associated with the embarkation pedestal when viewed along a direction parallel to the first axis, cause the wafer located at the semiconductor processing station associated with the embarkation pedestal to be placed on the selected rotatable wafer support after the corresponding reference point for the selected rotatable wafer support is centered on the estimated center of the wafer located at the semiconductor procession station associated with the embarkation pedestal when viewed along a direction parallel to the first axis, cause at least one of the central hub and the selected rotatable wafer support to rotate about the first axis and to rotate about the second axis of the selected rotatable wafer support relative to the indexer arms, respectively, such that the corresponding reference point for the selected rotatable wafer support is centered above the corresponding target location of the destination pedestal, and cause the wafer on the selected rotatable wafer support to be lifted off of the selected rotatable wafer support after the corresponding reference point for the selected rotatable wafer support is centered above the corresponding target location of the destination pedestal Claims 13-22 Regarding claim 13, US10109517 discloses a rotational indexer is provided that may be rotated to move semiconductor wafers or other items between various stations arranged in a circular array; the items being moved may be supported by arms of the indexer during such movement. The rotational indexer may be further configured to also cause the items being moved to rotate about other rotational axes to cause rotation of the items relative to the arms supporting them. US20060137609 discloses a wafer processing apparatus includes one or more processing modules, each having multiple, distinct, single-wafer processing reactors configured for semi-independent ALD and/or CVD film deposition therein; a robotic central wafer handler configured to provide wafers to and accept wafers from each of said wafer processing modules; and a single-wafer loading and unloading mechanism that includes a loading and unloading port and a mini-environment coupling the loading and unloading port to the robotic central wafer handler. The wafer processing reactors may be arranged (i) along axes of a Cartesian coordinate system, or (ii) in quadrants defined by said axes, one axis being parallel to a wafer input plane of the at least one of the process modules to which the single-wafer processing reactors belong. Each processing module can include up to four single-wafer processing reactors, each with an independent gas distribution module. US11443973 discloses substrate processing systems may include a transfer region housing defining a transfer region fluidly coupled with a plurality of processing regions. A sidewall of the transfer region housing may define a sealable access for providing and receiving substrates. The systems may include a plurality of substrate supports disposed within the transfer region. The systems may also include a transfer apparatus having a central hub including a first shaft and a second shaft counter-rotatable with the first shaft. The transfer apparatus may include an eccentric hub extending at least partially through the central hub, and which is radially offset from a central axis of the central hub. The transfer apparatus may also include an end effector coupled with the eccentric hub. The end effector may include a plurality of arms having a number of arms equal to the number of substrate supports of the plurality of substrate supports. However, regarding claim 13, the combination of prior arts does not describe: select an embarkation pedestal from the plurality of pedestals, select a destination pedestal from the plurality of pedestals, select a selected rotatable wafer support from the plurality of rotatable wafer supports, cause at least one of the central hub and the selected rotatable wafer support to rotate about the first axis and to rotate about the second axis of the selected rotatable wafer support relative to the indexer arms, respectively, such that a corresponding reference point that is fixed with respect to the selected rotatable wafer support and offset from the second axis of the selected rotatable wafer support by a first non-zero distance in a direction perpendicular to the second axis of the selected rotatable wafer support is centered on an estimated center of a wafer located at the semiconductor processing station associated with the embarkation pedestal when viewed along a direction parallel to the first axis, cause the wafer located at the semiconductor processing station associated with the embarkation pedestal to be placed on the selected rotatable wafer support after the corresponding reference point for the selected rotatable wafer support is centered on the estimated center of the wafer located at the semiconductor procession station associated with the embarkation pedestal when viewed along a direction parallel to the first axis, cause at least one of the central hub and the selected rotatable wafer support to rotate about the first axis and to rotate about the second axis of the selected rotatable wafer support relative to the indexer arms, respectively, such that the corresponding reference point for the selected rotatable wafer support is centered above the corresponding target location of the destination pedestal, and cause the wafer on the selected rotatable wafer support to be lifted off of the selected rotatable wafer support after the corresponding reference point for the selected rotatable wafer support is centered above the corresponding target location of the destination pedestal Conclusion The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. US20160122872 discloses a film forming apparatus includes a rotary table having a loading area at a first surface side thereof and revolving a substrate loaded on the loading area, a rotation mechanism rotating the loading area such that the substrate rotates around its axis, a processing gas supply mechanism supplying a processing gas to a processing gas supply area so that a thin film is formed on the substrate which repeatedly passes through the processing gas supply area the revolution of the substrate, and a control part configured to perform a calculation of a rotation speed of the substrate based on a parameter including a rotation speed of the rotary table to allow an orientation of the substrate to be changed whenever the substrate is positioned in the processing gas supply area, and to output a control signal for rotating the substrate at a calculated rotation speed. US20150059811 discloses a multiple stage processing device having a plurality of radial stages, each individual radial stage is positioned between adjacent dividing walls and indexable though a plurality of processing stations. A plurality of fixture mount assemblies are positioned on an actuation surface of the rotatable indexing assembly, each individual fixture mount assembly is associated with and mechanically coupled to an individual radial stage. One or more slotted drive hubs communicatively coupled to independently operable drive motors are positioned adjacent to the actuation surface of the rotatable indexing assembly and are engageable with the plurality of fixture mount assemblies. When an individual fixture mount assembly is engaged with an individual slotted drive hub, an individual independently operable drive motor can independently control the individual fixture mount assembly such that the individual radial stage mechanically coupled to the individual fixture mount assembly is moveably coupled to the independently operable drive motor. US6860965 discloses a wafer processing system has a loading station, a process module, and a load lock directly adjacent to the process module. The load lock has a small volume and can include integrated heating/cooling units. The load lock also has a wafer transfer mechanism for placing a wafer directly to the process module. The wafer processing system does not employ a transfer chamber to transport wafers between the load lock and the process module. Instead, a wafer is directly transferred from the load lock to the process module using the wafer transfer mechanism. Not requiring a transfer chamber not only improves the throughput of the wafer processing system, but also lowers its complexity and component count as well. The throughput of the wafer processing system is also improved by using a small volume load lock with integrated cooling/heating units. US6760976 discloses a method for a robotic semiconductor wafer processing system to correct for wafers that have become offset or off-center during wafer processing. This is accomplished by determining the amount of offset and re-centering the wafer during wafer transport to the next process station using a single station sensor to locate the wafer center point. Each single sensor located at each station activates when the wafer's edge traverses through the sensor's path. Directional coordinates for the measured designated points on the wafer's edge are calculated, and the intersection points of two circles, analytically derived from using the measured designated points as their centers, are determined. The intersection point closest to the true wafer center position represents the measured wafer's center point. This point is compared to the true wafer center position, and the wafer is then adjusted for this difference. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON LIN whose telephone number is (571)270-3175. The examiner can normally be reached on Monday-Friday 9:30 a.m. – 6:00 p.m. PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Robert E. Fennema can be reached on (571)272-2748. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JASON LIN/ Primary Examiner, Art Unit 2117
Read full office action

Prosecution Timeline

Oct 24, 2023
Application Filed
Apr 10, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12642306
ACTIVATION OF VAPORIZER DEVICES
3y 9m to grant Granted Jun 02, 2026
Patent 12645207
PRODUCTION MANAGEMENT SYSTEM, PRODUCTION MANAGEMENT METHOD, AND PRODUCTION MANAGEMENT PROGRAM
3y 4m to grant Granted Jun 02, 2026
Patent 12645200
SYSTEMS AND METHODS FOR ADMINISTERING A 3D-PRINTING-BASED MANUFACTURING PROCESS
2y 10m to grant Granted Jun 02, 2026
Patent 12638833
INDUSTRIAL MOVER SYSTEMS AND METHODS
3y 0m to grant Granted May 26, 2026
Patent 12638834
MANUFACTURING CONDITION OPTIMIZATION APPARATUS, COMPUTER PROGRAM PRODUCT, AND MANUFACTURING CONDITION OPTIMIZATION METHOD
2y 10m to grant Granted May 26, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
96%
With Interview (+23.7%)
3y 1m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 754 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month