Prosecution Insights
Last updated: April 19, 2026
Application No. 18/557,062

SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS

Non-Final OA §102
Filed
Oct 25, 2023
Examiner
PATEL, REEMA
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
95%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
971 granted / 1097 resolved
+20.5% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
38 currently pending
Career history
1135
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
40.8%
+0.8% vs TC avg
§102
25.9%
-14.1% vs TC avg
§112
22.0%
-18.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1097 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) was submitted on 10/25/23. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement has been considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 14 and 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kobayashi et al. (U.S. 2019/0181177 A1; “Kobayashi”). Regarding claim 14, Kobayashi discloses a solid-state imaging device comprising: A first pixel (left 21, Fig. 13) that is provided on a side of a first surface serving as a side from which light enters of a first base and includes a first photoelectric conversion element, and a second pixel (right 21, Fig. 13) that includes a second photoelectric conversion element and is disposed in a first direction on the first surface to be adjacent to the first pixel ([0167]-[0168]); A first signal terminal (32, Fig. 13, 15) that is provided in a region corresponding to a center portion of the first pixel (left 21, Fig. 13), on a side of a second surface opposite to the side of the first surface of the first base, and is coupled to the first pixel ([0167]-[0168]); A second signal terminal (32, Fig. 13, 15) that is provided in a region corresponding to a center portion of the second pixel (right 21, Fig. 13), on the side of the second surface of the first base, and is coupled to the second pixel ([0167]-[0168]); and A first shield terminal (37, Fig. 15) that is provided in a region corresponding to a side of the second pixel of a peripheral portion of the first pixel, on the side of the second surface of the first base, is formed to be entirely overlapped with the second signal terminal (32, Fig. 15) in a second direction on the second surface intersecting the first direction, as viewing the second signal terminal from the first signal terminal in the first direction, and is supplied with a fixed potential ([0167]-[068]). Regarding claim 16, Kobayashi discloses an electronic apparatus comprising: A solid-state imaging device, wherein the solid-state imaging device includes A first pixel (left 21, Fig. 13) that is provided on a side of a first surface serving as a side from which light enters of a first base and includes a first photoelectric conversion element, and a second pixel (right 21, Fig. 13) that includes a second photoelectric conversion element and is disposed in a first direction on the first surface to be adjacent to the first pixel ([0167]-[0168]), A first signal terminal (32, Fig. 13, 15) that is provided in a region corresponding to a center portion of the first pixel (left 21, Fig. 13), on a side of a second surface opposite to the side of the first surface of the first base, and is coupled to the first pixel, a second signal terminal (32, Fig. 13, 15) that is provided in a region corresponding to a center portion of the second pixel (right 21, Fig. 13), on the side of the second surface of the first base, and is coupled to the second pixel ([0167]-[0168]), and A first shield terminal (37, Fig. 15) that is provided in a region corresponding to a side of the second pixel of a peripheral portion of the first pixel, on the side of the second surface of the first base, is formed to be entirely overlapped with the second signal terminal in a second direction on the second surface intersecting the first direction, as viewing the second signal terminal from the first signal terminal in the first direction, and is supplied with a fixed potential ([0167]-[0168]). Allowable Subject Matter Claims 1-13 and 15 are allowed. Claims 1 and 15 contain allowable subject matter because of the limitation of a first shield terminal that is provided in a region corresponding to a side of the second pixel of a peripheral portion of the first pixel, on the side of the second surface of the first base, and is supplied with a fixed potential; and a second shield terminal that is provided in a region corresponding to a side of the first pixel of a peripheral portion of the second pixel, on the side of the second surface of the first base, is provided in a region displaced in a second direction on the second surface intersecting the first direction with respect to the first shield terminal, and is supplied with a fixed potential. Claims 2-13 depend on claim 1. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to REEMA PATEL whose telephone number is (571)270-1436. The examiner can normally be reached M-F, 8am-5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at (571)272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /REEMA PATEL/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Oct 25, 2023
Application Filed
Dec 27, 2025
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
95%
With Interview (+6.3%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 1097 resolved cases by this examiner. Grant probability derived from career allow rate.

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