Prosecution Insights
Last updated: April 19, 2026
Application No. 18/558,198

SEMICONDUCTOR CHIP, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC DEVICE

Non-Final OA §103
Filed
Oct 31, 2023
Examiner
HO, ANTHONY
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
93%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
1007 granted / 1110 resolved
+22.7% vs TC avg
Minimal +2% lift
Without
With
+2.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
38 currently pending
Career history
1148
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
31.8%
-8.2% vs TC avg
§102
40.5%
+0.5% vs TC avg
§112
16.1%
-23.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1110 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group 1, claims 1-12 and 15, in the reply filed on January 12, 2026 is acknowledged. Accordingly, claims 13 and 14 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on January 12, 2026. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on October 31, 2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Iguchi et al (US Pub 2013/0292646) in view of Yamashita et al (US Pub 2014/0376097). In re claim 1, Iguchi et al discloses a semiconductor chip comprising: an imaging element (i.e. layers 71, 79, 9, 17, 5, 4, 33 are considered an imaging element); a substrate (i.e. 1) provided on the imaging element; and a lens (i.e. 21) formed on the glass substrate, wherein the glass substrate has a groove (i.e. 22) around a region where the lens is formed (i.e. see at least Figure 9A). Iguchi et al does not explicitly disclose the substrate is a glass substrate. However, Yamashita et al discloses microlens 11 formed on a glass substrate 1 (i.e. see at least Figures 1 and 2 and paragraph 0049). The advantage is to obtain an imaging element package that can prevent noise generation (i.e. see at least paragraph 0014). Thus, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have modified the semiconductor chip as taught by Iguchi et al with the use of a glass substrate as taught by Yamashita et al in order to obtain an imaging element package that can prevent noise generation. In re claim 15, Iguchi et al discloses an electronic device comprising: a semiconductor chip (i.e. 50) including: an imaging element (i.e. layers 71, 79, 9, 17, 5, 4, 33 are considered an imaging element); a substrate (i.e. 1) provided on the imaging element; and a lens (i.e. 21) formed on the glass substrate; and the glass substrate having a groove (i.e. 22) around a region where the lens is formed (i.e. see at least Figure 9A), a signal processing circuit (i.e. ROIC) that processes signals from the semiconductor chip (i.e. see at least paragraph 0013). Iguchi et al does not explicitly disclose the substrate is a glass substrate. However, Yamashita et al discloses microlens 11 formed on a glass substrate 1 (i.e. see at least Figures 1 and 2 and paragraph 0049). The advantage is to obtain an imaging element package that can prevent noise generation (i.e. see at least paragraph 0014). Thus, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have modified the electronic device as taught by Iguchi et al with the use of a glass substrate as taught by Yamashita et al in order to obtain an imaging element package that can prevent noise generation. Claim(s) 2 and 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Iguchi et al (US Pub 2013/0292646) in view of Yamashita et al (US Pub 2014/0376097) as applied to claim 1 above, and further in view of Jeong et al (US Pub 2010/0044819). In re claim 2, Iguchi et al, as modified by Yamashita et al, as discussed above, does not explicitly disclose wherein a side surface of the groove is an inclined surface. However, Jeong et al discloses openings/grooves 205 in areas surrounding microlenses 228A (i.e. see at least Figures 2B, 2D), and wherein these openings/grooves 205 show an inclined surface (i.e. see at least Figures 2B, 2D). The advantage is to obtain an image sensor with enhanced photosensitivity and optical properties (i.e. see at least paragraph 0015). Thus, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have modified the semiconductor chip as taught by Iguchi et al, as modified by Yamashita et al, with wherein a side surface of the groove is an inclined surface as taught by Jeong et al in order to obtain an image sensor with enhanced photosensitivity and optical properties. In re claim 4, Iguchi et al, as modified by Yamashita et al, as discussed above, does not explicitly disclose wherein the groove has a curved bottom surface. However, Jeong et al discloses openings/grooves 205 in areas surrounding microlenses 228A (i.e. see at least Figures 2B, 2D), and wherein these openings/grooves 205 show a curved bottom surface (i.e. see at least Figures 2B, 2D). The advantage is to obtain an image sensor with enhanced photosensitivity and optical properties (i.e. see at least paragraph 0015). Thus, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have modified the semiconductor chip as taught by Iguchi et al, as modified by Yamashita et al, with wherein the groove has a curved bottom surface as taught by Jeong et al in order to obtain an image sensor with enhanced photosensitivity and optical properties. Allowable Subject Matter Claims 3 and 5-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTHONY HO whose telephone number is (571)270-1432. The examiner can normally be reached 9AM - 5PM, Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANTHONY HO/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Oct 31, 2023
Application Filed
Jan 26, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604478
SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
2y 5m to grant Granted Apr 14, 2026
Patent 12593662
ELECTRONIC DEVICE FOR DETECTING DEFECT IN SEMICONDUCTOR PACKAGE AND OPERATING METHOD THEREOF
2y 5m to grant Granted Mar 31, 2026
Patent 12575309
PRODUCTION METHOD FOR PATTERNED ORGANIC FILM, PRODUCTION APPARATUS FOR PATTERNED ORGANIC FILM, ORGANIC SEMICONDUCTOR DEVICE PRODUCED BY SAME, AND INTEGRATED CIRCUIT INCLUDING ORGANIC SEMICONDUCTOR DEVICE
2y 5m to grant Granted Mar 10, 2026
Patent 12575267
DISPLAY SUBSTRATE AND PREPARATION METHOD THEREFOR, AND DISPLAY APPARATUS
2y 5m to grant Granted Mar 10, 2026
Patent 12568758
LIGHT-EMITTING DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME
2y 5m to grant Granted Mar 03, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
93%
With Interview (+2.3%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1110 resolved cases by this examiner. Grant probability derived from career allow rate.

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