Prosecution Insights
Last updated: August 17, 2026
Application No. 18/560,477

IMAGE SENSOR

Non-Final OA §102§103
Filed
Nov 13, 2023
Priority
May 31, 2021 — JP 2021-091939 +1 more
Examiner
GRAY, AARON J
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Group Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
422 granted / 514 resolved
+14.1% vs TC avg
Strong +30% interview lift
Without
With
+30.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
20 currently pending
Career history
547
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
53.4%
+13.4% vs TC avg
§102
28.2%
-11.8% vs TC avg
§112
15.7%
-24.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 514 resolved cases

Office Action

§102 §103
Detailed Action Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species I in the reply filed on 05/08/2026 is acknowledged. Claim 4 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 05/08/2026. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “image sensor according to claim 8, wherein the second substrate further includes a readout circuit that outputs the pixel signal based on the electric charge output from the sensor pixel to the logic circuit” the “second semiconductor substrate including a logic circuit” as required by claim 8 where the second substrate must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: “Image Sensor having Thin Conducting Film in a Region having Air Gaps”. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-3, 5 and 8-10 is/are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Nagahama et. Al. (WO 2020179494 A1 hereinafter Nagahama) however, the examiner will use US Pre-Grant Publication/patent application US 20220123040 A1 as a translation of the WO document stated above. Hence, the rejection will use the paragraphs/columns and lines of US 20220123040 A1 for rejection purposes. Regarding claim 1, Nagahama teaches in Figs. 1 and 3 with associated text An image sensor comprising: a wiring layer including multiple wires 26 extending in one direction (into the page) (Fig. 30, [0136]); a first insulating layer 36 with air gaps 35 formed in at least some of regions between adjacent wires of the multiple wires (Fig. 30, [0140]); a first conducting film (47 over region including airgaps see annotated Fig. below) formed and embedded in a first surface of the first insulating layer in a first region (see annotated Fig. below) including the air gaps and the adjacent wires between which the air gaps have been formed; and a second conducting film (47 over region not including airgaps see annotated Fig. below) formed and embedded in the first surface of the first insulating layer in a second region (see annotated Fig. below) not including the air gaps and the adjacent wires between which the air gaps have been formed, the second conducting film being thicker than the first conducting film (see annotated Fig. below). PNG media_image1.png 207 501 media_image1.png Greyscale Regarding claim 2, Nagahama teaches respective surfaces of the first conducting film and the second conducting film are exposed on the first surface of the first insulating layer (Fig. 3 or 5B). Regarding claim 3, Nagahama teaches the first conducting film and the second conducting film are independent from each other with the first insulating layer between the first conducting film and the second conducting film (Fig. 3). Regarding claim 5, Nagahama teaches the first insulating layer is formed using a low-dielectric constant material having a relative dielectric constant k of 3.0 or lower ([0080]). Regarding claim 8, Nagahama teaches in Fig 1, 3 and 6 with associated text a first substrate 11 including a first semiconductor substrate 11 including a sensor pixel 12 that performs photoelectric conversion (Fig. 6, [0092]) and a first multi-layer wiring layer 56 including the wiring layer [Figs. 3 and 6, [0092]), the first insulating layer, the first conducting film, and the second conducting film [0092]; and a second substrate 31 including a second semiconductor substrate including a logic circuit 32 that processes a pixel signal based on an electric charge output from the sensor pixel (Fig. 6, [0094]) and a second multi-layer wiring layer 62 formed and embedded with one or more third conducting films on a second surface in a side opposite to a side of the second semiconductor substrate (Fig. 6, [0112]), wherein the first substrate and the second substrate are electrically coupled to each other by joining of the first conducting film and the second conducting film to the one or more third conducting films (Fig. 6, [0112]). Regarding claim 9, Nagahama teaches the first substrate further includes a third semiconductor substrate 21 provided with a readout circuit between the first semiconductor substrate (Fig. 6, [0092]) and the first multi-layer wiring layer, the readout circuit outputting the pixel signal based on the electric charge output from the sensor pixel to the logic circuit (Fig. 6, [0092] and [0094]). Regarding claim 10, Nagahama teaches in Fig 1, 3, 37C and 40 with associated text the second substrate 23024 further includes a readout circuit 23013 that outputs the pixel signal based on the electric charge output from the sensor pixel 23012 to the logic circuit 23014, and the readout circuit is provided in a region of the second semiconductor substrate opposed to a pixel part including the sensor pixel, and the logic circuit is provided in a region opposed to a peripheral part around the pixel part (Fig. 37C and 40). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Nagahama as applied to claim 1 and further in view of Noguchi et. Al. (US 20060281298 A1 hereinafter Noguchi). Regarding claim 6, Nagahama teaches the image sensor according to claim 1 . Nagahama does not specify a barrier film stacked on the wiring layer, an end surface of the barrier film being located above any of the multiple wires. Noguchi teaches in Fig. 26 with associated text a semiconductor device similar to that of Nagahama comprising a barrier film 47a stacked on the wiring layer, an end surface of the barrier film being located above any of multiple wires 26 (Fig. 3, [0078]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a barrier similar to that taught by Noguchi in the device of Nagahama because according to Noguchi such a barrier makes the buried interconnection comprising copper to not be in direct contact with the insulative film thereby suppressing or preventing copper in the buried interconnection from diffusing into the insulative film [0003]. Regarding claim 7, Nagahama teaches a second insulating layer 131 provided between the first insulating layer and the barrier film and extending over the end surface, upper and side surfaces of the multiple wires, and below the air gaps (Fig. 3, [0078]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AARON J GRAY whose telephone number is (571)270-7629. The examiner can normally be reached Monday-Friday 9am-4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Toledo Fernando can be reached on 5712721867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AARON J GRAY/Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Nov 13, 2023
Application Filed
Jul 27, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+30.5%)
2y 5m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 514 resolved cases by this examiner. Grant probability derived from career allowance rate.

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