Prosecution Insights
Last updated: May 29, 2026
Application No. 18/560,741

PRINTED CIRCUIT BOARD MODULE AND ELECTRONIC DEVICE

Non-Final OA §102§103§112
Filed
Nov 14, 2023
Priority
Jun 24, 2021 — RE 10-2021-0082697 +2 more
Examiner
TSO, STANLEY
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Innotek Co., Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
377 granted / 493 resolved
+8.5% vs TC avg
Strong +34% interview lift
Without
With
+34.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
24 currently pending
Career history
525
Total Applications
across all art units

Statute-Specific Performance

§103
91.2%
+51.2% vs TC avg
§102
6.1%
-33.9% vs TC avg
§112
1.9%
-38.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 493 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions No claims are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species II-VII, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 1/16/2026. EXAMINER'S AMENDMENT Claim 18 is amended based on Applicant’s reply filed on 1/16/2026. Claim 18 (Currently amended). The electronic device according to claim [[1]] 16, wherein the partition line includes a plurality of lines being disposed radially about the electronic component. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites: “a printed circuit board including a first area and a second area where a coating liquid is disposed on a surface; . . . wherein the partition line is disposed to be stepped with respect to a surface of the printed circuit board.” It is not clear whether “a surface of the printed circuit board” is the same element as “a surface”. Stated differently, it is not clear whether claim 1 should be construed as: “a printed circuit board including a first area and a second area where a coating liquid is disposed on a first surface; . . . wherein the partition line is disposed to be stepped with respect to a second surface of the printed circuit board” or whether it should be construed as: “a printed circuit board including a first area and a second area where a coating liquid is disposed on a surface; . . . wherein the partition line is disposed to be stepped with respect to [[a]] the surface In order to expedite prosecution, claim 1 is construed as: “a printed circuit board including a first area and a second area where a coating liquid is disposed on a surface; . . . wherein the partition line is disposed to be stepped with respect to [[a]] the surface All claims that depend from claim 1 are rejected because they depend from a rejected parent claim. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3-4, 7, 9-10, 13, 16 and 18-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by “Chang” (KR 20010064908). Regarding claim 1, Chang anticipates 1. A printed circuit board module comprising: a printed circuit board including a first area and a second area where a coating liquid is disposed on a surface (Figs., page 2, top, page 3, top; a cover coat 15 is coated on the outer periphery of the bond finger of the circuit board 10); an electronic component being disposed in the first area (Figs., page 3, bottom; a semiconductor chip 2 is disposed in the first area); and a partition line being disposed between the first area and the second area, wherein the partition line is disposed to be stepped with respect to [[a]] the surface(Figs., page 4, top; the ring 50 is disposed between the first and second area, and the ring 50 is stepped with respect to the surface. Examiner’s note: see the 112 rejection above for an explanation of the construction of this claim.). Regarding claim 3, Chang anticipates 3. The printed circuit board module according to claim 1, wherein the partition line includes a plurality of lines being disposed radially about the electronic component (Figs., page 4, top; the plurality of rings 50, 51 and 53 are disposed radially about the semiconductor chip 2). Regarding claim 4, Chang anticipates 4. The printed circuit board module according to claim 3, wherein a gap is formed between adjacent lines among the plurality of lines so as to be spaced apart from one another (Figs., page 4, top; a gap is formed between adjacent lines among the plurality of rings 50, 51 and 53 so as to be spaced apart from one another). Regarding claim 7, Chang anticipates 7. The printed circuit board module according to claim 3, wherein the plurality of lines includes: a first line being disposed outside the electronic component (Figs., page 4, top; the ring 53 is disposed outside the semiconductor chip 2); a second line being disposed outside the first line (Figs., page 4, top; the ring 51 is disposed outside the ring 53); and a third line being disposed outside the second line (Figs., page 4, top; the ring 50 is disposed outside the ring 51). Regarding claim 9, Chang anticipates 9. The printed circuit board module according to claim 1, wherein the electronic component and the partition line is spaced apart from each other (Figs., page 4, top; the semiconductor chip 2 and the ring 50 is spaced apart from each other). Regarding claim 10, Chang anticipates 10. The printed circuit board module according to claim 1, wherein the partition line has a rectangular cross-sectional shape (Figs., page 4, top; the ring 50 has a rectangular cross-sectional shape). Regarding claim 13, Chang anticipates 13. The printed circuit board module according to claim 1, wherein the partition line has a closed loop shape (Figs., page 4, top; the ring 50 has a closed loop shape). Regarding claim 16, Chang anticipates 16. An electronic device including: a housing (Figs., page 3, top; the semiconductor package 100 includes a housing of glass 40); and a printed circuit board module being disposed inside the housing (Figs., page 2, top, page 3, top; the circuit board 10 module is disposed inside the housing of glass 40), wherein the printed circuit board module includes: a printed circuit board including a first area and a second area (Figs., page 2, top, page 3, top; the circuit board 10 module includes a circuit board 10 and first and second areas); an electronic component being disposed in the first area (Figs., page 3, bottom; a semiconductor chip 2 is disposed in the first area); and a partition line being disposed between the first area and the second area, and wherein the partition line is disposed to be stepped with respect to a surface of the printed circuit board (Figs., page 4, top; the ring 50 is disposed between the first and second area, and the ring 50 is stepped with respect to the surface of the circuit board 10). Regarding claim 18, Chang anticipates 18. The electronic device according to claim [[1]] 16, wherein the partition line includes a plurality of lines being disposed radially about the electronic component (Figs., page 4, top; the plurality of rings 50, 51 and 53 are disposed radially about the semiconductor chip 2. Examiner’s note: see the Examiner’s amendment above for an explanation of the construction of this claim.). Regarding claim 19, Chang anticipates 19. The electronic device according to claim 18, wherein a gap is formed between adjacent lines among the plurality of lines so as to be spaced apart from one another (Figs., page 4, top; a gap is formed between adjacent lines among the plurality of rings 50, 51 and 53 so as to be spaced apart from one another). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 2, 14 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Chang in view of "Kimura" (US 2006/0261472). Regarding claims 2 and 17, Chang discloses the claimed invention as applied to claims 1 and 16, respectively, above. Chang discloses wherein the first area is an area where the coating liquid is not disposed (Figs., page 2, top, a cover coat 15 is coated on the outer periphery of the bond finger of the circuit board 10). Chang does not disclose the electronic component is soldered to the first area. Kimura discloses the electronic component is soldered to the first area (Figs. 1-4, [0049]; the electronic components 2a are soldered to the circuit board). It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Chang’s circuit board with Kimura’s circuit board module in order to offer multilayer modules in compact sizes regardless of the number of resin layers contained, as suggested by Kimura at [0015]. Regarding claim 14, Chang discloses the claimed invention as applied to claim 1, above. Chang does not disclose the limitations of claim 14. Kimura discloses 14. The printed circuit board module according to claim 1, wherein the electronic components are arranged in plural numbers in the first area (Figs. 1-4, [0049]; a plurality of electronic components 2a are arranged in a first area of the circuit board). It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Chang’s circuit board with Kimura’s circuit board module in order to offer multilayer modules in compact sizes regardless of the number of resin layers contained, as suggested by Kimura at [0015]. Claims 5-6, 15 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Chang Regarding claims 5 and 20, Chang discloses the claimed invention as applied to claims 3 and 18, respectively, above. Chang does not disclose the specific dimensions the rings 50, 51 and 53, therefore, Chang does not disclose the spacing between adjacent lines among the plurality of lines is smaller than the thickness of each line. It would have been obvious matter of design choice to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Chang’s circuit board with the spacing between rings 50, 51 and 53 is smaller than the thickness of ring since such sizing would have involved only routine experimentation. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding claim 6, Chang discloses the claimed invention as applied to claim 5, above. Chang does not disclose the specific dimensions the rings 50, 51 and 53, therefore, Chang does not disclose the thickness of each line is 0.2 mm to 0.4 mm, and wherein the spacing between adjacent lines is 0.05 mm to 0.15 mm. It would have been obvious matter of design choice to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Chang’s circuit board with the thickness of each of the rings 50, 51 and 53 is 0.2 mm to 0.4 mm and the spacing between adjacent rings is 0.05 mm to 0.15 mm since such sizing would have involved only routine experimentation. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding claim 15, Chang discloses the claimed invention as applied to claim 4, above. Chang does not disclose the specific dimensions the rings 50, 51 and 53, therefore, Chang does not disclose a thickness of each of the plurality of lines is three times or more than a thickness of the gap. It would have been obvious matter of design choice to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Chang’s circuit board with the thickness of each of the rings 50, 51 and 53 is three times or more than a thickness of the gap since such sizing would have involved only routine experimentation. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claims 8 and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Chang in view of "Yamada" (US 2005/0121310). Regarding claim 8, Chang discloses the claimed invention as applied to claim 1, above. Chang does not disclose the limitations of claim 8. Yamada discloses 8. The printed circuit board module according to claim 1, wherein the material of the partition line is silk (Fig. 5, [0031], the barrier ink dams 74 and 76 are constructed from silk-screen ink). It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Chang’s circuit board with Yamada’s circuit board barriers in order to restrict the flow of the liquid underfill material 15 which prevents the unwanted flow of the liquid coating to unwanted areas of the circuit board, as suggested by Yamada at [0031]. Regarding claim 11, Chang discloses the claimed invention as applied to claim 1, above. Chang does not disclose the limitations of claim 11. Yamada discloses 11. The printed circuit board module according to claim 1, wherein a coating area with a predetermined thickness is formed at an edge of the first area (Fig. 5, [0031], the barrier ink dams 74 and 76 form a coating of the liquid underfill material 15 with a predetermined thickness). It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Chang’s circuit board with Yamada’s circuit board barriers in order to restrict the flow of the liquid underfill material 15 which prevents the unwanted flow of the liquid coating to unwanted areas of the circuit board, as suggested by Yamada at [0031]. Regarding claim 12, Chang in view of Yamada discloses the claimed invention as applied to claim 11, above. Chang does not disclose the limitations of claim 12. Yamada discloses 12. The printed circuit board module according to claim 11, wherein a thickness of the coating area in the first area is same as a thickness of the partition line (Fig. 5, [0031], the barrier ink dams 74 and 76 form a coating of the liquid underfill material 15 with a thickness that matches the thickness of the barrier ink dams 74 and 76). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to STANLEY TSO whose telephone number is (571)270-0723. The examiner can normally be reached Tu-Thurs 6am-6pm, alt M 6am-2pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tim Thompson can be reached at 571-272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STANLEY TSO/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Nov 14, 2023
Application Filed
May 15, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+34.0%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 493 resolved cases by this examiner. Grant probability derived from career allowance rate.

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