Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The claim amendments traverse the 112 rejection of claims 1-15 which is hereby withdrawn.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 9, 11-12, 14 and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by "Yamada" (US 2005/0121310).
Regarding claim 1, Yamada anticipates 1. A printed circuit board module comprising: a printed circuit board including a first area and a second area where a coating liquid is disposed on a surface (Figs. 3-5, [0020]; the substrate 20 is a printed circuit board including a first area and a second area where an underfill material 15 is applied in liquid form, which is a coating liquid, is disposed on a surface of the substrate 20);
an electronic component being disposed in the first area (Figs. 3-5, [0030]; the pre-solder 44 is provided for making electrical contact with the electrical components such as capacitors that are disposed in the first area of the substrate);
and a partition line being disposed between the first area and the second area, wherein the partition line is disposed to be stepped with respect to the surface of the printed circuit board (Figs. 3-5, [0031]; the dams 74 and 76 are constructed from silk-screen ink and are disposed between the first area and the second area, wherein the dams 74 and 76 are disposed to be stepped with respect to the surface of the substrate 20),
wherein the electronic component is soldered to the first area (Figs. 3-5, [0030]; the pre-solder 44 is provided for making electrical contact with the electrical components such as capacitors that are disposed in the first area of the substrate),
wherein the first area is an area where the coating liquid is not disposed (Figs. 3-5, [0020]; the first area of the substrate 20 is an area where the underfill material 15 is not disposed),
and wherein a material of the partition line is silk (Fig. 5, [0031], the barrier ink dams 74 and 76 are constructed from silk-screen ink).
Regarding claim 9, Yamada anticipates 9. The printed circuit board module according to claim 1, wherein the electronic component and the partition line is spaced apart from each other (Figs. 3-5, [0030]-[0031]; the electrical components such as capacitors and the dams 74 and 76 are spaced apart from one another).
Regarding claim 11, Yamada anticipates 11. The printed circuit board module according to claim 1, wherein a coating area with a predetermined thickness is formed at an edge of the first area (Fig. 5, [0031], the barrier ink dams 74 and 76 form a coating of the liquid underfill material 15 with a predetermined thickness at an edge of the first area).
Regarding claim 12, Yamada anticipates 12. The printed circuit board module according to claim 11, wherein a thickness of the coating area in the first area is same as a thickness of the partition line (Fig. 5, [0031], the barrier ink dams 74 and 76 form a coating of the liquid underfill material 15 with a thickness that matches the thickness of the barrier ink dams 74 and 76).
Regarding claim 14, Yamada anticipates 14. The printed circuit board module according to claim 1, wherein the electronic components are arranged in plural numbers in the first area (Figs. 4-5, [0030]; a plurality of the pre-solder 44 units are provided for making electrical contact with a plurality of the electrical components such as capacitors that are arranged in the first area of the substrate.
Regarding claim 16, Yamada anticipates 16. An electronic device including: a housing; and a printed circuit board module being disposed inside the housing (Figs. 3-5, [0020], [0047]; the substrate 20 is a printed circuit board module being disposed inside a computer, e.g., desktop, laptop, etc. which is a housing),
wherein the printed circuit board module includes: a printed circuit board including a first area and a second area (Figs. 3-5, [0020]; the substrate 20 is a printed circuit board including a first area and a second area);
an electronic component being disposed in the first area (Figs. 3-5, [0030]; the pre-solder 44 is provided for making electrical contact with the electrical components such as capacitors that are disposed in the first area of the substrate);
and a partition line being disposed between the first area and the second area, and wherein the partition line is disposed to be stepped with respect to a surface of the printed circuit board (Figs. 3-5, [0031]; the dams 74 and 76 are constructed from silk-screen ink and are disposed between the first area and the second area, wherein the dams 74 and 76 are disposed to be stepped with respect to the surface of the substrate 20),
wherein the electronic component is soldered to the first area (Figs. 3-5, [0030]; the pre-solder 44 is provided for making electrical contact with the electrical components such as capacitors that are disposed in the first area of the substrate),
wherein the first area is an area where the coating liquid is not disposed (Figs. 3-5, [0020]; the first area of the substrate 20 is an area where the underfill material 15 is not disposed),
and wherein a material of the partition line is silk (Fig. 5, [0031], the barrier ink dams 74 and 76 are constructed from silk-screen ink).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 3-7, 10, 13, 15 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Yamada in view of “Chang” (KR 20010064908).
Regarding claim 3, Yamada discloses the claimed invention as applied to claim 1, above.
Yamada does not disclose the limitations of claim 3.
Chang discloses 3. The printed circuit board module according to claim 1, wherein the partition line includes a plurality of lines being disposed radially about the electronic component (Figs., page 4, top; the plurality of rings 50, 51 and 53 are disposed radially about the semiconductor chip 2).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Yamada’s circuit board with Chang’s circuit board dam configuration in order to provide for greater protection for the circuit pattern by configuring he dam to completely surround the electronic component, as suggested by Chang at Abstract and Fig. 2.
Regarding claim 4, Yamada in view of Chang discloses the claimed invention as applied to claim 3, above.
Yamada discloses 4. The printed circuit board module according to claim 3, wherein a gap is formed between adjacent lines among the plurality of lines so as to be spaced apart from one another (Figs. 3-5, [0031]; a gap is formed between adjacent lines among the plurality of the dams 74 and 76 so as to be spaced apart from one another).
Regarding claim 5, Yamada in view of Chang discloses the claimed invention as applied to claim 3, above.
Yamada does not disclose the specific dimensions the dams 74 and 76, therefore, Yamada does not disclose the spacing between adjacent lines among the plurality of lines is smaller than the thickness of each line.
It would have been obvious matter of design choice to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Yamada’s circuit board, as modified by Chang, with the spacing between dams 74, 76 is smaller than the thickness of dams since such sizing would have involved only routine experimentation. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 6, Yamada in view of Chang discloses the claimed invention as applied to claim 5, above.
Yamada does not disclose the specific dimensions the dams 74, 76, therefore, Chang does not disclose the thickness of each line is 0.2 mm to 0.4 mm, and wherein the spacing between adjacent lines is 0.05 mm to 0.15 mm.
It would have been obvious matter of design choice to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Yamada’s circuit board, as modified by Chang, with the thickness of each of the dams 74, 76 is 0.2 mm to 0.4 mm and the spacing between adjacent rings is 0.05 mm to 0.15 mm since such sizing would have involved only routine experimentation. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 7, Yamada in view of Chang discloses the claimed invention as applied to claim 3, above.
Chang discloses 7. The printed circuit board module according to claim 3, wherein the plurality of lines includes: a first line being disposed outside the electronic component (Figs., page 4, top; the ring 53 is disposed outside the semiconductor chip 2);
a second line being disposed outside the first line (Figs., page 4, top; the ring 51 is disposed outside the ring 53);
and a third line being disposed outside the second line (Figs., page 4, top; the ring 50 is disposed outside the ring 51).
Regarding claim 10, Yamada discloses the claimed invention as applied to claim 1, above.
Yamada does not disclose the limitations of claim 10.
Chang discloses 10. The printed circuit board module according to claim 1, wherein the partition line has a rectangular cross-sectional shape (Figs., page 4, top; the ring 50 has a rectangular cross-sectional shape).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Yamada’s circuit board with Chang’s circuit board dam configuration in order to provide for greater protection for the circuit pattern by configuring he dam to completely surround the electronic component, as suggested by Chang at Abstract and Fig. 2.
Regarding claim 13, Yamada discloses the claimed invention as applied to claim 1, above.
Yamada does not disclose the limitations of claim 13.
Chang discloses 13. The printed circuit board module according to claim 1, wherein the partition line has a closed loop shape (Figs., page 4, top; the ring 50 has a closed loop shape).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Yamada’s circuit board with Chang’s circuit board dam configuration in order to provide for greater protection for the circuit pattern by configuring he dam to completely surround the electronic component, as suggested by Chang at Abstract and Fig. 2.
Regarding claim 15, Yamada in view of Chang discloses the claimed invention as applied to claim 4, above.
Yamada does not disclose the specific dimensions the dams 74, 76, therefore, Yamada does not disclose a thickness of each of the plurality of lines is three times or more than a thickness of the gap.
It would have been obvious matter of design choice to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Yamada’s circuit board, as modified by Chang, with the thickness of each of the dams 74, 76 is three times or more than a thickness of the gap since such sizing would have involved only routine experimentation. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 18, Yamada discloses the claimed invention as applied to claim 16, above.
Yamada does not disclose the limitations of claim 18.
Chang discloses 18. The electronic device according to claim 16, wherein the partition line includes a plurality of lines being disposed radially about the electronic component (Figs., page 4, top; the plurality of rings 50, 51 and 53 are disposed radially about the semiconductor chip 2).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Yamada’s circuit board with Chang’s circuit board dam configuration in order to provide for greater protection for the circuit pattern by configuring he dam to completely surround the electronic component, as suggested by Chang at Abstract and Fig. 2.
Regarding claim 19, Yamada in view of Chang discloses the claimed invention as applied to claim 18, above.
Yamada discloses 19. The electronic device according to claim 18, wherein a gap is formed between adjacent lines among the plurality of lines so as to be spaced apart from one another (Figs. 3-5, [0031]; a gap is formed between adjacent lines among the plurality of the dams 74 and 76 so as to be spaced apart from one another).
Regarding claim 20, Yamada in view of Chang discloses the claimed invention as applied to claim 18, above.
Yamada does not disclose the specific dimensions the dams 74 and 76, therefore, Yamada does not disclose the spacing between adjacent lines among the plurality of lines is smaller than the thickness of each line.
It would have been obvious matter of design choice to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Yamada’s circuit board, as modified by Chang, with the spacing between dams 74, 76 is smaller than the thickness of dams since such sizing would have involved only routine experimentation. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Claims 1, 9, 11-12, 14 and 16 are alternately rejected under 35 U.S.C. 103 as being unpatentable over Yamada in view of “Kobari” (US 4,767,892).
Regarding independent claims 1 and 16, in the event that a tribunal decides that Yamada does not disclose “a material of the partition line is silk” as recited in each of claims 1 and 16, Kobari teaches a printed wiring board 1 having a barrier 5 made from silk screen printing using liquid silk ink. Fig. 1, col. 2, lines 23-33
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Yamada’s circuit board with Kobari’s silk ink in order to provide for a quick-set to enable the production of a solder-resist barrier at a desired height without its spreading out with time, as suggested by Kobari at col. 1, lines 55-61.
Dependent claims 9, 11-12 and 14 depend from claim 1 and are alternately rejected under 103 over Yamada in view of Kobari for the same reasoning as set forth in the 102 rejections above.
Claims 3-7, 10, 13, 15 and 18-20 are alternately rejected under 35 U.S.C. 103 as being unpatentable over Yamada in view of Chang and Kobari.
Dependent claims 3-7, 10, 13, 15 and 18-20 depend from claims 1 and 16, respectively, and are alternately rejected under 35 U.S.C. 103 as being unpatentable over Yamada in view of Chang and Kobari for the same reasoning as set forth in the 103 rejections above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STANLEY TSO whose telephone number is (571)270-0723. The examiner can normally be reached Tu-Thurs 6am-6pm, alt M 6am-2pm.
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/STANLEY TSO/Primary Examiner, Art Unit 2847
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