Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections 35 U.S.C. § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-12 are rejected under 35 U.S.C. 103 as being unpatentable over Hwangbo et. al., (US Pub. 20170373108), Roy et. al. (US Pub. 20210020675) and Hiramatsu et al. (WO2020262131A1), hereinafter referred to as Hiramatsu.
Regarding claim 1, Hwangbo teaches a solid-state imaging element (Hwangbo, Fig 5A)
comprising: a semiconductor layer including a plurality of photoelectric conversion sections disposed in a matrix (Hwangbo, Fig. 5A, PD); and a separation region that separates the photoelectric conversion sections adjacent to each other in the semiconductor layer (Hwangbo, Fig. 5A, 40(41, 43) and 45)
wherein the separation region includes: a wall-like electrode disposed in a wall shape (Hwangbo, Fig. 5A, 43), a negative bias voltage being applied to the wall-like electrode (par 66); and a low absorption member (Hwangbo, Fig. 5A, 45) disposed further on a light incident side than the wall- like electrode (Hwangbo, Fig. 5A) and having a light absorption rate smaller than a light absorption rate of the wall-like electrode (para. 63, para.80).
Examiner’s Note: Para. 80 shows that 45 is made from silicon oxide, while para. 63 shows that 43 is made from doped polysilicon. Because the prior art teaches the same materials as claims 4 and 5, the light absorption rate of the low light absorption member is lower than the light absorption rate of the wall like electrode.
Hwangbo does not teach wherein the photoelectric conversion sections include a first region adjacent to the wall-like electrode and a second region adjacent to the low absorption member, wherein an impurity concentration of the second region of the photoelectric conversion sections is lower than impurity concentration of the first region of the photoelectric conversion sections, wherein the wall-like electrode extends to a first depth from a surface opposite a light incident surface of the semiconductor layer, and wherein the first region of the photoelectric conversion sections extends to the first depth from the surface opposite the light incident surface of the semiconductor layer.
However, However, Roy teaches wherein the photoelectric conversion sections include a first region (Roy, Fig 1B, 110) adjacent to the wall- like electrode (Fig 1B, 115 and a second region (Roy, Fig. 1B, 105) adjacent to the low absorption member(Fig 1B, 116), and impurity concentration of the second region is lower than impurity concentration of the first region (Roy, para. 67).
Therefore it would have been obvious to a person of ordinary skill in the art prior to the filing date of the application to combine the teachings of Hwangbo and Roy and create a charge collection region to collect photogenerated charges and prevent defects.
Additionally, Hiramatsu teaches an imaging device wherein the wall-like electrode (Hiramatsu, 360a, Fig. 83, para. 273) penetrates partway through the semiconductor layer (Hiramatsu 100S, Fig. 83, para.273) and a first and second region of the semiconductor layer (Hiramatsu, 115, 114, Fig. 6, para. 48). Hiramatsu does not explicitly teach that the first region of the photoelectric conversion sections extends to the same depth as the wall like electrode.
However, Hiramatsu does teach the ratio of the lengths of the embedded electrode (Hiramatsu, 360a, Fig. 83) and the pixel separation section (Hiramatsu 117b, Fig. 83) is not particularly limited. In order avoid hindering the miniaturization of the device (Hiramatsu para. 4) it would have been obvious to a person of ordinary skill in the art prior to the filing date of the application to have conducted routine experimentation to determine the optimal relationship between the first portion and the electrode.
Regarding claim 3, modified Hwangbo teaches the solid-state imaging element according to claim 1, but does not specifically teach wherein the low absorption member is disposed up to a depth of 800 (nm) or more from a light incident surface of the semiconductor layer.
Hwangbo acknowledges the utility of a gap fill insulator filling a portion of each of the deep trenches. In order to prevent cross-talk between photoelectric conversion sections it would have been obvious to a person of ordinary skill in the art prior to the filing date of the application to have conducted routing experimentation to determine the optimal depth to dispose the gap-fill insulator and still allow for the proper function of the gate electrode.
Regarding claim 4, modified Hwangbo teaches the solid-state imaging element according to claim 1. Hwangbo further teaches wherein the wall-like electrode is configured using one selected out of polysilicon, tungsten, and aluminum as a main component (Hwangbo, para. 63).
Regarding claim 5, modified Hwangbo teaches he solid-state imaging element according to claim 1. Hwangbo further teaches wherein the low absorption member is configured using one selected out of silicon oxide, hafnium oxide, aluminum oxide, and titanium oxide as a main component (Hwangbo, para. 80).
Regarding claim 6, modified Hwangbo teaches the solid-state imaging element according to claim 1 further comprising a plurality of on-chip lenses (Hwangbo, 80, Fig. 5A, para. 61) that make light incident on the photoelectric conversion sections corresponding thereto.
Regarding claim 10, modified Hwangbo teaches the solid-state imaging element according to claim 1, wherein the low absorption layer (Hiramatsu, 117b, Fig. 83, para. 273) extends from the first depth from the surface opposite the light incident surface of the semiconductor layer to the light incident surface of the semiconductor layer, and wherein the second region (Hiramatsu, 114, Fig. 6, para. 48) of the photoelectric conversion sections extends from the first depth from the surface opposite the light incident surface of the semiconductor layer to the light incident surface of the semiconductor layer.
Regarding claim 7, Hwangbo teaches a method of manufacturing a solid-state imaging element, comprising: a step of forming photoelectric conversion sections (Hwangbo, PD, Fig. 6B, para. 73); a step of forming a trench on a surface on a side opposite to a light incident side of a semiconductor substrate (Hwangbo, Fig 7A, Td, para. 74); wherein the trench separates adjacent photoelectric conversion sections from one another (Hwangbo, Td, Fig. 5A); a step of filling the trench with a low absorption member up to given depth from a bottom of the trench (Hwangbo, Fig 7A/B, 45, para. 79-81); a step of forming an insulating film on a side surface of the trench from the given depth to an opening of the trench (Hwangbo, Fig 7C, 43, para. 82); a step of filling a remaining part of the trench with a conductive wall-like electrode (Hwangbo, Fig 7C, 41, para. 82); and a step of forming a wiring layer (Hwangbo, Fig. 7D, 50, 60) on the surface on the side opposite to the light incident side of the semiconductor substrate (Hwangbo, para. 83, examiner notes that the wiring layer of the incident application (32) is in the same location as the prior art) wherein a wire formed in the wiring layer is connected to the wall-like electrode (Hwangbo, Fig 7D, 36 Page 5, para. 83), and the low absorption member (Hwangbo, Fig 7D. 45, para. 80) has a light absorption rate smaller than a light absorption rate of the wall-like electrode (Hwangbo Fig. 7D, 43, para. 62-63).
Hwangbo does not teach wherein the photoelectric conversion sections include a first region adjacent to the wall-like electrode and a second region adjacent to the low absorption member, wherein an impurity concentration of the second region of the photoelectric conversion sections is lower than impurity concentration of the first region of the photoelectric conversion sections, wherein the wall-like electrode extends to a first depth from a surface opposite a light incident surface of the semiconductor layer, and wherein the first region of the photoelectric conversion sections extends to the first depth from the surface opposite the light incident surface of the semiconductor layer.
However, Roy teaches a method of manufacture wherein the trench (Roy, 800, Fig. 9c, para. 112-113) is etched to at a depth at least equal to the desired depth of the substrate in the manufactured sensor. Roy also teaches wherein the photoelectric conversion sections include a first region (Roy, Fig 1B, 110) adjacent to the wall- like electrode (Fig 1B, 115 and a second region (Roy, Fig. 1B, 105) adjacent to the low absorption member(Fig 1B, 116), and impurity concentration of the second region is lower than impurity concentration of the first region (Roy, para. 67).
Therefore it would have been obvious to a person of ordinary skill in the art prior to the filing date of the application to combine the teachings of Hwangbo and Roy and create a charge collection region to collect photogenerated charges and prevent defects.
Additionally, Hiramatsu teaches an imaging device wherein the wall-like electrode (Hiramatsu, 360a, Fig. 83, para. 273) penetrates partway through the semiconductor layer (Hiramatsu 100S, Fig. 83, para.273) and a first and second region of the semiconductor layer (Hiramatsu, 115, 114, Fig. 6, para. 48). Hiramatsu does not explicitly teach that the first region of the photoelectric conversion sections extends to the same depth as the wall like electrode.
However, Hiramatsu does teach the ratio of the lengths of the embedded electrode (Hiramatsu, 360a, Fig. 83) and the pixel separation section (Hiramatsu 117b, Fig. 83) is not particularly limited. In order avoid hindering the miniaturization of the device (Hiramatsu para. 4) it would have been obvious to a person of ordinary skill in the art prior to the filing date of the application to have conducted routine experimentation to determine the optimal relationship between the first portion and the electrode.
Regarding claim 11. modified Hwangbo teaches method of manufacturing
according to claim 7, wherein the low absorption layer (Hwangbo, 117b, Fig. 83, para. 273) extends from the first depth from the surface opposite the light incident surface of the semiconductor layer to the light incident surface of the semiconductor layer, and wherein the second region (Hiramatsu, 114, Fig. 83, para. 48) of the photoelectric conversion sections extends from the first depth from the surface opposite the light incident surface of the semiconductor layer to the light incident surface of the semiconductor layer.
Regarding claim 9, Hwangbo teaches electronic equipment, comprising: a solid-state imaging element (Hwangbo, Fig 8, 900, Page 5, para. 85-86); an optical system (Hwangbo, Fig. 8, 910) that captures incident light from a subject and forms an image on an imaging surface of the solid-state imaging element (Page 5, para. 86-87); and a signal processing circuit (Hwangbo, Fig. 8, 912) that performs processing on an output signal from the solid-state imaging element (Hwangbo, para. 86-87), wherein the solid-state imaging element includes(Hwangbo, Fig. 5A); a semiconductor layer including a plurality of photoelectric conversion (Hwangbo, Fig. 5A, PD) sections disposed in a matrix; and a separation region (Hwangbo, Fig. 5A, 40, 45) that separates the photoelectric conversion sections adjacent to each other in the semiconductor layer, and the separation region includes: a wall-like electrode disposed in a wall shape (Hwangbo, Fig. 5A, 43), a negative bias voltage being applied to the wall-like electrode (Hwangbo, para. 70); and a low absorption member (Hwangbo, Fig. 5A, 45) disposed further on a light incident side than the wall- like electrode (Hwangbo, fig. 5A), the low absorption member having a light absorption rate smaller than a light absorption rate of the wall-like electrode (paras. 62 and 80).
Examiner’s Note: Para. 62 shows that 45 is made from silicon oxide, while para. 63 shows that 43 is made from doped polysilicon. Because the prior art teaches the same materials as claims 4 and 5, therefore the light absorption rate of the low light absorption member is lower than the light absorption rate of the wall like electrode.
Hwangbo does not teach wherein the photoelectric conversion sections include a first region adjacent to the wall-like electrode and a second region adjacent to the low absorption member, wherein an impurity concentration of the second region of the photoelectric conversion sections is lower than impurity concentration of the first region of the photoelectric conversion sections, wherein the wall-like electrode extends to a first depth from a surface opposite a light incident surface of the semiconductor layer, and wherein the first region of the photoelectric conversion sections extends to the first depth from the surface opposite the light incident surface of the semiconductor layer.
However, However, Roy teaches wherein the photoelectric conversion sections include a first region (Roy, Fig 1B, 110) adjacent to the wall- like electrode (Fig 1B, 115 and a second region (Roy, Fig. 1B, 105) adjacent to the low absorption member(Fig 1B, 116), and impurity concentration of the second region is lower than impurity concentration of the first region (Roy, para. 67).
Therefore it would have been obvious to a person of ordinary skill in the art prior to the filing date of the application to combine the teachings of Hwangbo and Roy and create a charge collection region to collect photogenerated charges and prevent defects.
Additionally, Hiramatsu teaches an imaging device wherein the wall-like electrode (Hiramatsu, 360a, Fig. 83, para. 273) penetrates partway through the semiconductor layer (Hiramatsu 100S, Fig. 83, para.273) and a first and second region of the semiconductor layer (Hiramatsu, 115, 114, Fig. 6, para. 48). Hiramatsu does not explicitly teach that the first region of the photoelectric conversion sections extends to the same depth as the wall like electrode.
However, Hiramatsu does teach the ratio of the lengths of the embedded electrode (Hiramatsu, 360a, Fig. 83) and the pixel separation section (Hiramatsu 117b, Fig. 83) is not particularly limited. In order avoid hindering the miniaturization of the device (Hiramatsu para. 4) it would have been obvious to a person of ordinary skill in the art prior to the filing date of the application to have conducted routine experimentation to determine the optimal relationship between the first portion and the electrode.
Regarding claim 12, modified Hwangbo teaches the electronic equipment according to claim 9, wherein the low absorption layer (Hwangbo, 117b, Fig. 83, para. 273) extends from the first depth from the surface opposite the light incident surface of the semiconductor layer to the light incident surface of the semiconductor layer, and wherein the second region (Hiramatsu, 114, Fig. 83, para. 48) of the photoelectric conversion sections extends from the first depth from the surface opposite the light incident surface of the semiconductor layer to the light incident surface of the semiconductor layer.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Mase et al. (US Pub. 20200168656) teaches a light detection device wherein the photoelectric conversion element has two semiconductor layers.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIERAN M CUNNINGHAM whose telephone number is (571)272-9654. The examiner can normally be reached Mon-Fri 8:00-4:3.
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/KIERAN M. CUNNINGHAM/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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