DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The abstract of the disclosure is objected to because the reference numerals/letters are unnecessary or may not correlate to a figure printed on the first page of a patent publication. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-7 and 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Imai et al. (5,127,983; hereinafter, “Imai”) in view of Korenstein et al. (US 2012/0153294 A1; hereinafter, “Korenstein”).
Regarding claim 1:
Imai discloses wafer 1 e.g., in Columns 7-8, see TABLE 2, wherein at least items No. 1 and No. 4 have an Rmax of 10nm or less).
Imai further discloses such smooth, single-crystalline diamond substrates are well suited for electronic components because they have excellent heat conductivity, transparency and are excellent electric insulators (Col. 1, lines 18-20, 27-38, and 55-58); however, Imai does not explicitly disclose a semiconductor of a different type bonded to the mosaic diamond wafer.
Korenstein teaches a semiconductor 32 (Fig. 2 and [0038]) of a different type bonded to a diamond substrate 19 (Fig. 2 and [0036]), wherein the diamond substrate functions as a heat sink [0034].
It would have been obvious to one of ordinary skill in the art to bond a semiconductor of a different type onto Imai’s diamond substrate because Imai teaches the diamond substrate would function as a heat sink.
Regarding claims 2-4, 9 and 10:
Imai (in view of Korenstein) discloses:
re claim 2, the bonded body comprising a mosaic diamond wafer and a semiconductor of a different type according to Claim 1, wherein the semiconductor of a different type 32 (Korenstein, Fig. 2) is one selected from the group consisting of gallium nitride (in Fig. 2, element “32” is GaN), gallium oxide, silicon and silicon carbide;
re claim 3, the bonded body comprising a mosaic diamond wafer and a semiconductor of a different type according to Claim 1, wherein the mosaic diamond wafer and the semiconductor of a different type are directly bonded with each other (e.g., Korenstein [0004]);
re claim 4, the bonded body comprising a mosaic diamond wafer and a semiconductor of a different type according to Claim 1, wherein the mosaic diamond wafer and the semiconductor of a different type are bonded with each other through an interlayer (i.e., Korenstein discloses it was very well known and typical in the art to bond a diamond heat sink to a semiconductor chip through an interlayer [0002]; accordingly, one of ordinary skill in the art would have readily recognized that a semiconductor of a different type could be bonded to Imai’s diamond substrate through an interlayer because Korenstein discloses it was well known and typical in the art to do so if so desired, i.e., given Korenstein, one of ordinary skill in the art would have readily recognized that a semiconductor of a different type could be bonded directly, or through an interlayer, because Korenstein discloses both types of bonding are suitable for a diamond wafer bonded to a semiconductor of a different type);
re claim 9, the bonded body comprising a mosaic diamond wafer and a semiconductor of a different type according to Claim 2, wherein the mosaic diamond wafer and the semiconductor of a different type are directly bonded with each other (e.g., Korenstein [0004]); and
re claim 10, the bonded body comprising a mosaic diamond wafer and a semiconductor of a different type according to Claim 2, wherein the mosaic diamond wafer and the semiconductor of a different type are bonded with each other through an interlayer (i.e., Korenstein discloses it was very well known and typical in the art to bond a diamond heat sink to a semiconductor chip through an interlayer [0002]; accordingly, one of ordinary skill in the art would have readily recognized that a semiconductor of a different type could be bonded to Imai’s diamond substrate through an interlayer because Korenstein discloses it was well known and typical in the art to do so if so desired, i.e., given Korenstein, one of ordinary skill in the art would have readily recognized that a semiconductor of a different type could be bonded directly, or through an interlayer, because Korenstein discloses both types of bonding are suitable for a diamond wafer bonded to a semiconductor of a different type).
Therefore, Imai (in view of Korenstein) renders claims 2-4, 9 and 10 obvious.
Regarding claim 5:
Imai discloses a method
a step of selecting a mosaic diamond wafer 1 (Fig. 6) which has a coalescence boundary between a plurality of single-crystal diamond substrates 3 (Figs. 5-6) and in which a maximum level difference on a bonding surface of the mosaic diamond wafer with the semiconductor of a different type is 10 nm or less (e.g., in Col. 7-8, see TABLE 2, wherein at least items No. 1 and No. 4 have an Rmax of 10nm or less).
Imai further discloses such smooth, single-crystalline diamond substrates are well suited for electronic components because they have excellent heat conductivity, transparency and are excellent electric insulators (Col. 1, lines 18-20, 27-38, and 55-58); however, Imai does not explicitly disclose a bonded body comprising a semiconductor of a different type bonded to the mosaic diamond wafer.
Korenstein teaches a semiconductor 32 (Fig. 2 and [0038]) of a different type bonded to a diamond substrate 19 (Fig. 2 and [0036]), wherein the diamond substrate functions as a heat sink [0034].
It would have been obvious to one of ordinary skill in the art to bond a semiconductor of a different type onto Imai’s diamond substrate because Imai teaches the diamond substrate would function as a heat sink.
Regarding claim 6:
Imai discloses a method for producing
a step of preparing a mosaic diamond wafer having a coalescence boundary between a
plurality of single-crystal diamond substrates; and
a step of polishing (Col. 8, line 8) a surface of the mosaic diamond wafer until a maximum level difference in the coalescence boundary becomes 10 nm or less (e.g., in Col. 7-8, see TABLE 2, wherein at least items No. 1 and No. 4 have an Rmax of 10nm or less).
Imai further discloses such smooth, single-crystalline diamond substrates are well suited for electronic components because they have excellent heat conductivity, transparency and are excellent electric insulators (Col. 1, lines 18-20, 27-38, and 55-58); however, Imai does not explicitly disclose a bonded body comprising a semiconductor of a different type bonded to the mosaic diamond wafer.
Korenstein teaches a semiconductor 32 (Fig. 2 and [0038]) of a different type bonded to a diamond substrate 19 (Fig. 2 and [0036]), wherein the diamond substrate functions as a heat sink [0034].
It would have been obvious to one of ordinary skill in the art to bond a semiconductor of a different type onto Imai’s diamond substrate because Imai teaches the diamond substrate would function as a heat sink.
Regarding claims 7 and 11:
Imai (in view of Korenstein) discloses the method for producing a bonded body comprising a mosaic diamond wafer and a semiconductor of a different type according to Claims 5 and 6, the method comprising:
a step of fabricating an epitaxial substrate 20 (Korenstein, Fig. 2 and [0037]) having a layer of a semiconductor of a different type 28/32 (GaN) epitaxially grown [0037-0038] on a main surface of a growth substrate 22;
a step of attaching the epitaxial substrate 20 on a support substrate (Korenstein, Fig. 2 and [0038], i.e., a handle wafer is not shown) through an adhesive layer (e.g., glue in [0038]);
a step of removing the growth substrate 22 to expose the layer of the semiconductor of a
different type 28/32 (Korenstein, [0038]);
a step of bonding the layer of the semiconductor of a different type 28/32 (Korenstein, Fig. 2 and [0039]) and a polished surface of the mosaic diamond wafer 19 [0039]; and
a step of removing the adhesive layer (see last sentence in [0039] in Korenstein) to obtain a bonded body comprising the mosaic diamond wafer and the semiconductor of a different type.
Therefore, Imai (in view of Korenstein) renders claims 7 and 11 obvious.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. There references listed on the attached PTO-892 disclose mosaic diamond wafers and/or bonded body comprising a diamond wafer having some similarities to the current invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEX H MALSAWMA whose telephone number is (571)272-1903. The examiner can normally be reached M-F (4-12 Hours, between 5:30AM-10PM).
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/LEX H MALSAWMA/Primary Examiner, Art Unit 2892