DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. For example, a more descriptive title could be, “DISPLAY PANELS AND DISPLAY DEVICES WITH TOUCH TRACES AND AC DRIVING SIGNAL LINES OVERAPPING SHIELD PARTS”.
The disclosure is objected to because of the following informalities:
In paragraph [0040] of the specification, it appears “connection parts C.” should read “connection parts L.”.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2019/0129551 A1; hereinafter, “Lee”) in view of Qing et al. (US 2016/0125803 A1; hereinafter, “Qing”) and Lee et al. (US 2014/0332769 A1; hereinafter, “Lee-II”).
Regarding claims 1 and 18:
Lee discloses a display panel (and display device, comprising a display panel, wherein the display panel), comprising (comprises) a display area A/A (Fig. 18 and [0072]) and a non-display area (area outside of A/A in Fig.18, or area outside of “A/A/Touch Area” in Fig. 13) adjoining to the display area, wherein the non-display area comprises a wiring area (e.g., at the sides and bottom of Fig. 13, a wiring area would be the area at the sides of C/A and between “C/A” and pads “TPd/TPs/DP/TPs”) and a bonding area (in Fig. 13, a bonding area would be the pads “TPd/TPs/DP/TPs”) located on a side of the wiring area away from the display area, the wiring area comprises a first wiring area (on a left side of C/A in Fig. 13) and a second wiring area (between C/A and pads TPd/TPs/DP/TPs on the bottom of Fig. 13) adjoining to each other,
wherein the display panel further comprises:
a substrate PI (Fig. 18 and [0048-0049]);
a first conductive layer GL (Figs. 1, 4 and [0057-0058]) disposed on the substrate and comprising the driving signal lines [0058];
a second conductive layer E2 (i.e., layer for common/second electrode in Figs. 4, 18, [0155]) disposed on a side of the first conductive layer away from the substrate (i.e., in Fig. 18, in a typical, functional display, the driving/scanning signal lines GL will be below the common electrode layer E2) and comprising a plurality of power signal lines (e.g., in Fig. 18, each “EL” has an electrode E2),
a third conductive layer TLd/DTEL/TLs/STEL (Figs. 11, 18 and [0075-0076]) disposed on a side of the second conductive layer E2 (Fig. 18) away from the first conductive layer (e.g., “GL” that will be below “E2” in Fig. 18) and comprising a plurality of touch traces (Fig. 11, TLd/DTEL and TLs/STEL), wherein the touch traces extend from the display area (“Touch Area” or A/A, Figs. 11 and 13) into at least the first wiring area (on a left side of C/A in Fig. 13);
Lee does not disclose shielding parts or a plan view or details of the display substrate portion of the display panel that shows the second conductive layer; accordingly, Lee does not disclose the strike-through limitations above.
Qing teaches driving a display device comprising an organic light-emitting layer with alternating current (AC) improves utilization efficiency, removes aging, and extends the lifespan of the device (e.g., see abstract).
It would have been obvious to one of ordinary skill in the art to modify Lee by configuring the first wiring area to be provided with a plurality of driving signal lines to load AC signals, as taught by Qing, because the modification could improve utilization efficiency, remove aging, and extend the lifespan of the device.
Lee (in view of Qing) does not disclose shielding parts or explicitly disclose how the power signal lines are arranged.
Lee-II teaches electrostatic discharge protection realized by a display substrate comprising shielding parts and discloses a plan view showing driving signal lines and power signal lines (see abstract, [0007-0008] and Exhibit A below). Lee-II discloses the display substrate comprises power signal lines 400/410/420 (Fig. 4, [0050] and [0065]) comprising a plurality of transmission parts (see “transmission parts” in Exhibit A) and a plurality of connection parts (see “connection parts” in Exhibit A), the transmission parts are disposed on a side of a second wiring area close to the display area, and the connection parts are connected between the transmission parts and a bonding area (see “bonding are” in Exhibit A); and wherein a second conductive layer 195/196 (Figs. 2-5 and [0065]) further comprises one or more shielding parts 195 disposed in a first wiring area (located on a left side of display area “P”, see Fig. 4 and [0047]), the one or more shielding parts 195 are connected to the transmission parts (see Fig. 5, wherein “195” is connected to “420”, which includes the transmission parts), and an orthographic projection of the one or more shielding parts 195 on the substrate overlaps at least partially an orthographic projection of driving signal lines 121 on the substrate (see “overlap of orthogonal projections…” in Exhibit A).
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It would have been obvious to one of ordinary skill in the art to further modify (Lee in view of Qing) by incorporating a shielding layer, as taught by Lee-II, because the modification would provide protection against external ESD.
Regarding claims 2-17, 19 and 20:
re claims 2 and 19, Lee-II discloses the power signal lines 400/410/420 comprise at least a ground power source; accordingly, the power signal lines are configured to load direct current signals (ground);
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re claim 3, Lee-II discloses the display area P (see “display area” in Exhibit B above) comprises a first side (see “first side” in Exhibit B) close to the bonding area (see “bonding area” in Exhibit B), the transmission parts (see “transmission parts” in Exhibit B) are parallel to the first side, and extension lines (see “extension lines defined…” in Exhibit B) defined by the connection parts intersect with the first side;
re claim 4, Lee-II discloses the one or more shielding parts 195 (see “one or more shielding parts” in Exhibit B) are disposed parallel to the first side (“first side” in Exhibit B);
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re claim 5, Lee-II discloses a second wiring area (see “second wiring area” in Exhibit C above) comprises a first sub area (see “first sub area” in Exhibit C) and a second sub area (see “second sub area” in Exhibit C) located on opposite two sides of the first wiring area (see “first wiring area” in Exhibit C), the first sub area adjoins to the first side (see “first side” in Exhibit C), the second sub area is located on a side of the first wiring area away from the first side (see Exhibit C, wherein the “second sub area” is located on an opposing side of the “first wiring area” with respect to the “first side”), the power signal lines 400/410/420 (Fig. 4) comprise a first power line 400/420 and a second power line 410, the first power line 400/420 comprises a first transmission part (see “first transmission part” in Exhibit C) located in the first sub area and a plurality of first connection parts (see “plurality of first connection parts” in Exhibit C) connected between the first transmission part and the bonding area, and the second power line 410 (Exhibit C) comprises at least one second transmission part (see “second transmission part” in Exhibit C) located in the second sub area and a plurality of second connection parts (see “plurality of second connection parts” in Exhibit C) connected between the second transmission part and the bonding area; and
wherein the one or more shielding parts 195 are connected (through contact hole 81, Fig. 5 and [0065]) to the first transmission part and/or the second transmission part, and the first power line 400/420 is insulated from the second power line 410 (i.e., power line 410 is insulated from at least a portion 400 of the first power line 400/420);
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re claim 6, Lee-II discloses the shielding part comprises a first shielding part (see “first shielding part” in Exhibit D above) connected to the first transmission part (i.e., the first shielding part is connected to power line 420 through contact hole 81, and the first transmission part is connected is also connected to the power line 420; therefore, the “first shielding part” is connected to the first transmission part), and the first shielding part is spaced apart from the second power line 410 (see Exhibit D);
re claim 7, Lee-II discloses, in the first wiring area (see “first wiring area” in Exhibit C), the first shielding part connected to the first connection parts (i.e., the first shielding parts “195” in Exhibit A are connected to “420” and “410”; accordingly, the first shielding part is connected to the first connection parts), and the orthographic projection of the driving signal lines on the substrate is located within an orthographic projection of the first shielding part and the first connection parts on the substrate (i.e., in Exhibit A, the “overlap of orthogonal projections…” shows the orthographic projection of the driving signal line 121 is located within at least an orthographic projection of the first shielding part 195);
re claim 8, Lee-II discloses the shielding part comprises a second shielding part (see “second shielding part” in Exhibit D) connected to the second transmission part, and the second shielding part is spaced apart from the first power line 420 (i.e., the second transmission part is connected to second power line 410, see Exhibit C; accordingly, the second shielding part is connected to the second transmission part);
re claim 9, Lee-II discloses the shielding parts 195 (Fig. 4) comprise a first shielding part connected to the first transmission part and a second shielding part connected to the second transmission part (see Exhibits C and D), and the first shielding part and the second shielding part are disposed in intervals (e.g., in Fig. 4, the shielding parts 195 are disposed in regular intervals);
re claim 10, Lee-II discloses the display area further comprises two second sides connected to two ends of the first side (see “first side” and two “second side” in Exhibit C), and a third side (see “third side” in Exhibit C) connected to the two second sides and opposite to the first side; [Note: this “and” should be deleted]
wherein the first transmission part (see “first transmission part” in Exhibit C) of the first power line 400/420 is disposed opposite to and parallel to the first side; and
the second power line 410 further comprises an auxiliary transmission part (see “auxiliary transmission part” in Exhibit C), and the second transmission part is connected to the auxiliary transmission part to surround the second sides, the third side, and a part of the first side of the display area P (see Exhibit C);
re claim 11, Lee-II discloses a width of the first wiring area (see “first wiring area” in Exhibit C) along a first direction (vertical as viewed in Exhibit C) is a first width, the first direction is a (vertical) direction of the first sub area (see “first sub area” in Exhibit C) pointing towards the second sub area (see “second sub area” in Exhibit C), a width of the one or more shielding parts 195 (see “one or more shielding parts”) along the first direction is a second width, and a difference between the first width and the second width is greater than or equal to 10 microns and less than or equal to 30 microns (e.g., “a width” or the first wiring area and “a width” of the one or more shielding parts” can be any chosen width, and because the first wiring area and the shielding parts will be much greater than 30 microns, one could readily choose a portion of the first wiring area to be the first wide and a portion of the shielding parts to be the second width such that a difference between the two widths is between 10 and 30 microns, i.e., choosing such widths would not require any modification of the prior art and would not require extensive experimentation; accordingly, the current claim is deemed obvious over the prior art);
re claims 12 and 20, Lee discloses (in Figs. 11-13 and 18) a touch panel comprising traces covers/overlaps an entire display substrate; accordingly, when Lee-II in incorporated into Lee (in view of Qing), the orthographic projection of the one or more shielding parts 195 (Lee-II, Fig. 4) on the substrate overlaps at least partially an orthographic projection of the touch traces (shown in Figs. 11-13 of Lee) on the substrate, and the orthographic projection of the touch traces on the substrate overlaps at least partially with the orthographic projection of the driving signal lines 121 (Lee-II, Fig. 4) on the substrate;
re claim 13, Lee discloses the display panel further comprises a first Fig. 18 and [0152], and it is noted, although Lee does not specify a material for PLN, organic planarization layers were very well known in the art, and specifically incorporating an organic layer would have been an obvious matter of selecting a well-known material on the basis of its suitability for a planarization layer in a display device) disposed between the first conductive layer (for GL of the scanning transistors that would be located below PLN in Fig. 18) and the second conductive layer E2, and the one or more shielding parts 195 (Lee-II, Figs. 4 and 6) are provided with a plurality of openings 91 (Lee-II, Fig. 6 and [0053]);
re claim 14, Lee-II discloses (in Figs. 4-5) the orthographic projection of
the driving signal lines 121 (in the display area P) on the substrate does not overlap an orthographic projection of the openings 91 on the substrate (i.e., the shielding parts with the openings therein do not extend into the display area P);
re claim 15, Lee-II discloses the driving signal lines 121 (Figs. 4 and 5) comprise a first trace and a second trace (e.g., there will be numerous scan lines 121, wherein any two could be chosen to be first and second traces), an overlap area between an orthographic projection of the first trace on the substrate and the orthographic projection of the openings 91 (Fig. 5) on the substrate is equal to an overlap area between an orthographic projection of the second trace on the substrate and the orthographic projection of the openings 91 (Fig. 5) on the substrate (i.e., in Fig. 5, the openings 91 are arranged in equal intervals; accordingly, an overlap area between orthographic projections would be equal), and an electrical signal loaded in the first trace is same as an electrical signal loaded in the second trace (scan signals loaded in the scan lines, or first and second traces, would be the same at least in voltage range);
re claim 16, Lee-II discloses the display panel further comprises a fourth conductive layer 176s/177s (Fig. 6 and [0052]) disposed between the first conductive layer (scan lines, GL, for gate electrodes 125s, Fig. 6 and [0052]) and the substrate 100, the fourth conductive layer comprises a plurality of functional signal lines (e.g., data lines, [0006, 0048]), and the functional signal lines extend from the display area P (Fig. 4) into the first wiring area and are connected to the driving signal lines (i.e., “connected” does not require electrical or direct connection, and Lee shows a circuit schematic, in Fig. 4, wherein scan line GL is connected to data line DL through transistor T1); and
re claim 17, Lee-II discloses the display panel further comprises a driving component disposed in the bonding area 1000 (in Fig. 4 and [0050, 0059], wherein bonding area 1000 are pads for receiving signals from outside the display panel), and the connection parts (see “connection parts” in Exhibit A) are connected between the transmission parts (see “transmission parts” in Exhibit A) and the driving component 1000 (see Exhibit A) at least passing through the first wiring area (see “first wiring area” in Exhibit C);
Therefore, Lee (in view of Qing and Lee-II) renders obvious claims 2-17 and 19-20.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEX H MALSAWMA whose telephone number is (571)272-1903. The examiner can normally be reached M-F (4-12 Hours, between 5:30AM-10PM).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at 571-272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LEX H MALSAWMA/Primary Examiner, Art Unit 2892