Prosecution Insights
Last updated: July 05, 2026
Application No. 18/565,741

SEMICONDUCTOR SUBSTRATE ASSEMBLY AND MANUFACTURING METHOD THEREFOR

Non-Final OA §102§103§112
Filed
Nov 30, 2023
Priority
May 30, 2021 — JP 2021-090724 +2 more
Examiner
RIRIE, EVERETT TRAJAN
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BONDTECH CO., LTD.
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-68.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
19 currently pending
Career history
19
Total Applications
across all art units

Statute-Specific Performance

§103
93.1%
+53.1% vs TC avg
§102
5.2%
-34.8% vs TC avg
§112
1.7%
-38.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1, 5, 10, 18, 19, and 22 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1, which recites “the first or second signal transmission metal region is substantially surrounded by the first or second ground metal region in the first or second bonding surface.” For the brevity and clarity of this rejection, the examiner will preserve the structure of the claim while abbreviating the claim elements therein: “A1 or A2 is substantially surrounded by B1 or B2 in C1 or C2.” As written, the limitation covers several alternate cases, including some which are indefinite in meaning and scope. For example, it is unclear what it would mean for A1 to be surrounded by B1 in C2, since A1 and B1 are previously limited to features in C1. This renders the scope of the claim indefinite. For the purpose of examination, the examiner interprets claim 1 as having the following structural relationship: “A1 or A2 is substantially surrounded by B1 or B2 respectively.” Since A1 and B1 are previously limited to be in C1 and A2 and B2 are previously limited to be in C2, the aspect of the limitation that these features surround/are surrounded in C1 or C2 is preserved by this interpretation while excluding cases where the limitation is rendered indefinite as described above. Regarding claim 5, which recites “the first signal transmission metal region and the second signal transmission metal region being bonded is a plurality of first signal transmission metal pins disposed in the first signal transmission metal region and a plurality of second signal transmission metal pins disposed in the second signal transmission metal region being bonded, and the first ground metal region and the second ground metal region being bonded is a plurality of first ground metal pins disposed in the first ground metal region and a plurality of second ground metal pins disposed in the second ground metal region being bonded.” For the brevity and clarity of this rejection, the examiner will preserve the structure of the claim while abbreviating the claim elements therein: “A and B being bonded is C in A and D in B being bonded, and E and F being bonded is G in E and H in F being bonded.” Because the latter clause is identical in structure to the former aside from the substitution of elements E-H in place of A-D respectively, discussion of this claim will be limited to the former clause. However, the applicant will appreciate that the following rejections and reasonings regarding the former clause apply to the latter as well. As written, the claim could be interpreted in at least the following distinct ways, which renders the scope of the claim indefinite: the combination of A and B is the combination of both C in A and D in B; or A is C in A and B is D in B. It is unclear how exactly C can both be A and be in A, and likewise with D and B. Additionally, either interpretation taken to its logical conclusion requires that a set contains itself. The applicant’s bold stance on set theory and Russell’s paradox is noted, but the examiner respectfully requests the applicant amend the claim in such a way that it does not invite philosophical inquiry. Further regarding claim 5, the claim could be further interpreted in at least the following distinct ways, non-exclusive of the earlier interpretations, which renders the scope of the claim indefinite: A and B comprise C and D, A is bonded to B, and C is bonded to D; or A and B comprise C and D, A is bonded to B, but C is not necessarily bonded to D. For the purpose of examination, the examiner interprets claim 5 as having the following structural relationship: “A comprises C, B comprises D, and A is bonded to B; E comprises G, F comprises H, and E is bonded to F.” Regarding claim 10, which recites “the first or second signal transmission metal region is disposed separately from the first or second ground metal region in the first or second bonding surface.” For the brevity and clarity of this rejection, the examiner will preserve the structure of the claim while abbreviating the claim elements therein: “A1 or A2 is disposed separately from B1 or B2 in C1 or C2.” As written, the limitation covers several alternate cases, including some which are indefinite in meaning and scope. For example, it is unclear what it would mean for A1 to be disposed separately from B1 in C2, since A1 and B1 are previously limited to features in C1. This renders the scope of the claim indefinite. For the purpose of examination, the examiner interprets claim 10 as having the following structural relationship: “A1 or A2 is disposed separately from B1 or B2 respectively.” Since A1 and B1 are previously limited to be in C1 and A2 and B2 are previously limited to be in C2, the aspect of the limitation that these features are disposed separately in C1 or C2 is preserved by this interpretation while excluding cases where the limitation is rendered indefinite as described above. Regarding claim 18, which recites “the plurality of first and/or second ground metal regions”, “the signal transmission metal region for an analog signal”, and “the signal transmission metal region for a digital signal”. There is insufficient antecedent basis for each of the aforementioned elements in the claim, each of which independently renders the scope of the claim indefinite. For the purpose of examination, the examiner interprets the claim as “The bonding structure according to claim 1, wherein the first and/or second signal transmission metal region includes a plurality of first and/or second signal transmission metal regions, the first and/or second ground metal region includes a plurality of first and/or second ground metal regions, a part of the plurality of first and/or second ground metal regions is disposed to surround [[the]] a signal transmission metal region for transmitting an analog signal in a corresponding bonding surface, and another part of the plurality of first and/or second ground metal regions is disposed to surround [[the]] a signal transmission metal region for transmitting a digital signal in a corresponding bonding surface.” Regarding claim 19, which recites “the first or second upper signal transmission metal region is substantially surrounded by the first or second upper ground metal region in the first or second upper bonding surface, and the second lower or third signal transmission metal region is substantially surrounded by the second lower or third ground metal region in the second lower or third bonding surface.” For the brevity and clarity of this rejection, the examiner will preserve the structure of the claim while abbreviating the claim elements therein: “A1 or A2 is substantially surrounded by B1 or B2 in C1 or C2, and A3 or A4 is substantially surrounded by B3 or B4 in C3 or C4.” Because the latter clause is identical in structure to the former aside from the substitution of elements A3, A4, B3, B4, C3, and C4 in place of A1, A2, B1, B2, C1, and C2 respectively, discussion of this claim will be limited to the former clause. However, the applicant will appreciate that the rejection and reasoning regarding the former clause applies to the latter as well. As written, the limitation covers several alternate cases, including some which are indefinite in meaning and scope. For example, it is unclear what it would mean for A1 to be surrounded by B1 in C2, since A1 and B1 are previously limited to features in C1. This renders the scope of the claim indefinite. For the purpose of examination, the examiner interprets claim 19 as having the following structural relationship: “A1 or A2 is substantially surrounded by B1 or B2 respectively, and A3 or A4 is substantially surrounded by B3 or B4 respectively.” In the former clause, since A1 and B1 are previously limited to be in C1 and A2 and B2 are previously limited to be in C2, the aspect of the limitation that these features surround/are surrounded in C1 or C2 is preserved by this interpretation while excluding cases where the limitation is rendered indefinite as described above, and similarly for the latter clause. Regarding claim 22, which recites “the first or second signal transmission metal region is substantially surrounded by the first or second ground metal region in the first or second bonding surface.” For the brevity and clarity of this rejection, the examiner will preserve the structure of the claim while abbreviating the claim elements therein: “A1 or A2 is substantially surrounded by B1 or B2 in C1 or C2.” As written, the limitation covers several alternate cases, including some which are indefinite in meaning and scope. For example, it is unclear what it would mean for A1 to be surrounded by B1 in C2, since A1 and B1 are previously limited to features in C1. This renders the scope of the claim indefinite. For the purpose of examination, the examiner interprets claim 22 as having the following structural relationship: “A1 or A2 is substantially surrounded by B1 or B2 respectively.” Since A1 and B1 are previously limited to be in C1 and A2 and B2 are previously limited to be in C2, the aspect of the limitation that these features surround/are surrounded in C1 or C2 is preserved by this interpretation while excluding cases where the limitation is rendered indefinite as described above. Regarding claim 23, which recites “activating a surface of at least one of the first signal transmission metal region and the second signal transmission metal region; and activating a surface of at least one of the first ground metal region and the second ground metal region, wherein said electrically connecting the first signal transmission metal region and the second signal transmission metal region includes bringing the activated surface into contact with another, and said electrically connecting the first ground metal region and the second ground metal region includes bringing the activated surface into contact with another.” For the brevity and clarity of this rejection, the examiner will preserve the structure of the limitations while abbreviating the claim elements therein: “activating a surface of at least one of A1 and A2; and activating a surface of at least one B1 and B2, wherein said electrically connecting A1 and A2 includes bringing the activated surface into contact with another, and said electrically connecting B1 and B2 includes bringing the activated surface into contact with another.” There is insufficient antecedent basis for “the activated surface”. As written, it is unclear as to which surface “the activated surface” refers as it could be directed to a surface of any of A1, A2, B1, or B2. This renders the scope of the claim indefinite. Additionally, in both instances of the phrase, “bringing the activated surface into contact with another”, it is unclear what is meant by “another”. The term could be interpreted in at least the following distinct ways, which renders the scope of the claim indefinite: another activated surface, including any activated surface of A1, A2, B1, or B2 or another activated surface beyond those listed; or another surface, not necessarily an activated one For the purpose of examination, the examiner interprets claim 22 as the following: “activating a surface of at least one of A1 and A2 to form at least one activated signal transmission metal surface; and activating a surface of at least one B1 and B2 to form at least one activated ground metal surface, wherein said electrically connecting A1 and A2 includes bringing the activated signal transmission metal surface into contact with another surface of the first or second signal transmission metal region, and said electrically connecting B1 and B2 includes bringing the activated ground metal surface into contact with another surface of the first or second ground metal region.” Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-4, 8-11, 13, 14, 16, 17, 19-22, and 27 are rejected under 35 U.S.C. 102 (a)(1) and 102 (a)(2) as being anticipated by Ishii et al. (US 20100213592 A1, hereinafter Ishii). Regarding independent claim 1, Ishii discloses in Ishii FIG. 3 and 4(b) and associated text a bonding structure comprising: a first substrate (semiconductor package 30A) including a first bonding surface (bottom surface 30Ab) including a first signal transmission metal region (pads 32 which connect to signal line conductors 43) and a first ground metal region (pads 32 which connect to GND conductor 41) insulated from the first signal transmission metal region (Portions of printed wiring board 31 are between pads 32 corresponding to the claimed transmission and ground metal regions. Printed wiring board 31 is formed of glass epoxy substrates, which is an insulating material (Ishii [0045]).); and a second substrate bonded to the first substrate (terminal strip 40A, bonded to semiconductor package 30A, as shown), the second substrate including a second bonding surface (top surface 40Aa) including a second signal transmission metal region (signal line conductors 43) and a second ground metal region (GND conductor 41) insulated from the second signal transmission metal region (signal line and GND conductors are insulated by insulator 45), wherein the first signal transmission metal region and the second signal transmission metal region are bonded, the first ground metal region and the second ground metal region are bonded (the ground metal and the signal transmission metal regions as interpreted above are bonded, as shown), and the first or second signal transmission metal region is substantially surrounded by the first or second ground metal region respectively (signal line conductors 43 are surrounded by GND conductor 41, as shown in Ishii FIG. 4(b) especially). Regarding dependent claim 2, Ishii further discloses in Ishii FIG. 3 and 4(b) and associated text a total area of the first signal transmission metal region and the first ground metal region is equal to or greater than 50% of an area of the first bonding surface, and/or a total area of the second signal transmission metal region and the second ground metal region is equal to or greater than 50% of an area of the second bonding surface (signal line conductors 43 and GND conductor 41 have a combined area clearly greater than 50% of the top surface 40Aa, as shown). Regarding dependent claim 3, Ishii further discloses in Ishii FIG. 3 and 4(b) and associated text an area of the first or second ground metal region is larger than an area of the first or second signal transmission metal region (GND conductor 41 has a greater area than signal line conductors 43). Regarding dependent claim 4, Ishii further discloses in Ishii FIG. 3 and associated text an insulating surface of the first bonding surface and an insulating surface of the second bonding surface are not bonded to each other (insulating layer 34 and insulating layer 48 are not bonded, as shown). Regarding dependent claim 8, Ishii further discloses in Ishii FIG. 3 and associated text the first substrate includes a through electrode penetrating the first substrate and connected to the first signal transmission metal region, and/or the second substrate includes a through electrode penetrating the second substrate and connected to the second signal transmission metal region (signal line conductors 43, corresponding to the second transmission metal region, are also considered through electrodes because they are conductors that penetrate through terminal strip 40A (second substrate), and are connected to themselves, exhibiting the claimed structure). Regarding dependent claim 9, Ishii further discloses in Ishii FIG. 3 and associated text the first substrate includes a through electrode penetrating the first substrate and connected to the first ground metal region, and/or the second substrate includes a through electrode penetrating the second substrate and connected to the second ground metal region (GND conductor 41, corresponding to the second ground metal region, are also considered through electrodes because they are conductors that penetrate through terminal strip 40A (second substrate), and are connected to themselves, exhibiting the claimed structure). Regarding dependent claim 10, Ishii further discloses in Ishii FIG. 3 and associated text the first or second signal transmission metal region is disposed separately from the first or second ground metal region respectively (the ground metal and the signal transmission metal regions of both substrates as interpreted above are separate, as shown). Regarding dependent claim 11, Ishii further discloses in Ishii FIG. 3 and 4(b) and associated text the bonding structure according to claim 10, wherein the first or second bonding surface includes an insulating surface at a separation portion between the first or second signal transmission metal region and the first or second ground metal region (surfaces of insulators 45 separate signal line conductors 43 and GND conductor 41). Regarding dependent claim 13, Ishii further discloses in Ishii FIG. 3 and associated text the bonding structure according to claim 10, wherein the first bonding surface includes a first insulating surface disposed between the first signal transmission metal region and the first ground metal region (insulating layer 34 is disposed between pads 32 which each connect to either signal line conductors 43 or GND conductor 41 (pads corresponding to the first signal transmission metal region and first ground metal region respectively)), the second bonding surface includes a second insulating surface disposed between the second signal transmission metal region and the second ground metal region (surfaces of insulators 45 are between signal line conductors 43 and GND conductor 41), and the first insulating surface and the second insulating surface are not bonded to each other (insulating layer 34 is not bonded to insulators 45, as shown). Regarding dependent claim 14, Ishii further discloses in Ishii FIG. 4(b) and associated text the first and/or second signal transmission metal region includes a plurality of first and/or second signal transmission metal regions (a plurality of signal line conductors 43 are depicted), and the plurality of first and/or second signal transmission metal regions are surrounded by a single first and/or second ground metal region (the plurality of signal line conductors 43 are surrounded by the single GND conductor 41). Regarding dependent claim 16, Ishii further discloses in Ishii FIG. 4(b) and associated text the first and/or second ground metal region includes a plurality of first and/or second ground metal regions insulated from each other in a corresponding bonding surface (GND conductor 41 and VDD conductors 42 (which are also considered ground metal regions consistent with the applicant’s definition in [0018]) are insulated from one another by insulators 45). Regarding dependent claim 17, Ishii further discloses the plurality of first and/or second ground metal regions are connected to a ground and/or different power supplies (The GND conductor 41 is connected to ground potential (GND) as exemplary first potential. The VDD conductors 42 are connected to power supply potential (VDD) as exemplary second potential. (Ishii [0056])). Regarding independent claim 19, Ishii discloses a bonding structure comprising: a first substrate (semiconductor package 30A) including a first bonding surface (bottom surface 30Ab) including a first signal transmission metal region (pads 32 which connect to signal line conductors 43 and which are in semiconductor package 30A) and a first ground metal region (pads 32 which connect to GND conductor 41) insulated from the first signal transmission metal region (Portions of printed wiring board 31 are between pads 32 corresponding to the claimed first transmission and ground metal regions. Printed wiring board 31 is formed of glass epoxy substrates, which is an insulating material (Ishii [0045]).); a second substrate bonded to the first substrate (terminal strip 40A, bonded to semiconductor package 30A, as shown), the second substrate including a second upper bonding surface (top surface 40Aa) including a second upper signal transmission metal region (an upper portion of signal line conductors 43) and a second upper ground metal region (an upper portion of GND conductor 41) insulated from the second upper signal transmission metal region (signal line and GND conductors are insulated by insulator 45), the second upper bonding surface facing the first bonding surface (top surface 40Aa faces bottom surface 30Ab, as shown), and a second lower bonding surface (bottom surface 40Ab) including a second lower signal transmission metal region (a lower portion of signal line conductors 43) and a second lower ground metal region (a lower portion of GND conductor 41) insulated from the second lower signal transmission metal region (signal line and GND conductors are insulated by insulator 45); and a third substrate bonded to the second substrate (semiconductor package 30B, bonded to terminal strip 40A, as shown), the third substrate including a third bonding surface (top surface 30Ba) including a third signal transmission metal region (pads 32 which connect to signal line conductors 43 and which are in semiconductor package 30B) and a third ground metal region (pads 32 which connect to GND conductor 41 and which are in semiconductor package 30B) insulated from the third signal transmission metal region (Portions of printed wiring board 31 are between pads 32 corresponding to the claimed third transmission and ground metal regions. Printed wiring board 31 is formed of glass epoxy substrates, which is an insulating material (Ishii [0045]).), the third bonding surface facing the second lower bonding surface (top surface 30Ba faces bottom surface 40Ab, as shown), wherein the first signal transmission metal region and the second upper signal transmission metal region are bonded, the first ground metal region and the second upper ground metal region are bonded, the second lower signal transmission metal region and the third signal transmission metal region are bonded, the second lower ground metal region and the third ground metal region are bonded (the first through third ground metal and the signal transmission metal regions as interpreted above are bonded consistent with the claimed structure, as shown), the first or second upper signal transmission metal region is substantially surrounded by the first or second upper ground metal region respectively (upper portions of signal line conductors 43 are surrounded by upper portions of GND conductor 41, as shown), and the second lower or third signal transmission metal region is substantially surrounded by the second lower or third ground metal region respectively (lower portions of signal line conductors 43 are surrounded by lower portions of GND conductor 41, as shown in Ishii FIG. 4(b) especially). Regarding dependent claim 20, Ishii further discloses in FIG. 3 and 9 and associated text the bonding structure according to claim 1, further comprising a plurality of substrates bonded to each other (The embodiments in the majority of Ishii’s figures, including those discussed herein, depict at least 2 bonded substrates, which is a plurality, and up to 7 substrates in Ishii FIG. 9. Though not depicted, Ishii further discloses an unlimited plurality of semiconductor packages and terminal strips (substrates) in [0009]). Regarding dependent claim 21, Ishii further discloses in FIG. 2 and associated text an electronic element, an electronic circuit module, or an electronic device comprising the bonding structure according to claim 1 (semiconductor module 10 is a module comprising a variety of electrically connected forming in a current path (Ishii [0005]: current passes through a path extending from VDD to GND; semiconductor module 10 includes path 100 between VDD conductor 42 and GND conductor 41), therefore semiconductor module 10 is an electronic circuit module). Regarding independent claim 22, Ishii discloses in Ishii FIG. 2 and 4(b) and associated text a method of bonding a substrate, the method comprising: providing a first substrate (semiconductor package 30A) including a first bonding surface (bottom surface 30Ab) including a first signal transmission metal region (pads 32 which connect to signal line conductors 43) and a first ground metal region (pads 32 which connect to GND conductor 41) insulated from the first signal transmission metal region (Portions of printed wiring board 31 are between pads 32 corresponding to the claimed transmission and ground metal regions. Printed wiring board 31 is formed of glass epoxy substrates, which is an insulating material (Ishii [0045]).); providing a second substrate bonded to the first substrate (terminal strip 40A, bonded to semiconductor package 30A, as shown), the second substrate including a second bonding surface (top surface 40Aa) including a second signal transmission metal region (signal line conductors 43) and a second ground metal region (GND conductor 41) insulated from the second signal transmission metal region (signal line and GND conductors are insulated by insulator 45); electrically connecting the first signal transmission metal region and the second signal transmission metal region (the ground metal and the signal transmission metal regions as interpreted above are connected by connection portion 50, which is an electrical connection); and electrically connecting the first ground metal region and the second ground metal region (Path 100 indicates current flow from GND conductor 41 to a pad 32, corresponding to a first ground metal region, through connection portion 50. Therefore, connection portion 50 is conductive and electrically connects the ground metal regions.), wherein the first or second signal transmission metal region is substantially surrounded by the first or second ground metal region respectively (signal line conductors 43 are surrounded by GND conductor 41, as shown in Ishii FIG. 4(b) especially). Regarding dependent claim 27, Ishii further discloses in Ishii FIG. 6(a) and 6(b) and associated text after electrically connecting the first signal transmission metal region and the second signal transmission metal region and electrically connecting the first ground metal region and the second ground metal region (solder layers 33 and 47 (which eventually form conductive connection portions 50, and are therefore electrically conductive) are brought into contact (Ishii [0077]-[0078], pertaining to FIG. 6(a)), forming an electrical connection), heating the first substrate and the second substrate (heat is applied (Ishii [0079], pertaining to FIG. 6(b)), following the connection step). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Ishii, and further in view of Chiu et al. (US 5832596 A, hereinafter Chiu). Regarding dependent claim 5, Ishii discloses in Ishii FIG. 4(a) and 6 and associated text the bonding structure according to claim 1, wherein the first signal transmission metal region comprises a plurality of first conductive signal connections (solder layers 33 on pads 32, corresponding to the first signal transmission metal region as described above, are not shown, but are disclosed in Ishii [0053]), the second signal transmission metal region comprises a plurality of second conductive signal connections (signal line conductor connection portions 43a of solder layer 47), and the first signal transmission metal region is bonded to the second signal transmission metal region (the signal transmission metal regions as interpreted above are bonded as shown); the first ground metal region comprises a plurality of first conductive ground connections (solder layers 33 on pads 32, corresponding to the first ground metal region as described above), the second ground metal region comprises a plurality of second conductive ground connections (GND conductor connection portions 41a of solder layer 47), and the first ground metal region is bonded to the second ground metal region (the ground metal regions as interpreted above are bonded as shown). Ishii does not explicitly disclose the first signal transmission metal region comprises a plurality of first signal transmission metal pins, the second signal transmission metal region comprises a plurality of second signal transmission metal pins; the first ground metal region comprises a plurality of first ground metal pins, the second ground metal region comprises a plurality of second ground metal pins. However, in the same field of endeavor, Chiu discloses a plurality of pins in bonding surfaces of substrates (cores 602 and 604 connected by a plurality (at least 2 depicted) of pins 610). The applicant will note that while the pins do not explicitly belong to one particular bonding surface or metal region or another, the pins are in both bonding surfaces, so the distinction is an arbitrary matter of nomenclature. Additionally, one of ordinary skill in the art would recognize that Chiu’s pins 610 perform the same function as Ishii’s connection portions 50 (which are formed of the aforementioned solder layers 33 and 47) in that each forms electrical connections between substrates. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to substitute Chiu’s pins for Ishii’s solder layers and connection portions since all the claimed elements were known in the prior art and one skilled in the art could have substituted the elements as claimed with no change in their respective functions, and the combination would have yielded nothing more than predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398, 82 USPQ2d 1385 (2007). Claims 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Ishii, and further in view of Lin et al. (US 20210090983 A1, hereinafter Lin) and Hart et al. (US 20150069577 A1, hereinafter Hart). Regarding dependent claim 6, Ishii discloses the bonding structure according to claim 1. Ishii does not explicitly disclose the first substrate and the second substrate are chips cut from a wafer by dicing, and the first and second ground metal regions are ground metal regions formed by cutting the wafer along a boundary line in a cut metal region. However, in the same field of endeavor, Lin discloses in Lin FIG. 15A-15D and associated text the first substrate and the second substrate are chips (stacked memory chips 251, which are analogous to the claimed first and second substrate in that each chip 251 is bonded to an adjacent chip(s) and comprises TSVs 157 for signal or ground interconnection (Lin [0003])). Additionally, in the same field of endeavor, Hart discloses in Hart FIG. 9 and associated text chips cut from a wafer by dicing (interposer 203 may be diced from an interposer wafer and when dies are attached to the interposer after dicing, it is considered a chip-on-chip flow, therefore interposers 203 are chips (Hart [0046])), and ground metal regions formed by cutting the wafer along a boundary line in a cut metal region (patterned metal layers 910-1/910-2 is connected to Vss (ground) and is separated into metal layers in individual interposers 203-1/203-2 when metal connection 706 in scribe region 804 is severed (Hart [0095]-[0096])). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the bonding structure of Ishii with the bonded chips of Lin and grounded metal regions in a cut metal region of Hart to provide an increased degree of integration and to mitigate damage caused by charge accumulation in chip processing (Hart [0068]). Regarding dependent claim 7, Ishii discloses the bonding structure according to claim 1. Ishii does not explicitly disclose the first substrate and the second substrate are chips cut from a wafer by dicing, a plurality of chip regions are defined on the wafer, a ground metal region is formed at a boundary of each of the plurality of chip regions, a non-metal region is formed at boundary lines of the plurality of chip regions, and the chips are formed by dicing along the non-metal regions. However, in the same field of endeavor, Lin discloses in Lin FIG. 15A-15D and associated text the first substrate and the second substrate are chips (stacked memory chips 251, which are analogous to the claimed first and second substrate in that each chip 251 is bonded to an adjacent chip(s) and comprises TSVs 157 for signal or ground interconnection (Lin [0003])). Additionally, in the same field of endeavor, Hart discloses in Hart FIG. 9 and associated text chips cut from a wafer by dicing (interposer 203 may be diced from an interposer wafer and when dies are attached to the interposer after dicing, it is considered a chip-on-chip flow, therefore interposers 203 are chips (Hart [0046])), a plurality of chip regions are defined on the wafer (at least two interposer chips 203-1 and 203-2 in Hart FIG. 9), a ground metal region is formed at a boundary of each of the plurality of chip regions (patterned metal layers 910-1/910-2 is connected to Vss (ground) and are at a boundary of interposers 203-1/203-2 defined by scribe line 804), a non-metal region is formed at boundary lines of the plurality of chip regions (part of substrate 905/560 is in scribe line 804; the substrate is formed from semiconductor or dielectric materials (Hart [0064]), not metals), and the chips are formed by dicing along the non-metal regions (interposer wafer 700 is diced into individual interposers 203 (Hart [0096]); the perimeter of and interposer 203 is defined by the scribe region 804 (Hart [0087]), therefore dicing is performed along the scribe region which includes a portion of the non-metal substrate 905). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the bonding structure of Ishii with the bonded chips of Lin and the grounded metal regions at chip boundaries of Hart to provide an increased degree of integration and to mitigate damage caused by charge accumulation in chip processing (Hart [0068]). Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Ishii, and further in view of Lin. Regarding dependent claim 12, Ishii further discloses in Ishii FIG. 3 and associated text the bonding structure according to claim 10, wherein the first bonding surface includes a first insulating surface disposed between the first signal transmission metal region and the first ground metal region (insulating layer 34 is disposed between pads 32 which each connect to either signal line conductors 43 or GND conductor 41 (pads corresponding to the first signal transmission metal region and first ground metal region respectively)), the second bonding surface includes a second insulating surface disposed between the second signal transmission metal region and the second ground metal region (surfaces of insulators 45 are between signal line conductors 43 and GND conductor 41). Ishii does not explicitly disclose the first insulating surface and the second insulating surface are bonded to each other. However, in the same field of endeavor, Lin discloses in Lin FIG. 15C, 15D, 16C, and 16D and associated text the first insulating surface and the second insulating surface are bonded to each other (insulating bonding layers 52 and 521, corresponding to the claimed insulating surfaces, of memory chips 251, corresponding to claimed substrates are bonded (Lin [0335])). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the bonding structure of Ishii with the oxide-to-oxide direct bonding of Lin to provide an increased degree of integration and increased layer adhesion. Claims 15 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Ishii, and further in view of Nishida et al. (JP 2000150802 A, hereinafter Nishida). Regarding dependent claim 15, Ishii discloses in Ishii FIG. 3 and 4(b) and associated text the bonding structure according to claim 1, wherein the first and/or second signal transmission metal region includes a plurality of first and/or second signal transmission metal regions (a plurality of signal line conductors 43 are depicted). Ishii does not explicitly disclose the plurality of first and/or second signal transmission metal regions include at least one signal transmission metal region for transmitting an analog signal and at least one signal transmission metal region for transmitting a digital signal. However, in the same field of endeavor, Nishida discloses in Nishida FIG. 1 and associated text the plurality of first and/or second signal transmission metal regions include at least one signal transmission metal region for transmitting an analog signal (analog signal pad 3) and at least one signal transmission metal region for transmitting a digital signal (digital signal pad 2). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the bonding structure of Ishii with the dedicated analog and digital signal pads of Nishida as signal line conductors to provide the capability to transmit either kind of signal between bonded substrates. Regarding dependent claim 18, Ishii discloses in Ishii FIG. 2 and 4(b) and associated text the bonding structure according to claim 1, wherein the first and/or second signal transmission metal region includes a plurality of first and/or second signal transmission metal regions (plurality of signal line conductors 43), the first and/or second ground metal region includes a plurality of first and/or second ground metal regions (plurality of GND conductors 41 (one in each terminal strip 40A and 40B) and VDD conductors 42). Ishii does not explicitly disclose a part of the plurality of first and/or second ground metal regions is disposed to surround a signal transmission metal region for transmitting an analog signal in a corresponding bonding surface, and another part of the plurality of first and/or second ground metal regions is disposed to surround a signal transmission metal region for transmitting a digital signal in a corresponding bonding surface. However, in the same field of endeavor, Nishida discloses a part of the plurality of first and/or second ground metal regions is disposed to surround a signal transmission metal region for transmitting an analog signal in a corresponding bonding surface (shield wiring 13 connected to the analog ground 8 is provided around the analog signal pad 3, which is on the chip surface), and another part of the plurality of first and/or second ground metal regions is disposed to surround a signal transmission metal region for transmitting a digital signal in a corresponding bonding surface (shield wiring 12 connected to the digital ground 9 is provided around the digital signal pad 2, which is on the chip surface). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the bonding structure of Ishii with the dedicated analog and digital signal pads surrounded by separate grounded shield wirings of Nishida as signal line conductors to provide the capability to transmit either kind of signal between bonded substrates with reduced signal noise from peripheral pads (Nishida abstract). Claims 23-26 and 28 are rejected under 35 U.S.C. 103 as being unpatentable over Ishii, and further in view of Takayuki (Mitsubishi Heavy Industries Technical Review Vol. 57 No. 3 (September 2020), hereinafter Takayuki). Regarding dependent claim 23, Ishii discloses the method according to Claim 22. Ishii does not explicitly disclose before electrically connecting the first signal transmission metal region and the second signal transmission metal region and electrically connecting the first ground metal region and the second ground metal region, activating a surface of at least one of the first signal transmission metal region and the second signal transmission metal region to form at least one activated signal transmission metal surface; and activating a surface of at least one of the first ground metal region and the second ground metal region to form at least one activated ground metal surface, wherein said electrically connecting the first signal transmission metal region and the second signal transmission metal region includes bringing the activated signal transmission metal surface into contact with another surface of the first or second signal transmission metal region, and said electrically connecting the first ground metal region and the second ground metal region includes bringing the activated ground metal surface into contact with another surface of the first or second ground metal region. Ishii teaches a base method of bonding a substrate of which the claimed invention can be seen as an improvement in that activation of the bonding surface can improve the bonding strength. Takayuki teaches a known technique of room-temperature bonding that is comparable to the base process comprising before electrically connecting metal bonding materials, activating a surface of the bonding materials (Takayuki Figure 2 shows the activation step occurs before the bonding step where a second surface is shown to be put in contact with the first); and wherein said electrically connecting the bonding materials includes bringing the activated surface into contact with another surface (The technique is disclosed to be applicable to bonding of metals (Takayuki pg. 6-7) and bringing metals into contact with one another is inherently a method of forming an electrical connection between them). Takayuki’s known technique, as cited above, would have been recognized by one skilled in the art as applicable to the base bonding of the plurality of signal and ground metal regions of Ishii and the results would have been predictable and resulted in the method of bonding a substrate as claimed which results in a bonding structure with improved bonding strength among other listed benefits (Takayuki pg. 3). Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art at the time of the effective filing date of the invention. The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art. Regarding dependent claim 24, Ishii, as modified by Takayuki, further discloses in Takayuki Figure 2 and associated text said bringing into contact with another includes bringing into contact with another in a vacuum (the bonding step is performed in a vacuum as shown). Regarding dependent claim 25, Ishii, as modified by Takayuki, further discloses the activation includes a process selected from the group consisting of plasma treatment, ion bombardment, atom beam irradiation, radical irradiation, and electromagnetic wave irradiation (activation is performed by Ar beam irradiation (Takayuki pg. 2, 6)). Regarding dependent claim 26, Ishii discloses the method according to claim 22. Ishii does not explicitly disclose said electrically connecting the first signal transmission metal region and the second signal transmission metal region and said electrically connecting the first ground metal region and the second ground metal region are performed in an unheated manner or at room temperature. Ishii teaches a base method of bonding a substrate of which the claimed invention can be seen as an improvement in that unheated/room-temperature bonding mitigates the thermal strain on bonded substrates. Takayuki teaches a known technique of room-temperature bonding that is comparable to the base process comprising electrically connecting bonding surfaces at room temperature (the entire disclosed process, including bringing bonding surfaces into contact (which forms an electrical connection in metals, on which the technique is applicable), occurs at room temperature (Takayuki pg. 2)). Takayuki’s known technique, as cited above, would have been recognized by one skilled in the art as applicable to the base bonding of the signal and ground metal regions of Ishii and the results would have been predictable and resulted in the method of bonding a substrate as claimed which results in a bonding structure with no thermal strain due to bonding among other listed benefits (Takayuki pg. 3). Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art at the time of the effective filing date of the invention. The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art. Regarding dependent claim 28, Ishii discloses the method according to claim 22. Ishii does not explicitly disclose said electrically connecting the first signal transmission metal region and the second signal transmission metal region; and said electrically connecting the first ground metal region and the second ground metal region comprise: activating surfaces of the first signal transmission region, the second signal transmission metal region, the first ground metal region and the second ground metal region by irradiation of a particle beam under a vacuum of equal to or less than 1 x10-5 Pascal (Pa); and bonding the first signal transmission metal region and the second signal transmission metal region and bonding the first ground metal region and the second ground metal region, as they remain active. Ishii teaches a base method of bonding a substrate of which the claimed invention can be seen as an improvement in that activation of the bonding surface in a vacuum and bonding activated surfaces can improve the bonding strength. Takayuki teaches a known technique of room-temperature bonding that is comparable to the base process comprising activating a surface of the metal bonding materials by irradiation of a particle beam (activation is performed by Ar beam irradiation (Takayuki pg. 2)) under a vacuum of equal to or less than 1 x10-5 Pascal (Pa) (activation and bonding steps are performed in a vacuum of 10-6 Pa (Takayuki pg. 2, Figure 2)); and bonding the bonding materials, as they remain active (activated surfaces are brought into contact with each other (Takayuki pg. 2)). Takayuki’s known technique, as cited above, would have been recognized by one skilled in the art as applicable to the base bonding of the plurality of signal and ground metal regions of Ishii and the results would have been predictable and resulted in the method of bonding a substrate as claimed which results in a bonding structure with improved bonding strength among other listed benefits (Takayuki pg. 3). Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art at the time of the effective filing date of the invention. The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art. Conclusion Pertinent Art The prior art made of record and not relied upon is considered pertinent to the applicant’s disclosure: US 5902118 A, further pertaining to the use of vertical contact pins in interconnections between substrates. Any inquiry concerning this communication or earlier communications from the examiner should be directed to EVERETT TRAJAN RIRIE whose telephone number is (571) 272-9559. The examiner can normally be reached Mon - Thu 8:30 am - 6:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached at (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EVERETT T RIRIE/Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897
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Prosecution Timeline

Nov 30, 2023
Application Filed
May 31, 2024
Response after Non-Final Action
Apr 06, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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