DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-23 are presented for examination.
Claim Objections
Claim 12 is objected to because of the following informalities: in line 4, "AlN GaN" should be amended to read -AlN, GaN-. Appropriate correction is required.
Claim 23 is objected to because of the following informalities: in lines 18 and 19, “a higher” and “a lower”, respectively, should be amended to read –the higher– and –the lower–, respectively. Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 22, and 23 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 21 of copending Application No. 18/559,654 (reference application hereinafter). Although the claims at issue are not identical, they are not patentably distinct from each other because
As to claim 1: reference application discloses in claim 21 a method (line 1, the product-by-process claims method steps), comprising: fabricating a III-V or II-VI compound based device (III-nitride is a III-V compound; line 2) having an in-plane lattice constant or strain that is at least 20% biaxially relaxed (30% biaxially relaxed; lines 2-3) by: creating a III-V or II-VI compound based (III-nitride is a III-V compound; line 5) decomposition stop layer (III-nitride based decomposition stop layer; line 5) on or above a III-V or II-VI compound based (III-nitride is a III-V compound; line 6) decomposition layer (III-nitride decomposition layer), wherein the III-V or II-VI compound based decomposition stop layer has a higher sublimation temperature or melting point as compared to a lower sublimation temperature or melting point of the III-V or II-VI compound based decomposition layer (as the III-nitride based decomposition layer is decomposed but not the III-nitride based decomposition stop layer, the temperature at which decomposition layer decomposes will be lower than that of the decomposition stop layer; lines 7-9 and 17-19), and a temperature increases decomposes the III-V or II-VI compound based decomposition layer (lines 7-9 and 17-19); and growing a III-V or II-VI compound based (III-nitride is a III-V compound; line 10) device structure (III-nitride device structure; line 10) on or above the III-V or II-VI compound based (III-nitride is a III-V compound) decomposition stop layer (lines 10-11).
As to claim 22: reference application discloses in claim 21 a device (line 1, the product-by-process provides a device), comprising: a III-V or II-VI compound based device (III-nitride is a III-V compound; line 2) having an in-plane lattice constant or strain that is at least 20% biaxially relaxed (30% biaxially relaxed; lines 2-3) including: a III-V or II-VI compound based (III-nitride is a III-V compound; line 5) decomposition stop layer (III-nitride based decomposition stop layer; line 5) created on or above a III-V or II-VI compound based (III-nitride is a III-V compound; line 6) decomposition layer (III-nitride decomposition layer), wherein the III-V or II-VI compound based decomposition stop layer has a higher sublimation temperature or melting point as compared to a lower sublimation temperature or melting point of the III-V or II-VI compound based decomposition layer (as the III-nitride based decomposition layer is decomposed but not the III-nitride based decomposition stop layer, the temperature at which decomposition layer decomposes will be lower than that of the decomposition stop layer; lines 7-9 and 17-19), wherein the III-V or II-VI compound based decomposition layer (III-nitride decomposition layer) is decomposed, but not the III-V or II-VI compound based decomposition stop layer (lines 7-9 and 17-19); and a III-V or II-VI compound based (III-nitride is a III-V compound; line 10) device structure (III-nitride device structure; line 10) grown on or above the III-V or II-VI compound based (III-nitride is a III-V compound) decomposition stop layer (lines 10-11).
As to claim 23: reference application discloses in claim 21 a product-by-process (line 1), comprising: a III-V or II-VI compound based (III-nitride is a III-V compound; line 2) device having an in-plane lattice constant or strain that is at least 20% biaxially relaxed (30% biaxially relaxed; lines 2-3) including: a III-V or II-VI compound based (III-nitride is a III-V compound; line 5) decomposition stop layer (decomposition stop layer; line 5) created on or above a III-V or II-VI compound based (III-nitride is a III-V compound; line 6) decomposition layer (decomposition layer; line 6), wherein the III-V or II-VI compound based decomposition stop layer has a higher sublimation temperature or melting point as compared to a lower sublimation temperature or melting point of the III-V or II-VI compound based decomposition layer (as the III-nitride based decomposition layer is decomposed but not the III-nitride based decomposition stop layer when the temperature is increased, the temperature at which decomposition layer decomposes will be lower than that of the decomposition stop layer; lines 7-9 and 17-19), wherein the III-V or II-VI compound based decomposition layer is decomposed, but not the III-V or II-VI compound based decomposition stop layer (lines 7-9); and a III-V or II-VI compound based (III-nitride is a III-V compound; line 10) device structure grown on or above the III-V or II-VI compound based decomposition stop layer (lines 10-11); wherein the III-V or II-VI compound based device having the in-plane lattice constant or strain that is at least 20% biaxially relaxed is fabricated by (lines 12-14): creating the III-V or II-VI compound based decomposition stop layer on or above the III-V or II-VI compound based decomposition layer (lines 15-17), wherein the III-V or II-VI compound based decomposition stop layer has a higher sublimation temperature or melting point as compared to a lower sublimation temperature or melting point of the III-V or II-VI compound based decomposition layer, and a temperature increase decomposes the III-V or II- VI compound based decomposition layer (as the III-nitride based decomposition layer is decomposed but not the III-nitride based decomposition stop layer when the temperature is increased, the temperature at which decomposition layer decomposes will be lower than that of the decomposition stop layer; lines 17-19); and growing the III-V or II-VI compound based device structure on or above the III-V or II-VI compound based decomposition stop layer (lines 21-22).
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2 and 3 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
As to claims 2 and 3, a broad range or limitation together with a narrow range or limitation that falls within the broad range or limitation (in the same claim) may be considered indefinite if the resulting claim does not clearly set forth the metes and bounds of the patent protection desired. See MPEP § 2173.05(c). In the present instance, claim 2 recites the broad recitation “decompose or melt” in line 6, and the claim also recites (from claim 1 as claim 2 inherits all limitations of its independent claim) “decompose” in line 9 of claim 1 which is the narrower statement of the range/limitation. The claim(s) are considered indefinite because there is a question or doubt as to whether the feature introduced by such narrower language is (a) merely exemplary of the remainder of the claim, and therefore not required, or (b) a required feature of the claims. Claim 3 inherits the deficiencies of claim 2. Appropriate correction is required.
Claims 12 and 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 12 recites “the III-V compound”. However, claim 1 recites 4 items that comprise a III-V compound, i.e., a III-V compound based device, a III-V compound based decomposition stop layer, a III-V compound based decomposition layer, and a III-V compound based device structure. It is unclear which item is specifically being referred to or if all of the III-V compounds are all the same. Examiner interprets that “the III-V compound” of claim 12 is referring to just one of the items, e.g. the III-V compound based device. Appropriate correction is required.
Regarding claim 12, the phrase "such as" renders the claim indefinite because it is unclear whether the limitations following the phrase are part of the claimed invention. See MPEP § 2173.05(d).
Claim 13 recites “the II-VI compound”. However, claim 1 recites 4 items that comprise a II-VI compound, i.e., a II-VI compound based device, a II-VI compound based decomposition stop layer, a II-VI compound based decomposition layer, and a II-VI compound based device structure. It is unclear which item is specifically being referred to or if all of the II-VI compounds are all the same. Examiner interprets that “the II-VI compound” of claim 13 is referring to just one of the items, e.g. the II-VI compound based device. Appropriate correction is required.
Regarding claim 13, the phrase "such as" renders the claim indefinite because it is unclear whether the limitations following the phrase are part of the claimed invention. See MPEP § 2173.05(d).
Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 in line 4 recites “or other methods.” The specification does not indicate what the methods other than those already claimed in claim 14 (i.e., increasing a growth temperature, annealing, laser abrasion, or ion implantation) could be used to decompose the decomposition layer, see [0083] and [0115]. While breadth is not indefiniteness, according to MPEP 2173.04, a claim is indefinite when “the boundaries of the protected subject matter are not clearly delineated and the scope is unclear.” The scope is unclear as to what exactly another method could possibly be to decompose the decomposition method other than those already listed in the claim. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 4, 6, 8, 12, 14, 22, and 23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang (US 2015/0024223 and Wang hereinafter).
As to claims 1, 2, 4, 6, 8, 12, and 14: Wang discloses [claim 1] a method (Fig. 7; [0063]), comprising: fabricating a III-V or II-VI compound based device (device can be II-VI or III-V optoelectronic device; [0039], [0103], and [0107]-[0110]) having an in-plane lattice constant or strain that is at least 20% biaxially relaxed (template layer is the device layer, full relaxation is interpreted by Examiner to mean substantially 100% uniaxially and biaxially strain relaxed; [0070] and [0088]-[0091]) by: creating a III-V or II-VI compound based decomposition stop layer (Fig. 10; 24 can be III-V or II-VI; [0079]-[0080]) on or above a III-V or II-VI compound based decomposition layer (Figs. 9 and 10; 22; [0076]-[0078]), wherein the III-V or II-VI compound based decomposition stop layer (24) has a higher sublimation temperature or melting point (melting point; [0076]-[0078]) as compared to a lower sublimation temperature or melting point (melting point; [0076]) of the III-V or II-VI compound based decomposition layer (22, the decomposition layer, has a lower melting point than subsequently grown layers such as the decomposition stop layer 24; [0076]), and a temperature increase decomposes the III-V or II- VI compound based decomposition layer (Fig. 12; “decomposes” is interpreted by Examiner to mean break up in some manner, as the layer 22 is turned into an amorphous state, long-range order in the layer is destroyed or broken up and only short-range results, therefore, by melting and destroying the long-range order of the material 22 into only short-range order, the material is decomposed; [0086]-[0087]); and growing a III-V or II-VI compound based device structure (Fig. 13; 26 can be II-VI or III-V and is interpreted to be a device structure as it can be used as a device layer; [0039] and [0085]-[0089]) on or above the III-V or II-VI compound based decomposition stop layer (24); [claim 2] wherein the III-V or II-VI compound based decomposition layer (22) is created by ion implantation with a certain depth from a top surface of a III-V or II-VI compound based substrate or a III-V or II-VI compound based template grown (22) on a substrate (Fig. 9; 22 is grown on substrate 20; [0073]-[0075]), and the III-V or II-VI compound based decomposition layer (22) is annealed at or above the lower sublimation temperature or melting point (22 is heated for a period of time, which is interpreted to mean annealed, above the melting point to melt/decompose the layer as described previously; [0086]-[0088]) to decompose or melt the III-V or II-VI compound based decomposition layer ([0087]); [claim 4] wherein the III-V or II-VI compound based device structure (26) includes one or more of an n-type layer, an active or emitting layer, and/or a p-type layer (26 is interpreted to be an active layer as it can be used in the final device structure of an optoelectronic device; [0004] and [0092]); [claim 6] wherein the III-V or II-VI compound based device comprises a light-emitting diode (LED), laser diode (LD), photodetector, power device, radio frequency (RF) device, high electron mobility transistor (HEMT), field effect transistor (FET), or other opto-electronic device (LED, photodetector, solar cell, etc.; [0004] and [0039]); [claim 8] wherein the in-plane lattice constant or strain (strain) of at least one of the of III-V or II-VI compound based layers is at least 70% biaxially relaxed (full relaxation is interpreted by Examiner to mean substantially 100% uniaxially and biaxially strain relaxed; [0070] and [0088]-[0091]); [claim 12] wherein the III-V compound is a binary, ternary or quaternary alloy containing elements from group III (B, Al, Ga, In) and group V (N, P, As, Sb), including binary III-V compounds such as GaAs, GaP, InP, InAs, AlP, AlAs, AlSb, GaSb, AlN GaN, and InN, and ternary and quaternary III-V compounds resulting from mixing the binary III-V compounds (GaAs, InAlAs, InSb, AlSb, InGaAs, etc.; [0094]-[0102]); [claim 14] wherein the III-V or II-VI compound based decomposition layer (22) is decomposed (“decomposes” is interpreted by Examiner to mean break up in some manner, as the layer 22 is turned into an amorphous state, long-range order in the layer is destroyed or broken up and only short-range results, therefore, by melting and destroying the long-range order of the material 22 into only short-range order, the material is decomposed; [0086]-[0087]) by increasing a growth temperature of the III-V or II-VI compound based decomposition top layer, annealing, laser abrasion, ion implantation, or other methods (the temperature is raised; [0086]).
As to claim 22: Wang discloses a device (Fig. 13; [0063]), comprising: a III-V or II-VI compound based device (device can be II-VI or III-V optoelectronic device; [0039], [0103], and [0107]-[0110]) having an in-plane lattice constant or strain that is at least 20% biaxially relaxed (template layer is the device layer, full relaxation is interpreted by Examiner to mean substantially 100% uniaxially and biaxially strain relaxed; [0070] and [0088]-[0091]) including: a III-V or II-VI compound based decomposition stop layer (24 can be III-V or II-VI; [0079]-[0080]) created on or above a III-V or II-VI compound based decomposition layer (22; [0076]-[0078]), wherein the III-V or II-VI compound based decomposition stop layer (24) has a higher sublimation temperature or melting point (melting point; [0076]-[0078]) as compared to a lower sublimation temperature or melting point (melting point; [0076]) of the III-V or II-VI compound based decomposition layer (22, the decomposition layer, has a lower melting point than subsequently grown layers such as the decomposition stop layer 24; [0076]), wherein the III-V or II-VI compound based decomposition layer is decomposed, but not the III-V or II-VI compound based decomposition stop layer (“decomposed” is interpreted by Examiner to mean break up in some manner, as the layer 22 is turned into an amorphous state, long-range order in the layer is destroyed or broken up and only short-range results, therefore, by melting and destroying the long-range order of the material 22 into only short-range order, the material is decomposed; [0086]-[0087]); and a III-V or II-VI compound based device structure (26 can be II-VI or III-V and is interpreted to be a device structure as it can be used as a device layer; [0039] and [0085]-[0089]) grown on or above the III-V or II-VI compound based decomposition stop layer (24).
As to claim 23: Wang discloses a product-by-process (Fig. 13; [0063]), comprising: a III-V or II-VI compound based device (device can be II-VI or III-V optoelectronic device; [0039], [0103], and [0107]-[0110]) having an in-plane lattice constant or strain that is at least 20% biaxially relaxed (template layer is the device layer, full relaxation is interpreted by Examiner to mean substantially 100% uniaxially and biaxially strain relaxed; [0070] and [0088]-[0091]) including: a III-V or II-VI compound based decomposition stop layer (24 can be III-V or II-VI; [0079]-[0080]) created on or above a III-V or II-VI compound based decomposition layer (22; [0076]-[0078]), wherein the III-V or II-VI compound based decomposition stop layer (24) has a higher sublimation temperature or melting point (melting point; [0076]-[0078]) as compared to a lower sublimation temperature or melting point (melting point; [0076]) of the III-V or II-VI compound based decomposition layer (22, the decomposition layer, has a lower melting point than subsequently grown layers such as the decomposition stop layer 24; [0076]), wherein the III-V or II-VI compound based decomposition layer is decomposed, but not the III-V or II-VI compound based decomposition stop layer (“decomposed” is interpreted by Examiner to mean break up in some manner, as the layer 22 is turned into an amorphous state, long-range order in the layer is destroyed or broken up and only short-range results, therefore, by melting and destroying the long-range order of the material 22 into only short-range order, the material is decomposed; [0086]-[0087]); and a III-V or II-VI compound based device structure (26 can be II-VI or III-V and is interpreted to be a device structure as it can be used as a device layer; [0039] and [0085]-[0089]) grown on or above the III-V or II-VI compound based decomposition stop layer (24); wherein the III-V or II-VI compound based device (device can be II-VI or III-V optoelectronic device; [0039], [0103], and [0107]-[0110]) having the in-plane lattice constant or strain that is at least 20% biaxially relaxed (template layer is the device layer, full relaxation is interpreted by Examiner to mean substantially 100% uniaxially and biaxially strain relaxed; [0070] and [0088]-[0091]) is fabricated by (Examiner notes that the following limitations are given little patentable weight as they are product-by-process limitations, see MPEP 2113): creating the III-V or II-VI compound based decomposition stop layer (Fig. 10; 24 can be III-V or II-VI; [0079]-[0080]) on or above the III-V or II-VI compound based decomposition layer (Figs. 9 and 10; 22; [0076]-[0078]), wherein the III-V or II-VI compound based decomposition stop layer (24) has a higher sublimation temperature or melting point (melting point; [0076]-[0078]) as compared to a lower sublimation temperature or melting point (melting point; [0076]) of the III-V or II-VI compound based decomposition layer (22, the decomposition layer, has a lower melting point than subsequently grown layers such as the decomposition stop layer 24; [0076]), and a temperature increase decomposes the III-V or II- VI compound based decomposition layer (Fig. 12; “decomposes” is interpreted by Examiner to mean break up in some manner, as the layer 22 is turned into an amorphous state, long-range order in the layer is destroyed or broken up and only short-range results, therefore, by melting and destroying the long-range order of the material 22 into only short-range order, the material is decomposed; [0086]-[0087]); and growing the III-V or II-VI compound based device structure (Fig. 13; 26 can be II-VI or III-V and is interpreted to be a device structure as it can be used as a device layer; [0039] and [0085]-[0089]) on or above the III-V or II-VI compound based decomposition stop layer (24).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Hoefler et al (US 2007/0082431 and Hoefler hereinafter).
Although the method disclosed by Wang shows substantial features of the claimed invention (discussed in paragraph 20 above), it fails to expressly disclose:
wherein the ion implantation implants ions selected from a group including at least Ge, In, Ga, Al, and O.
Wang discloses forming an epitaxial layer 22 on a substrate 20 where the epitaxial layer can comprise semiconductor materials that can comprise multiple elements, including Ge, on which the device layer is epitaxially grown.
Hoefler discloses in Fig. 1 and [0018]-[0019] that a compound semiconductor layer 105 comprising Ge can be formed through epitaxial growth on a substrate 103 or through ion implantation of Ge into the substrate.
Therefore, the claimed invention would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art because, as stated in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007), the substitution of one know element for another, in the instant case using ion implantation of a desired element such as Ge into a substrate in order to form a compound semiconductor instead of epitaxial growth of the compound semiconductor on the substrate, would have yielded predictable results, namely a compound semiconductor layer on which further processing (such as epitaxial growth in Wang) can be performed in view of the teachings of Hoefler recognizing the two methods as equivalents, to one of ordinary skill in the art before the effective filing date of the claimed invention.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Hwang et al (US 2017/0236807 and Hwang hereinafter).
Although the method disclosed by Wang shows substantial features of the claimed invention (discussed in paragraph 20 above), it fails to expressly disclose:
wherein the III-V or II-VI compound based device structure is flip-chip bonded on a sub-mount, and the III-V or II-VI compound based device structure is separated from the decomposed III-V or II-VI compound based decomposition layer.
Wang teaches a method of using layers to form a template layer 26, the claimed III-V or II-VI compound based device structure, that is fully relaxed on/in which optoelectronic devices can be formed ([0002], [0012]-[0013], and [0039]). Wang fails to expressly disclose what occurs after the template layer 26 is finished.
Hwang discloses in Figs. 1-6 and [0036]-[0058] a process including providing a host substrate 200 and a sacrificial layer 204 (Fig. 2; [0036]-[0044]) that are used to form device layers 206-210 thereon Afterward, the structure is flip-chip bonded to a sub-mount 408 (Fig. 4; [0048]-[0050]). Then, the sacrificial layer 204 is removed and the device layers 206-210 remain attached to the sub-mount 408 (Fig. 5; [0051]-[0053]).
Therefore, the claimed invention would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art because the technique for improving a particular class of devices, in the instant case flip-chip bonding the structure of Fig. 13 to a sub-mount and then detaching the device layer 26 of Wang from the growth substrate 20 by removing at least the decomposition layer 22, was part of the ordinary capabilities of a person of ordinary skill in the art, in view of the teaching of the technique for improvement in other situations, in the instant case the technique of removing sacrificial layers to detach device layers from a growth or host substrate after the structure is flip-chip bonded to a sub-mount as taught by Hwang, and the application of the known technique would have resulted in the predictable result of providing a stand-alone device layer structure that is fully relaxed for use in optoelectronic devices as taught by Wang using a technique to selectively remove the growth layers as discussed to provide a flexible array of compound semiconductor optoelectronic microdevices that allows for recycling of the host substrate ([0062]-[0064]). KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Dwilinski et al (US 2004/0261692 and Dwilinski hereinafter).
Wang discloses wherein the III-V or II-VI compound based device structure (Fig. 13; 26) is comprised of III-V or II-VI compound based layers (26 can be interpreted to be multiple layers of the same material), and an in-plane lattice constant or strain of at least one of the of III-V or II-VI compound based layers is 50% or more biaxially relaxed (full relaxation is interpreted by Examiner to mean substantially 100% uniaxially and biaxially strain relaxed; [0070] and [0088]-[0091]).
Wang fails to expressly disclose where the III-V or II-VI compound based device structure has an area or size of more than 100 μm2.
Wang discloses that the layer 26 is to be used for optoelectronic devices, see [0039].
Dwilinski discloses that a layer on/in which optoelectronic devices are to be formed and is a compound semiconductor can have a surface area of higher than 10 mm2, see [0030].
Therefore, a person having ordinary skill in the art before the effective filing date of the claimed invention would have had it within their ordinary capabilities to choose the size of the layer 26 of Wang such that it is within the claimed range in order to provide a layer surface on/in which multiple devices can be formed in order to increase yield and decrease manufacturing costs by forming multiple devices simultaneously.
Claims 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Hwang in view of Lee et al (US 2020/0043790 and Lee hereinafter).
As to claims 9 and 10: Although the method disclosed by Wang shows substantial features of the claimed invention (discussed in paragraph 20 above), it fails to expressly disclose:
[claim 9] wherein the III-V or II-VI compound based decomposition layer has a thickness of less than 50 nm; [claim 10] wherein the III-V or II-VI compound based decomposition layer has a thickness of less than 10 nm.
Wang discloses in [0077] that the decomposition layer 22 has a thickness of “nanometer order”.
Wang teaches a method of using layers including a decomposition layer 22 to form a template layer 26, the claimed III-V or II-VI compound based device structure, that is fully relaxed on/in which optoelectronic devices can be formed ([0002], [0012]-[0013], and [0039]). Wang fails to expressly disclose what occurs after the template layer 26 is finished.
Hwang discloses in Figs. 1-6 and [0036]-[0058] a process including providing a host substrate 200 and a sacrificial layer 204 (Fig. 2; [0036]-[0044]) that are used to form device layers 206-210 thereon Afterward, the structure is flip-chip bonded to a sub-mount 408 (Fig. 4; [0048]-[0050]). Then, the sacrificial layer 204 is removed and the device layers 206-210 remain attached to the sub-mount 408 (Fig. 5; [0051]-[0053]).
Lee discloses that sacrificial layers, such as 835 in Fig. 8A, used to separate a host substrate from the device layers can have a thickness of about 10 nm, see [0057].
As stated in MPEP 2144.05(I), “[i]n the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990) (The prior art taught carbon monoxide concentrations of "about 1-5%" while the claim was limited to "more than 5%." The court held that "about 1-5%" allowed for concentrations slightly above 5% thus the ranges overlapped.); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997) (Claim reciting thickness of a protective layer as falling within a range of "50 to 100 Angstroms" considered prima facie obvious in view of prior art reference teaching that "for suitable protection, the thickness of the protective layer should be not less than about 10 nm [i.e., 100 Angstroms]." The court stated that "by stating that ‘suitable protection’ is provided if the protective layer is ‘about’ 100 Angstroms thick, [the prior art reference] directly teaches the use of a thickness within [applicant’s] claimed range."). See also In re Bergen, 120 F.2d 329, 332, 49 USPQ 749, 751-52 (CCPA 1941) (The court found that the overlapping endpoint of the prior art and claimed range was sufficient to support an obviousness rejection, particularly when there was no showing of criticality of the claimed range).” Further, a person having ordinary skill in the art would be motivated to form the layer of sufficient thickness that allows for separation but not of too great a thickness such as removal increases manufacturing time and costs.
As to claim 11: Although the method disclosed by Wang shows substantial features of the claimed invention (discussed in paragraph 20 above), it fails to expressly disclose:
wherein the III-V or II-VI compound based decomposition stop layer has a thickness of 10 nm to 1000 nm.
Wang discloses in [0077] that the decomposition layer 22 has a thickness of “nanometer order”. Wang shows in Fig. 13 and [0083] that the decomposition stop layer 24 is larger (a few times more than as disclosed) than the decomposition layer 22, but fails to disclose the exact thickness of the decomposition stop layer.
Wang teaches a method of using layers including a decomposition layer 22 to form a template layer 26, the claimed III-V or II-VI compound based device structure, that is fully relaxed on/in which optoelectronic devices can be formed ([0002], [0012]-[0013], and [0039]). Wang fails to expressly disclose what occurs after the template layer 26 is finished.
Hwang discloses in Figs. 1-6 and [0036]-[0058] a process including providing a host substrate 200 and a sacrificial layer 204 (Fig. 2; [0036]-[0044]) that are used to form device layers 206-210 thereon Afterward, the structure is flip-chip bonded to a sub-mount 408 (Fig. 4; [0048]-[0050]). Then, the sacrificial layer 204 is removed and the device layers 206-210 remain attached to the sub-mount 408 (Fig. 5; [0051]-[0053]).
Lee discloses that sacrificial layers, such as 835 in Fig. 8A, used to separate a host substrate from the device layers can have a thickness of about 10 nm, see [0057].
Therefore, given that Wang desires that the decomposition stop layer be larger (a few times more than) than the decomposition layer, and that the decomposition layer can be about 10 nm, the range for the decomposition layer will overlap with the claimed range.
As stated in MPEP 2144.05(I), “[i]n the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990) (The prior art taught carbon monoxide concentrations of "about 1-5%" while the claim was limited to "more than 5%." The court held that "about 1-5%" allowed for concentrations slightly above 5% thus the ranges overlapped.); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997) (Claim reciting thickness of a protective layer as falling within a range of "50 to 100 Angstroms" considered prima facie obvious in view of prior art reference teaching that "for suitable protection, the thickness of the protective layer should be not less than about 10 nm [i.e., 100 Angstroms]." The court stated that "by stating that ‘suitable protection’ is provided if the protective layer is ‘about’ 100 Angstroms thick, [the prior art reference] directly teaches the use of a thickness within [applicant’s] claimed range."). See also In re Bergen, 120 F.2d 329, 332, 49 USPQ 749, 751-52 (CCPA 1941) (The court found that the overlapping endpoint of the prior art and claimed range was sufficient to support an obviousness rejection, particularly when there was no showing of criticality of the claimed range).” Further, a person having ordinary skill in the art would be motivated to form the layers of sufficient thickness that allows for separation but not of too great a thickness such as removal increases manufacturing time and costs.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Tassev (US 2022/0267925 and Tassev hereinafter).
Although the method disclosed by Wang shows substantial features of the claimed invention (discussed in paragraph 20 above), it fails to expressly disclose:
wherein the II-VI compound includes binary II-VI compounds such as ZnSe, ZnS, CdTe, HgTe, ZnO, and MgS, and ternary and quaternary II-VI compounds resulting from mixing the binary II-VI compounds.
Wang discloses in [0039] that the materials used in the optoelectronic invention can include II-VI materials, but fails to expressly disclose the exact materials.
Tassev discloses in [0016] that the type of II-VI materials that can be used for optoelectronic devices comprise ZnSe, CdTe, HgTe, etc.
Therefore, the claimed invention would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art because, as stated in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007), a person of ordinary skill has good reason to pursue the known options within his or her technical grasp, in the instant case choosing ZnSe, CdTe, or HgTe from the list of II-VI materials in Tassev; if this leads to the anticipated success, in the instant case a material that can be used to form optoelectronic devices, it is likely the product not of innovation but of ordinary skill.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Wang.
Wang discloses wherein the III-V or II-VI compound based decomposition stop layer (24) comprises Si (Si; [0080]).
Wang fails to expressly disclose that the III-V or II-VI compound based decomposition layer comprises Ge, and the III-V or II-VI compound based device structure comprises one or more SiC layers.
Wang discloses in [0085] that the III-V or II-VI compound based device structure 26 can comprise C, Si, Ge, Sn, binary and multiple semiconductors, etc. From the “binary” portion, it appears that the layer 26 can comprise a combination of the materials listed, such as SiC. Wang further discloses in [0039] that the device, including layer 22 the decomposition layer, is applied to materials that can comprise C, Si, Ge, Sn, binary and multiple semiconductors, etc.
Therefore, the claimed invention would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art because, as stated in KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007), a person of ordinary skill has good reason to pursue the known options within his or her technical grasp, in the instant case choosing Wang; if this leads to the anticipated success, in the instant case a material that can be used to form optoelectronic devices, it is likely the product not of innovation but of ordinary skill.
Claims 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wang as applied to claim 15 above, and further in view of Dwilinski.
As to claims 16-20: Wang discloses [claim 16] the at least one of the SiC layers (26) is at least 20% biaxially relaxed (full relaxation of 26 is interpreted by Examiner to mean substantially 100% uniaxially and biaxially strain relaxed; [0070] and [0088]-[0091]); [claim 17] wherein the at least one of the SiC layers (26) is more than 50% biaxially relaxed (full relaxation of 26 is interpreted by Examiner to mean substantially 100% uniaxially and biaxially strain relaxed; [0070] and [0088]-[0091]);
Wang fails to expressly disclose [claim 16] where at least one of the SiC layers has an area or size of more than 100 μm2.
Wang discloses that the layer 26 is to be used for optoelectronic devices, see [0039].
Dwilinski discloses that a layer on/in which optoelectronic devices are to be formed and is a compound semiconductor can have a surface area of higher than 10 mm2, see [0030].
Therefore, a person having ordinary skill in the art before the effective filing date of the claimed invention would have had it within their ordinary capabilities to choose the size of the layer 26 of Wang such that it is within the claimed range in order to provide a layer surface on/in which multiple devices can be formed in order to increase yield and decrease manufacturing costs by forming multiple devices simultaneously.
Wang in view of Dwilinski fail to expressly disclose [claim 18] wherein at least one of the SiC layers has a thickness of more than 1 μm; [claim 19] wherein the at least one of the SiC layers has a thickness of more than 5 μm; [claim 20] wherein the at least one of the SiC layers has a thickness of more than 10 μm.
Wang discloses in [0083] that the template layer 26 is large and is considered infinitely thick compared to that of the layer 22, which is on the nanometer order ([0077]). Wang discloses that the template 26 when it is InGaAs can have a thickness of 1.55 μm, see [0094].
Therefore, a person having ordinary skill in the art before the effective filing date of the claimed invention would have had it within their ordinary capabilities to grow the template layer, such as one comprising SiC, to a thickness within the claimed ranges as Wang discloses that the thickness is very large compared to that of the nanometer scale of the decomposition layer and can be greater than 1 μm in order to provide a device layer that the dislocations bend toward the lower layers ([0083]).
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Wang as applied to claim 15 above, and further in view of Hwang in view of Okuno (US 2018/0286671 and Okuno hereinafter).
Although the method disclosed by Wang shows substantial features of the claimed invention (discussed in paragraph 33 above), it fails to expressly disclose:
wherein the SiC layers are used as a substrate to grow the III-V or II-VI compound based device structure after the III-V or II-VI compound based decomposition stop layer that comprises Si is removed.
Wang teaches a method of using layers including a decomposition layer 22 to form a template layer 26, the claimed III-V or II-VI compound based device structure, that is fully relaxed on/in which optoelectronic devices can be formed ([0002], [0012]-[0013], and [0039]). Wang fails to expressly disclose what occurs after the template layer 26 is finished. Wang discloses that the template layer 26 can comprise materials including Si, C, Ge, IV-VI, and III-V materials, see [0039].
Hwang discloses in Figs. 1-6 and [0036]-[0058] a process including providing a host substrate 200 and a sacrificial layer 204 (Fig. 2; [0036]-[0044]) that are used to form device layers 206-210 thereon Afterward, the structure is flip-chip bonded to a sub-mount 408 (Fig. 4; [0048]-[0050]). Then, the sacrificial layer 204 is removed and the device layers 206-210 remain attached to the sub-mount 408 (Fig. 5; [0051]-[0053]).
Okuno discloses in [0100] that SiC can be used as a starter substrate on which III-V materials can be formed.
Therefore, the claimed invention would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art because the technique for improving a particular class of devices, in the instant case detaching the template layer 26 of Wang from the growth substrate 20 by removing at least the decomposition layer 22 and then using the template layer 26 to form III-V materials thereon as disclosed by Okuno, was part of the ordinary capabilities of a person of ordinary skill in the art, in view of the teaching of the technique for improvement in other situations, in the instant case the technique of removing sacrificial layers to detach device layers from a growth or host substrate as taught by Hwang and then forming III-V layers thereon, and the application of the known technique would have resulted in the predictable result of providing a stand-alone device layer structure that is fully relaxed for use in optoelectronic devices as taught by Wang using a technique to selectively remove the growth layers as discussed to provide a flexible array of compound semiconductor optoelectronic microdevices that allows for recycling of the host substrate ([0062]-[0064]) and allows for device layers to be formed thereon. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007).
Conclusion
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JOSEPH C. NICELY
Primary Examiner
Art Unit 2813
/JOSEPH C. NICELY/Primary Examiner, Art Unit 2813
4/30/2026
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