Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I (claims 1-8) in the reply filed on May 19, 2026 is acknowledged. The traversal is on the ground(s) that it is improper to set forth PCT rules as a basis. This is not found persuasive because U.S. laws, rules, and regulations are cited in the action as a basis for restriction. Also, it is proper to cite PCT rules for a national stage application under 35 U.S.C. 371 as such applications require a unity of invention analysis (MPEP 1893.03(d)).
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4 and 7 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Mao et al. (US Patent No. 12,406,951), hereinafter referred to as Mao.
Regarding claim 1, Mao teaches a die comprising: a circuit (Fig. 1, semiconductor device/chip 110; Col. 5, line 47 - Col. 8 line 53); a passivation layer comprising a top side and a bottom side, the passivation layer arranged above the circuit, wherein the top side of the passivation layer comprises portions of different respective heights extending vertically away from the circuit (Fig. 1, second passivation layer/first re-passivation layer 118, peaks 132; Col. 5, line 47 - Col. 8 line 53); and a polyimide layer disposed on the top side of the passivation layer (Fig. 1, third passivation layer/second re-passivation layer 122; Col. 5, line 47 - Col. 8 line 53).
Regarding claim 2, Mao further teaches the top side of the passivation layer comprises a plurality of projections extending away from a base of the top side (Fig. 1, peaks 132-1, 132-2; Col. 5, line 47 - Col. 8 line 53).
Regarding claim 3, Mao further teaches each of the plurality of projections comprise respective sides and wherein the respective sides of each of the plurality of projections are tapered such that the projection narrows as it extends away from the base (Fig. 1, peaks 132-1, 132-2; Col. 5, line 47 - Col. 8 line 54).
Regarding claim 4, Mao further teaches the sides of a projection of the plurality of projections are each tapered at an angle (Fig. 1, peaks 132-1, 132-2; Col. 5, line 47 - Col. 8 line 55).
Regarding claim 7, Mao further teaches an arrangement and shape of the plurality of projections are based on the lattice orientation of silicon in the die and the size of the circuit (Col. 1 lines 6 – 30 and Col. 5, line 47 - Col. 8 line 55).
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Claim Rejections - 35 USC § 103
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mao in view of Wang et al. (Pub. No. US 20110186987 A1), hereinafter referred to as Wang.
Regarding claim 5, Mao teaches the die of claim 2. However, Mao does not explicitly teach the projections comprise projections of different heights extending away from the base of the top side.
Wang teaches the projections comprise projections of different heights extending away from the base of the top side (Figs. 2B&C, stress buffer structure 212, ¶18-22).
Mao and Wang are analogous art as they are in the same field of endeavor of semiconductor devices. Therefore, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Mao to incorporate the teachings of Wang such that the projections of Mao comprise projections of different heights extending away from the base of the top side. For the purpose of reducing stress in the device, as recognized by Wang.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mao in view of Tsai (Pub. No. US 20220102233 A1).
Regarding claim 6, Mao teaches the die of claim 2. However, Mao does not explicitly teach each of the plurality of projections is one of a trapezoidal prism, a pyramid, or a triangular prism.
Tsai teaches each of the plurality of projections is one of a trapezoidal prism, a pyramid, or a triangular prism (Fig. 1A, dam structure 40; ¶29).
Mao and Tsai are analogous art as they are in the same field of endeavor of semiconductor devices. Therefore, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Mao to incorporate the teachings of Tsai such that the projections of Mao are shaped to be one of a trapezoidal prism, a pyramid, or a triangular prism. For the purpose of shaping the projection of better reducing stress in the device and improving adhesion between components.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mao in view of Huang et al. (Pub. No. US 20200105634 A1), hereinafter referred to as Huang.
Regarding claim 8, Mao teaches the die of claim 1. However, Mao does not explicitly teach a top side of the polyimide layer opposite the top side of the passivation layer comprises portions of different respective heights extending vertically away from the circuit such that the surface area of the top side of the polyimide layer is increased compared to a planar top side.
Huang teaches a top side of the polyimide layer opposite the top side of the passivation layer comprises portions of different respective heights extending vertically away from the circuit such that the surface area of the top side of the polyimide layer is increased compared to a planar top side (Figs. 1B-1D, polyimide layer 120; ¶19-21).
Mao and Huang are analogous art as they are in the same field of endeavor of semiconductor devices. Therefore, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify Mao to incorporate the teachings of Huang such that the top side of the polyimide layer of Mao comprises portions of different respective heights extending vertically away from the circuit such that the surface area of the top side of the polyimide layer is increased compared to a planar top side. For the purpose of designing the polyimide layer with the desired characteristics to prevent cracking issues and further manufacturing efficiency, as recognized by Huang.
Conclusion
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/FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897
/E.A.T./Examiner, Art Unit 2897
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